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small bugfixes, adds some half point functionality

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Eyck-Alexander Jentzsch 2025-03-08 12:44:37 +01:00
parent 2166a6d81e
commit ece6f7290f
2 changed files with 24 additions and 13 deletions
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35
src/vm/fp_functions.cpp
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@ -45,9 +45,13 @@ extern "C" {
using this_t = uint8_t*; using this_t = uint8_t*;
// this does not inlcude any reserved rm or the DYN rm, as DYN rm should be taken care of in the vm_impl // this does not inlcude any reserved rm or the DYN rm, as DYN rm should be taken care of in the vm_impl
const std::array<uint8_t, 6> rmm_map = {softfloat_round_near_even /*RNE*/, softfloat_round_minMag /*RTZ*/, const std::array<uint8_t, 7> rmm_map = {softfloat_round_near_even /*RNE*/,
softfloat_round_min /*RDN*/, softfloat_round_max /*RUP?*/, softfloat_round_minMag /*RTZ*/,
softfloat_round_near_maxMag /*RMM*/, softfloat_round_odd /*ROD*/}; softfloat_round_min /*RDN*/,
softfloat_round_max /*RUP?*/,
softfloat_round_near_maxMag /*RMM*/,
0 /*reserved*/,
softfloat_round_odd /*ROD*/};
const uint32_t quiet_nan32 = 0x7fC00000; const uint32_t quiet_nan32 = 0x7fC00000;
@ -55,6 +59,14 @@ extern "C" {
uint32_t fget_flags() { return softfloat_exceptionFlags & 0x1f; } uint32_t fget_flags() { return softfloat_exceptionFlags & 0x1f; }
uint16_t fsqrt_h(uint16_t v1, uint8_t mode) {
float16_t v1f{v1};
softfloat_roundingMode = rmm_map.at(mode);
softfloat_exceptionFlags = 0;
float16_t r = f16_sqrt(v1f);
return r.v;
}
uint16_t fclass_h(uint16_t v1) { uint16_t fclass_h(uint16_t v1) {
float16_t a{v1}; float16_t a{v1};
@ -238,15 +250,12 @@ uint32_t fclass_s(uint32_t v1) {
} }
uint32_t fconv_d2f(uint64_t v1, uint8_t mode) { uint32_t fconv_d2f(uint64_t v1, uint8_t mode) {
bool isNan = isNaNF64UI(v1); if(softfloat_isSigNaNF64UI(v1)) {
bool isSNaN = softfloat_isSigNaNF64UI(v1); softfloat_raiseFlags(softfloat_flag_invalid);
softfloat_roundingMode = rmm_map.at(mode);
softfloat_exceptionFlags = 0;
if(isNan) {
if(isSNaN)
softfloat_raiseFlags(softfloat_flag_invalid);
return defaultNaNF32UI; return defaultNaNF32UI;
} else { } else {
softfloat_roundingMode = rmm_map.at(mode);
softfloat_exceptionFlags = 0;
float32_t res = f64_to_f32(float64_t{v1}); float32_t res = f64_to_f32(float64_t{v1});
return res.v; return res.v;
} }
@ -608,7 +617,7 @@ uint64_t frsqrt7_d(uint64_t v) {
int exp = expF64UI(v); int exp = expF64UI(v);
uint64_t sign = signF64UI(v); uint64_t sign = signF64UI(v);
unsigned constexpr e = 11; unsigned constexpr e = 11;
unsigned constexpr s = 58; unsigned constexpr s = 52;
return frsqrt7_general(s, e, sign, exp, sig, subnormal); return frsqrt7_general(s, e, sign, exp, sig, subnormal);
} }
@ -726,14 +735,14 @@ uint32_t frec7_s(uint32_t v, uint8_t mode) {
uint64_t frec7_d(uint64_t v, uint8_t mode) { uint64_t frec7_d(uint64_t v, uint8_t mode) {
bool subnormal = false; bool subnormal = false;
uint64_t ret_val = 0; uint64_t ret_val = 0;
if(recip_check(fclass_s(v), subnormal, ret_val)) { if(recip_check(fclass_d(v), subnormal, ret_val)) {
return ret_val; return ret_val;
} }
uint64_t sig = fracF64UI(v); uint64_t sig = fracF64UI(v);
int exp = expF64UI(v); int exp = expF64UI(v);
uint64_t sign = signF64UI(v); uint64_t sign = signF64UI(v);
unsigned constexpr e = 11; unsigned constexpr e = 11;
unsigned constexpr s = 58; unsigned constexpr s = 52;
if(frec_general(ret_val, s, e, sign, exp, sig, subnormal, mode)) if(frec_general(ret_val, s, e, sign, exp, sig, subnormal, mode))
softfloat_exceptionFlags |= (softfloat_flag_inexact | softfloat_flag_overflow); softfloat_exceptionFlags |= (softfloat_flag_inexact | softfloat_flag_overflow);
return ret_val; return ret_val;

2
src/vm/fp_functions.h
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@ -39,6 +39,8 @@
extern "C" { extern "C" {
uint32_t fget_flags(); uint32_t fget_flags();
uint16_t fsqrt_h(uint16_t v1, uint8_t mode);
uint16_t fclass_h(uint16_t v1);
uint16_t frsqrt7_h(uint16_t v); uint16_t frsqrt7_h(uint16_t v);
uint16_t frec7_h(uint16_t v, uint8_t mode); uint16_t frec7_h(uint16_t v, uint8_t mode);
uint32_t fadd_s(uint32_t v1, uint32_t v2, uint8_t mode); uint32_t fadd_s(uint32_t v1, uint32_t v2, uint8_t mode);