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Eyck Jentzsch 2017-11-28 03:45:49 +01:00 committed by GitHub
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README.md
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# DBT-RISE-RiscV # DBT-RISE-RISCV
Am instruction set simulator based on DBT-RISE implementing the Risc-V ISA Am instruction set simulator based on DBT-RISE implementing the RISC-V ISA
**DBT-RISE-RiscV README** **DBT-RISE-RISCV README**
This is work in progress, so use at your own risk. Goal is to implement an open-source ISS which can easily embedded e.g. into SystemC Virtual Prototypes. It used code generation to allow easy extension and adaptation of the used instruction. This is work in progress, so use at your own risk. Goal is to implement an open-source ISS which can easily embedded e.g. into SystemC Virtual Prototypes. It used code generation to allow easy extension and adaptation of the used instruction.
The Risc-V ISS reaches about 20MIPS at an Intel Core i7-2600K. The RISC-V ISS reaches about 20MIPS at an Intel Core i7-2600K.
The implementation is based on LLVM 4.0. Eclipse CDT 4.7 (Oxygen) is recommended as IDE. The implementation is based on LLVM 4.0. Eclipse CDT 4.7 (Oxygen) is recommended as IDE.
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**Quick start** **Quick start**
* you need to have a decent compiler, make, python, and cmake installed * you need to have a decent compiler, make, python, and cmake installed
* install LLVM 4.0 according to http://apt.llvm.org/ (if it is not already provided by your distribution) * install LLVM 4.0 according to http://apt.llvm.org/ (if it is not already provided by your distribution e.g by Ubuntu 17.04)
* install conan.io (see also http://docs.conan.io/en/latest/installation.html): * install conan.io (see also http://docs.conan.io/en/latest/installation.html):
``` ```
pip install conan pip install conan
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``` ```
compiler.libcxx=libstdc++11 compiler.libcxx=libstdc++11
``` ```
in $HOME/.conan/profiles/default in $HOME/.conan/profiles/default