Adapted namespace changes in sc-components
This commit is contained in:
parent
4867cca187
commit
ccc3f5d47d
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@ -76,7 +76,7 @@
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</toolChain>
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</toolChain>
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</folderInfo>
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</folderInfo>
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<sourceEntries>
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<sourceEntries>
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<entry excluding="riscv/src-gen|sysc|blink.S|flash.s" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
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<entry excluding="riscv/src-gen|blink.S|scc|flash.s" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
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</sourceEntries>
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</sourceEntries>
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</configuration>
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</configuration>
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</storageModule>
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</storageModule>
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@ -17,13 +17,13 @@
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#ifndef _AON_H_
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#ifndef _AON_H_
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#define _AON_H_
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#define _AON_H_
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#include <sysc/tlm_target.h>
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#include "scc/tlm_target.h"
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namespace sysc {
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namespace sysc {
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class aon_regs;
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class aon_regs;
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class aon : public sc_core::sc_module, public tlm_target<> {
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class aon : public sc_core::sc_module, public scc::tlm_target<> {
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public:
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public:
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SC_HAS_PROCESS(aon);
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SC_HAS_PROCESS(aon);
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sc_core::sc_in<sc_core::sc_time> clk_i;
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sc_core::sc_in<sc_core::sc_time> clk_i;
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@ -17,7 +17,7 @@
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#ifndef _CLINT_H_
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#ifndef _CLINT_H_
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#define _CLINT_H_
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#define _CLINT_H_
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#include <sysc/tlm_target.h>
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#include "scc/tlm_target.h"
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namespace iss {
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namespace iss {
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namespace arch {
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namespace arch {
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@ -32,7 +32,7 @@ namespace SiFive {
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class core_complex;
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class core_complex;
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}
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}
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class clint : public sc_core::sc_module, public tlm_target<> {
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class clint : public sc_core::sc_module, public scc::tlm_target<> {
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public:
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public:
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SC_HAS_PROCESS(clint);
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SC_HAS_PROCESS(clint);
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sc_core::sc_in<sc_core::sc_time> clk_i;
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sc_core::sc_in<sc_core::sc_time> clk_i;
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@ -37,13 +37,13 @@
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#ifndef _SYSC_SIFIVE_FE310_H_
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#ifndef _SYSC_SIFIVE_FE310_H_
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#define _SYSC_SIFIVE_FE310_H_
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#define _SYSC_SIFIVE_FE310_H_
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#include <sysc/ext_attribute.h>
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#include <sysc/initiator_mixin.h>
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#include <sysc/traceable.h>
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#include <sysc/utilities.h>
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#include <tlm>
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#include <tlm>
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#include <tlm_utils/tlm_quantumkeeper.h>
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#include <tlm_utils/tlm_quantumkeeper.h>
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#include <util/range_lut.h>
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#include <util/range_lut.h>
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#include "scc/ext_attribute.h"
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#include "scc/initiator_mixin.h"
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#include "scc/traceable.h"
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#include "scc/utilities.h"
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namespace iss {
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namespace iss {
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class vm_if;
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class vm_if;
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@ -67,25 +67,25 @@ public:
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namespace SiFive {
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namespace SiFive {
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class core_wrapper;
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class core_wrapper;
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class core_complex : public sc_core::sc_module, public sysc::traceable {
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class core_complex : public sc_core::sc_module, public scc::traceable {
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public:
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public:
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SC_HAS_PROCESS(core_complex);
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SC_HAS_PROCESS(core_complex);
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sysc::initiator_mixin<tlm::tlm_initiator_socket<32>> initiator;
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scc::initiator_mixin<tlm::tlm_initiator_socket<32>> initiator;
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sc_core::sc_in<sc_core::sc_time> clk_i;
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sc_core::sc_in<sc_core::sc_time> clk_i;
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sc_core::sc_in<bool> rst_i;
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sc_core::sc_in<bool> rst_i;
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sysc::ext_attribute<std::string> elf_file;
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scc::ext_attribute<std::string> elf_file;
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sysc::ext_attribute<bool> enable_disass;
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scc::ext_attribute<bool> enable_disass;
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sysc::ext_attribute<uint64_t> reset_address;
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scc::ext_attribute<uint64_t> reset_address;
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sysc::ext_attribute<unsigned short> gdb_server_port;
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scc::ext_attribute<unsigned short> gdb_server_port;
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sysc::ext_attribute<bool> dump_ir;
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scc::ext_attribute<bool> dump_ir;
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core_complex(sc_core::sc_module_name name);
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core_complex(sc_core::sc_module_name name);
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@ -36,14 +36,14 @@
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#ifndef _AON_REGS_H_
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#ifndef _AON_REGS_H_
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#define _AON_REGS_H_
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#define _AON_REGS_H_
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#include <sysc/register.h>
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#include <sysc/tlm_target.h>
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#include <sysc/utilities.h>
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#include <util/bit_field.h>
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#include <util/bit_field.h>
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#include "scc/register.h"
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#include "scc/tlm_target.h"
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#include "scc/utilities.h"
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namespace sysc {
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namespace sysc {
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class aon_regs : public sc_core::sc_module, public sysc::resetable {
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class aon_regs : public sc_core::sc_module, public scc::resetable {
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public:
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public:
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// storage declarations
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// storage declarations
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uint32_t r_wdogcfg;
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uint32_t r_wdogcfg;
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uint32_t r_pmukey;
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uint32_t r_pmukey;
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// register declarations
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// register declarations
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sysc::sc_register<uint32_t> wdogcfg;
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scc::sc_register<uint32_t> wdogcfg;
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sysc::sc_register<uint32_t> wdogcount;
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scc::sc_register<uint32_t> wdogcount;
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sysc::sc_register<uint32_t> wdogs;
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scc::sc_register<uint32_t> wdogs;
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sysc::sc_register<uint32_t> wdogfeed;
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scc::sc_register<uint32_t> wdogfeed;
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sysc::sc_register<uint32_t> wdogkey;
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scc::sc_register<uint32_t> wdogkey;
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sysc::sc_register<uint32_t> wdogcmp;
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scc::sc_register<uint32_t> wdogcmp;
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sysc::sc_register<uint32_t> rtccfg;
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scc::sc_register<uint32_t> rtccfg;
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sysc::sc_register<uint32_t> rtclo;
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scc::sc_register<uint32_t> rtclo;
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sysc::sc_register<uint32_t> rtchi;
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scc::sc_register<uint32_t> rtchi;
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sysc::sc_register<uint32_t> rtcs;
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scc::sc_register<uint32_t> rtcs;
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sysc::sc_register<uint32_t> rtccmp;
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scc::sc_register<uint32_t> rtccmp;
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sysc::sc_register<uint32_t> lfrosccfg;
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scc::sc_register<uint32_t> lfrosccfg;
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sysc::sc_register_indexed<uint32_t, 32> backup;
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scc::sc_register_indexed<uint32_t, 32> backup;
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sysc::sc_register_indexed<pmuwakeupi_t, 8> pmuwakeupi;
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scc::sc_register_indexed<pmuwakeupi_t, 8> pmuwakeupi;
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sysc::sc_register_indexed<pmusleepi_t, 8> pmusleepi;
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scc::sc_register_indexed<pmusleepi_t, 8> pmusleepi;
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sysc::sc_register<uint32_t> pmuie;
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scc::sc_register<uint32_t> pmuie;
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sysc::sc_register<uint32_t> pmucause;
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scc::sc_register<uint32_t> pmucause;
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sysc::sc_register<uint32_t> pmusleep;
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scc::sc_register<uint32_t> pmusleep;
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sysc::sc_register<uint32_t> pmukey;
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scc::sc_register<uint32_t> pmukey;
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aon_regs(sc_core::sc_module_name nm);
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aon_regs(sc_core::sc_module_name nm);
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template <unsigned BUSWIDTH = 32> void registerResources(sysc::tlm_target<BUSWIDTH> &target);
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template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
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};
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};
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}
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}
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//////////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////////
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@ -148,7 +148,7 @@ inline sysc::aon_regs::aon_regs(sc_core::sc_module_name nm)
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, NAMED(pmusleep, r_pmusleep, 0, *this)
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, NAMED(pmusleep, r_pmusleep, 0, *this)
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, NAMED(pmukey, r_pmukey, 0, *this) {}
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, NAMED(pmukey, r_pmukey, 0, *this) {}
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template <unsigned BUSWIDTH> inline void sysc::aon_regs::registerResources(sysc::tlm_target<BUSWIDTH> &target) {
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template <unsigned BUSWIDTH> inline void sysc::aon_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
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target.addResource(wdogcfg, 0x0UL);
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target.addResource(wdogcfg, 0x0UL);
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target.addResource(wdogcount, 0x8UL);
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target.addResource(wdogcount, 0x8UL);
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target.addResource(wdogs, 0x10UL);
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target.addResource(wdogs, 0x10UL);
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#ifndef _CLINT_REGS_H_
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#ifndef _CLINT_REGS_H_
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#define _CLINT_REGS_H_
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#define _CLINT_REGS_H_
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#include <sysc/register.h>
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#include <sysc/tlm_target.h>
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#include <sysc/utilities.h>
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#include <util/bit_field.h>
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#include <util/bit_field.h>
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#include "scc/register.h"
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#include "scc/tlm_target.h"
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#include "scc/utilities.h"
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namespace sysc {
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namespace sysc {
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class clint_regs : public sc_core::sc_module, public sysc::resetable {
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class clint_regs : public sc_core::sc_module, public scc::resetable {
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public:
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public:
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// storage declarations
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// storage declarations
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BEGIN_BF_DECL(msip_t, uint32_t);
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BEGIN_BF_DECL(msip_t, uint32_t);
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uint64_t r_mtime;
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uint64_t r_mtime;
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// register declarations
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// register declarations
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sysc::sc_register<msip_t> msip;
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scc::sc_register<msip_t> msip;
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sysc::sc_register<uint64_t> mtimecmp;
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scc::sc_register<uint64_t> mtimecmp;
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sysc::sc_register<uint64_t> mtime;
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scc::sc_register<uint64_t> mtime;
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clint_regs(sc_core::sc_module_name nm);
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clint_regs(sc_core::sc_module_name nm);
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template <unsigned BUSWIDTH = 32> void registerResources(sysc::tlm_target<BUSWIDTH> &target);
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template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
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};
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};
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}
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}
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//////////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////////
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@ -74,7 +74,7 @@ inline sysc::clint_regs::clint_regs(sc_core::sc_module_name nm)
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, NAMED(mtimecmp, r_mtimecmp, 0, *this)
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, NAMED(mtimecmp, r_mtimecmp, 0, *this)
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, NAMED(mtime, r_mtime, 0, *this) {}
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, NAMED(mtime, r_mtime, 0, *this) {}
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template <unsigned BUSWIDTH> inline void sysc::clint_regs::registerResources(sysc::tlm_target<BUSWIDTH> &target) {
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template <unsigned BUSWIDTH> inline void sysc::clint_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
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target.addResource(msip, 0x0UL);
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target.addResource(msip, 0x0UL);
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target.addResource(mtimecmp, 0x4000UL);
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target.addResource(mtimecmp, 0x4000UL);
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target.addResource(mtime, 0xbff8UL);
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target.addResource(mtime, 0xbff8UL);
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#define _E300_PLAT_MAP_H_
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#define _E300_PLAT_MAP_H_
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// need double braces, see
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// need double braces, see
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// https://stackoverflow.com/questions/6893700/how-to-construct-stdarray-object-with-initializer-list#6894191
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// https://stackoverflow.com/questions/6893700/how-to-construct-stdarray-object-with-initializer-list#6894191
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const std::array<sysc::target_memory_map_entry<32>, 8> e300_plat_map = {{
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const std::array<scc::target_memory_map_entry<32>, 8> e300_plat_map = {{
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{&i_clint, 0x2000000, 0xc000},
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{&i_clint, 0x2000000, 0xc000},
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{&i_plic, 0xc000000, 0x200008},
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{&i_plic, 0xc000000, 0x200008},
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{&i_aon, 0x10000000, 0x150},
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{&i_aon, 0x10000000, 0x150},
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#ifndef _GPIO_REGS_H_
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#ifndef _GPIO_REGS_H_
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#define _GPIO_REGS_H_
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#define _GPIO_REGS_H_
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#include <sysc/register.h>
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#include <sysc/tlm_target.h>
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#include <sysc/utilities.h>
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#include <util/bit_field.h>
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#include <util/bit_field.h>
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#include "scc/register.h"
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#include "scc/tlm_target.h"
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#include "scc/utilities.h"
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namespace sysc {
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namespace sysc {
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class gpio_regs : public sc_core::sc_module, public sysc::resetable {
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class gpio_regs : public sc_core::sc_module, public scc::resetable {
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public:
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public:
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// storage declarations
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// storage declarations
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uint32_t r_value;
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uint32_t r_value;
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uint32_t r_out_xor;
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uint32_t r_out_xor;
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// register declarations
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// register declarations
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sysc::sc_register<uint32_t> value;
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scc::sc_register<uint32_t> value;
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sysc::sc_register<uint32_t> input_en;
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scc::sc_register<uint32_t> input_en;
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sysc::sc_register<uint32_t> output_en;
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scc::sc_register<uint32_t> output_en;
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sysc::sc_register<uint32_t> port;
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scc::sc_register<uint32_t> port;
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sysc::sc_register<uint32_t> pue;
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scc::sc_register<uint32_t> pue;
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sysc::sc_register<uint32_t> ds;
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scc::sc_register<uint32_t> ds;
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sysc::sc_register<uint32_t> rise_ie;
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scc::sc_register<uint32_t> rise_ie;
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sysc::sc_register<uint32_t> rise_ip;
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scc::sc_register<uint32_t> rise_ip;
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sysc::sc_register<uint32_t> fall_ie;
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scc::sc_register<uint32_t> fall_ie;
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sysc::sc_register<uint32_t> fall_ip;
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scc::sc_register<uint32_t> fall_ip;
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sysc::sc_register<uint32_t> high_ie;
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scc::sc_register<uint32_t> high_ie;
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sysc::sc_register<uint32_t> high_ip;
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scc::sc_register<uint32_t> high_ip;
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sysc::sc_register<uint32_t> low_ie;
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scc::sc_register<uint32_t> low_ie;
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sysc::sc_register<uint32_t> low_ip;
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scc::sc_register<uint32_t> low_ip;
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sysc::sc_register<uint32_t> iof_en;
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scc::sc_register<uint32_t> iof_en;
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sysc::sc_register<uint32_t> iof_sel;
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scc::sc_register<uint32_t> iof_sel;
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sysc::sc_register<uint32_t> out_xor;
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scc::sc_register<uint32_t> out_xor;
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gpio_regs(sc_core::sc_module_name nm);
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gpio_regs(sc_core::sc_module_name nm);
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template <unsigned BUSWIDTH = 32> void registerResources(sysc::tlm_target<BUSWIDTH> &target);
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template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
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};
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};
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}
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}
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//////////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////////
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@ -128,7 +128,7 @@ inline sysc::gpio_regs::gpio_regs(sc_core::sc_module_name nm)
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, NAMED(iof_sel, r_iof_sel, 0, *this)
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, NAMED(iof_sel, r_iof_sel, 0, *this)
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, NAMED(out_xor, r_out_xor, 0, *this) {}
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, NAMED(out_xor, r_out_xor, 0, *this) {}
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template <unsigned BUSWIDTH> inline void sysc::gpio_regs::registerResources(sysc::tlm_target<BUSWIDTH> &target) {
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template <unsigned BUSWIDTH> inline void sysc::gpio_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
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target.addResource(value, 0x0UL);
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target.addResource(value, 0x0UL);
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target.addResource(input_en, 0x4UL);
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target.addResource(input_en, 0x4UL);
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target.addResource(output_en, 0x8UL);
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target.addResource(output_en, 0x8UL);
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#ifndef _PLIC_REGS_H_
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#ifndef _PLIC_REGS_H_
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#define _PLIC_REGS_H_
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#define _PLIC_REGS_H_
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|
||||||
#include <sysc/register.h>
|
|
||||||
#include <sysc/tlm_target.h>
|
|
||||||
#include <sysc/utilities.h>
|
|
||||||
#include <util/bit_field.h>
|
#include <util/bit_field.h>
|
||||||
|
#include "scc/register.h"
|
||||||
|
#include "scc/tlm_target.h"
|
||||||
|
#include "scc/utilities.h"
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
class plic_regs : public sc_core::sc_module, public sysc::resetable {
|
class plic_regs : public sc_core::sc_module, public scc::resetable {
|
||||||
public:
|
public:
|
||||||
// storage declarations
|
// storage declarations
|
||||||
BEGIN_BF_DECL(priority_t, uint32_t);
|
BEGIN_BF_DECL(priority_t, uint32_t);
|
||||||
|
@ -62,15 +62,15 @@ public:
|
||||||
uint32_t r_claim_complete;
|
uint32_t r_claim_complete;
|
||||||
|
|
||||||
// register declarations
|
// register declarations
|
||||||
sysc::sc_register_indexed<priority_t, 255> priority;
|
scc::sc_register_indexed<priority_t, 255> priority;
|
||||||
sysc::sc_register<uint32_t> pending;
|
scc::sc_register<uint32_t> pending;
|
||||||
sysc::sc_register<uint32_t> enabled;
|
scc::sc_register<uint32_t> enabled;
|
||||||
sysc::sc_register<threshold_t> threshold;
|
scc::sc_register<threshold_t> threshold;
|
||||||
sysc::sc_register<uint32_t> claim_complete;
|
scc::sc_register<uint32_t> claim_complete;
|
||||||
|
|
||||||
plic_regs(sc_core::sc_module_name nm);
|
plic_regs(sc_core::sc_module_name nm);
|
||||||
|
|
||||||
template <unsigned BUSWIDTH = 32> void registerResources(sysc::tlm_target<BUSWIDTH> &target);
|
template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////////////
|
||||||
|
@ -85,7 +85,7 @@ inline sysc::plic_regs::plic_regs(sc_core::sc_module_name nm)
|
||||||
, NAMED(threshold, r_threshold, 0, *this)
|
, NAMED(threshold, r_threshold, 0, *this)
|
||||||
, NAMED(claim_complete, r_claim_complete, 0, *this) {}
|
, NAMED(claim_complete, r_claim_complete, 0, *this) {}
|
||||||
|
|
||||||
template <unsigned BUSWIDTH> inline void sysc::plic_regs::registerResources(sysc::tlm_target<BUSWIDTH> &target) {
|
template <unsigned BUSWIDTH> inline void sysc::plic_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
|
||||||
target.addResource(priority, 0x4UL);
|
target.addResource(priority, 0x4UL);
|
||||||
target.addResource(pending, 0x1000UL);
|
target.addResource(pending, 0x1000UL);
|
||||||
target.addResource(enabled, 0x2000UL);
|
target.addResource(enabled, 0x2000UL);
|
||||||
|
|
|
@ -36,14 +36,14 @@
|
||||||
#ifndef _PRCI_REGS_H_
|
#ifndef _PRCI_REGS_H_
|
||||||
#define _PRCI_REGS_H_
|
#define _PRCI_REGS_H_
|
||||||
|
|
||||||
#include <sysc/register.h>
|
|
||||||
#include <sysc/tlm_target.h>
|
|
||||||
#include <sysc/utilities.h>
|
|
||||||
#include <util/bit_field.h>
|
#include <util/bit_field.h>
|
||||||
|
#include "scc/register.h"
|
||||||
|
#include "scc/tlm_target.h"
|
||||||
|
#include "scc/utilities.h"
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
class prci_regs : public sc_core::sc_module, public sysc::resetable {
|
class prci_regs : public sc_core::sc_module, public scc::resetable {
|
||||||
public:
|
public:
|
||||||
// storage declarations
|
// storage declarations
|
||||||
BEGIN_BF_DECL(hfrosccfg_t, uint32_t);
|
BEGIN_BF_DECL(hfrosccfg_t, uint32_t);
|
||||||
|
@ -73,15 +73,15 @@ public:
|
||||||
uint32_t r_coreclkcfg;
|
uint32_t r_coreclkcfg;
|
||||||
|
|
||||||
// register declarations
|
// register declarations
|
||||||
sysc::sc_register<hfrosccfg_t> hfrosccfg;
|
scc::sc_register<hfrosccfg_t> hfrosccfg;
|
||||||
sysc::sc_register<hfxosccfg_t> hfxosccfg;
|
scc::sc_register<hfxosccfg_t> hfxosccfg;
|
||||||
sysc::sc_register<pllcfg_t> pllcfg;
|
scc::sc_register<pllcfg_t> pllcfg;
|
||||||
sysc::sc_register<uint32_t> plloutdiv;
|
scc::sc_register<uint32_t> plloutdiv;
|
||||||
sysc::sc_register<uint32_t> coreclkcfg;
|
scc::sc_register<uint32_t> coreclkcfg;
|
||||||
|
|
||||||
prci_regs(sc_core::sc_module_name nm);
|
prci_regs(sc_core::sc_module_name nm);
|
||||||
|
|
||||||
template <unsigned BUSWIDTH = 32> void registerResources(sysc::tlm_target<BUSWIDTH> &target);
|
template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////////////
|
||||||
|
@ -96,7 +96,7 @@ inline sysc::prci_regs::prci_regs(sc_core::sc_module_name nm)
|
||||||
, NAMED(plloutdiv, r_plloutdiv, 0, *this)
|
, NAMED(plloutdiv, r_plloutdiv, 0, *this)
|
||||||
, NAMED(coreclkcfg, r_coreclkcfg, 0, *this) {}
|
, NAMED(coreclkcfg, r_coreclkcfg, 0, *this) {}
|
||||||
|
|
||||||
template <unsigned BUSWIDTH> inline void sysc::prci_regs::registerResources(sysc::tlm_target<BUSWIDTH> &target) {
|
template <unsigned BUSWIDTH> inline void sysc::prci_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
|
||||||
target.addResource(hfrosccfg, 0x0UL);
|
target.addResource(hfrosccfg, 0x0UL);
|
||||||
target.addResource(hfxosccfg, 0x4UL);
|
target.addResource(hfxosccfg, 0x4UL);
|
||||||
target.addResource(pllcfg, 0x8UL);
|
target.addResource(pllcfg, 0x8UL);
|
||||||
|
|
|
@ -36,14 +36,14 @@
|
||||||
#ifndef _SPI_REGS_H_
|
#ifndef _SPI_REGS_H_
|
||||||
#define _SPI_REGS_H_
|
#define _SPI_REGS_H_
|
||||||
|
|
||||||
#include <sysc/register.h>
|
|
||||||
#include <sysc/tlm_target.h>
|
|
||||||
#include <sysc/utilities.h>
|
|
||||||
#include <util/bit_field.h>
|
#include <util/bit_field.h>
|
||||||
|
#include "scc/register.h"
|
||||||
|
#include "scc/tlm_target.h"
|
||||||
|
#include "scc/utilities.h"
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
class spi_regs : public sc_core::sc_module, public sysc::resetable {
|
class spi_regs : public sc_core::sc_module, public scc::resetable {
|
||||||
public:
|
public:
|
||||||
// storage declarations
|
// storage declarations
|
||||||
BEGIN_BF_DECL(sckdiv_t, uint32_t);
|
BEGIN_BF_DECL(sckdiv_t, uint32_t);
|
||||||
|
@ -124,26 +124,26 @@ public:
|
||||||
END_BF_DECL() r_ip;
|
END_BF_DECL() r_ip;
|
||||||
|
|
||||||
// register declarations
|
// register declarations
|
||||||
sysc::sc_register<sckdiv_t> sckdiv;
|
scc::sc_register<sckdiv_t> sckdiv;
|
||||||
sysc::sc_register<sckmode_t> sckmode;
|
scc::sc_register<sckmode_t> sckmode;
|
||||||
sysc::sc_register<uint32_t> csid;
|
scc::sc_register<uint32_t> csid;
|
||||||
sysc::sc_register<uint32_t> csdef;
|
scc::sc_register<uint32_t> csdef;
|
||||||
sysc::sc_register<csmode_t> csmode;
|
scc::sc_register<csmode_t> csmode;
|
||||||
sysc::sc_register<delay0_t> delay0;
|
scc::sc_register<delay0_t> delay0;
|
||||||
sysc::sc_register<delay1_t> delay1;
|
scc::sc_register<delay1_t> delay1;
|
||||||
sysc::sc_register<fmt_t> fmt;
|
scc::sc_register<fmt_t> fmt;
|
||||||
sysc::sc_register<txdata_t> txdata;
|
scc::sc_register<txdata_t> txdata;
|
||||||
sysc::sc_register<rxdata_t> rxdata;
|
scc::sc_register<rxdata_t> rxdata;
|
||||||
sysc::sc_register<txmark_t> txmark;
|
scc::sc_register<txmark_t> txmark;
|
||||||
sysc::sc_register<rxmark_t> rxmark;
|
scc::sc_register<rxmark_t> rxmark;
|
||||||
sysc::sc_register<fctrl_t> fctrl;
|
scc::sc_register<fctrl_t> fctrl;
|
||||||
sysc::sc_register<ffmt_t> ffmt;
|
scc::sc_register<ffmt_t> ffmt;
|
||||||
sysc::sc_register<ie_t> ie;
|
scc::sc_register<ie_t> ie;
|
||||||
sysc::sc_register<ip_t> ip;
|
scc::sc_register<ip_t> ip;
|
||||||
|
|
||||||
spi_regs(sc_core::sc_module_name nm);
|
spi_regs(sc_core::sc_module_name nm);
|
||||||
|
|
||||||
template <unsigned BUSWIDTH = 32> void registerResources(sysc::tlm_target<BUSWIDTH> &target);
|
template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////////////
|
||||||
|
@ -169,7 +169,7 @@ inline sysc::spi_regs::spi_regs(sc_core::sc_module_name nm)
|
||||||
, NAMED(ie, r_ie, 0, *this)
|
, NAMED(ie, r_ie, 0, *this)
|
||||||
, NAMED(ip, r_ip, 0, *this) {}
|
, NAMED(ip, r_ip, 0, *this) {}
|
||||||
|
|
||||||
template <unsigned BUSWIDTH> inline void sysc::spi_regs::registerResources(sysc::tlm_target<BUSWIDTH> &target) {
|
template <unsigned BUSWIDTH> inline void sysc::spi_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
|
||||||
target.addResource(sckdiv, 0x0UL);
|
target.addResource(sckdiv, 0x0UL);
|
||||||
target.addResource(sckmode, 0x4UL);
|
target.addResource(sckmode, 0x4UL);
|
||||||
target.addResource(csid, 0x10UL);
|
target.addResource(csid, 0x10UL);
|
||||||
|
|
|
@ -36,14 +36,14 @@
|
||||||
#ifndef _UART_REGS_H_
|
#ifndef _UART_REGS_H_
|
||||||
#define _UART_REGS_H_
|
#define _UART_REGS_H_
|
||||||
|
|
||||||
#include <sysc/register.h>
|
|
||||||
#include <sysc/tlm_target.h>
|
|
||||||
#include <sysc/utilities.h>
|
|
||||||
#include <util/bit_field.h>
|
#include <util/bit_field.h>
|
||||||
|
#include "scc/register.h"
|
||||||
|
#include "scc/tlm_target.h"
|
||||||
|
#include "scc/utilities.h"
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
class uart_regs : public sc_core::sc_module, public sysc::resetable {
|
class uart_regs : public sc_core::sc_module, public scc::resetable {
|
||||||
public:
|
public:
|
||||||
// storage declarations
|
// storage declarations
|
||||||
BEGIN_BF_DECL(txdata_t, uint32_t);
|
BEGIN_BF_DECL(txdata_t, uint32_t);
|
||||||
|
@ -82,17 +82,17 @@ public:
|
||||||
END_BF_DECL() r_div;
|
END_BF_DECL() r_div;
|
||||||
|
|
||||||
// register declarations
|
// register declarations
|
||||||
sysc::sc_register<txdata_t> txdata;
|
scc::sc_register<txdata_t> txdata;
|
||||||
sysc::sc_register<rxdata_t> rxdata;
|
scc::sc_register<rxdata_t> rxdata;
|
||||||
sysc::sc_register<txctrl_t> txctrl;
|
scc::sc_register<txctrl_t> txctrl;
|
||||||
sysc::sc_register<rxctrl_t> rxctrl;
|
scc::sc_register<rxctrl_t> rxctrl;
|
||||||
sysc::sc_register<ie_t> ie;
|
scc::sc_register<ie_t> ie;
|
||||||
sysc::sc_register<ip_t> ip;
|
scc::sc_register<ip_t> ip;
|
||||||
sysc::sc_register<div_t> div;
|
scc::sc_register<div_t> div;
|
||||||
|
|
||||||
uart_regs(sc_core::sc_module_name nm);
|
uart_regs(sc_core::sc_module_name nm);
|
||||||
|
|
||||||
template <unsigned BUSWIDTH = 32> void registerResources(sysc::tlm_target<BUSWIDTH> &target);
|
template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////////////
|
||||||
|
@ -109,7 +109,7 @@ inline sysc::uart_regs::uart_regs(sc_core::sc_module_name nm)
|
||||||
, NAMED(ip, r_ip, 0, *this)
|
, NAMED(ip, r_ip, 0, *this)
|
||||||
, NAMED(div, r_div, 0, *this) {}
|
, NAMED(div, r_div, 0, *this) {}
|
||||||
|
|
||||||
template <unsigned BUSWIDTH> inline void sysc::uart_regs::registerResources(sysc::tlm_target<BUSWIDTH> &target) {
|
template <unsigned BUSWIDTH> inline void sysc::uart_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
|
||||||
target.addResource(txdata, 0x0UL);
|
target.addResource(txdata, 0x0UL);
|
||||||
target.addResource(rxdata, 0x4UL);
|
target.addResource(rxdata, 0x4UL);
|
||||||
target.addResource(txctrl, 0x8UL);
|
target.addResource(txctrl, 0x8UL);
|
||||||
|
|
|
@ -17,13 +17,13 @@
|
||||||
#ifndef _GPIO_H_
|
#ifndef _GPIO_H_
|
||||||
#define _GPIO_H_
|
#define _GPIO_H_
|
||||||
|
|
||||||
#include <sysc/tlm_target.h>
|
#include "scc/tlm_target.h"
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
class gpio_regs;
|
class gpio_regs;
|
||||||
|
|
||||||
class gpio : public sc_core::sc_module, public tlm_target<> {
|
class gpio : public sc_core::sc_module, public scc::tlm_target<> {
|
||||||
public:
|
public:
|
||||||
SC_HAS_PROCESS(gpio);
|
SC_HAS_PROCESS(gpio);
|
||||||
sc_core::sc_in<sc_core::sc_time> clk_i;
|
sc_core::sc_in<sc_core::sc_time> clk_i;
|
||||||
|
|
|
@ -33,10 +33,10 @@
|
||||||
|
|
||||||
#include <array>
|
#include <array>
|
||||||
#include <sysc/kernel/sc_module.h>
|
#include <sysc/kernel/sc_module.h>
|
||||||
#include <sysc/memory.h>
|
|
||||||
#include <sysc/router.h>
|
|
||||||
#include <sysc/utilities.h>
|
|
||||||
|
|
||||||
|
#include "scc/memory.h"
|
||||||
|
#include "scc/router.h"
|
||||||
|
#include "scc/utilities.h"
|
||||||
#include "core_complex.h"
|
#include "core_complex.h"
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
@ -46,7 +46,7 @@ public:
|
||||||
SC_HAS_PROCESS(platform);
|
SC_HAS_PROCESS(platform);
|
||||||
|
|
||||||
SiFive::core_complex i_core_complex;
|
SiFive::core_complex i_core_complex;
|
||||||
router<> i_router;
|
scc::router<> i_router;
|
||||||
uart i_uart0, i_uart1;
|
uart i_uart0, i_uart1;
|
||||||
spi i_spi;
|
spi i_spi;
|
||||||
gpio i_gpio;
|
gpio i_gpio;
|
||||||
|
@ -55,8 +55,8 @@ public:
|
||||||
prci i_prci;
|
prci i_prci;
|
||||||
clint i_clint;
|
clint i_clint;
|
||||||
|
|
||||||
memory<512_MB, 32> i_mem_qspi;
|
scc::memory<512_MB, 32> i_mem_qspi;
|
||||||
memory<128_kB, 32> i_mem_ram;
|
scc::memory<128_kB, 32> i_mem_ram;
|
||||||
sc_core::sc_signal<sc_core::sc_time> s_clk;
|
sc_core::sc_signal<sc_core::sc_time> s_clk;
|
||||||
sc_core::sc_signal<bool> s_rst, s_mtime_int, s_msie_int;
|
sc_core::sc_signal<bool> s_rst, s_mtime_int, s_msie_int;
|
||||||
|
|
||||||
|
|
|
@ -17,13 +17,13 @@
|
||||||
#ifndef _PLIC_H_
|
#ifndef _PLIC_H_
|
||||||
#define _PLIC_H_
|
#define _PLIC_H_
|
||||||
|
|
||||||
#include <sysc/tlm_target.h>
|
#include "scc/tlm_target.h"
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
class plic_regs;
|
class plic_regs;
|
||||||
|
|
||||||
class plic : public sc_core::sc_module, public tlm_target<> {
|
class plic : public sc_core::sc_module, public scc::tlm_target<> {
|
||||||
public:
|
public:
|
||||||
SC_HAS_PROCESS(plic);
|
SC_HAS_PROCESS(plic);
|
||||||
sc_core::sc_in<sc_core::sc_time> clk_i;
|
sc_core::sc_in<sc_core::sc_time> clk_i;
|
||||||
|
|
|
@ -17,13 +17,13 @@
|
||||||
#ifndef _PRCI_H_
|
#ifndef _PRCI_H_
|
||||||
#define _PRCI_H_
|
#define _PRCI_H_
|
||||||
|
|
||||||
#include <sysc/tlm_target.h>
|
#include "scc/tlm_target.h"
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
class prci_regs;
|
class prci_regs;
|
||||||
|
|
||||||
class prci : public sc_core::sc_module, public tlm_target<> {
|
class prci : public sc_core::sc_module, public scc::tlm_target<> {
|
||||||
public:
|
public:
|
||||||
SC_HAS_PROCESS(prci);
|
SC_HAS_PROCESS(prci);
|
||||||
sc_core::sc_in<sc_core::sc_time> clk_i;
|
sc_core::sc_in<sc_core::sc_time> clk_i;
|
||||||
|
|
|
@ -17,13 +17,13 @@
|
||||||
#ifndef _SPI_H_
|
#ifndef _SPI_H_
|
||||||
#define _SPI_H_
|
#define _SPI_H_
|
||||||
|
|
||||||
#include <sysc/tlm_target.h>
|
#include "scc/tlm_target.h"
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
class spi_regs;
|
class spi_regs;
|
||||||
|
|
||||||
class spi : public sc_core::sc_module, public tlm_target<> {
|
class spi : public sc_core::sc_module, public scc::tlm_target<> {
|
||||||
public:
|
public:
|
||||||
SC_HAS_PROCESS(spi);
|
SC_HAS_PROCESS(spi);
|
||||||
sc_core::sc_in<sc_core::sc_time> clk_i;
|
sc_core::sc_in<sc_core::sc_time> clk_i;
|
||||||
|
|
|
@ -17,13 +17,13 @@
|
||||||
#ifndef _UART_H_
|
#ifndef _UART_H_
|
||||||
#define _UART_H_
|
#define _UART_H_
|
||||||
|
|
||||||
#include <sysc/tlm_target.h>
|
#include "scc/tlm_target.h"
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
class uart_regs;
|
class uart_regs;
|
||||||
|
|
||||||
class uart : public sc_core::sc_module, public tlm_target<> {
|
class uart : public sc_core::sc_module, public scc::tlm_target<> {
|
||||||
public:
|
public:
|
||||||
SC_HAS_PROCESS(uart);
|
SC_HAS_PROCESS(uart);
|
||||||
sc_core::sc_in<sc_core::sc_time> clk_i;
|
sc_core::sc_in<sc_core::sc_time> clk_i;
|
||||||
|
|
|
@ -26,10 +26,10 @@
|
||||||
#include <sr_report/sr_report.h>
|
#include <sr_report/sr_report.h>
|
||||||
#include <sstream>
|
#include <sstream>
|
||||||
#include <sysc/SiFive/platform.h>
|
#include <sysc/SiFive/platform.h>
|
||||||
#include <sysc/configurer.h>
|
#include "scc/configurer.h"
|
||||||
#include <sysc/report.h>
|
#include "scc/report.h"
|
||||||
#include <sysc/scv_tr_db.h>
|
#include "scc/scv_tr_db.h"
|
||||||
#include <sysc/tracer.h>
|
#include "scc/tracer.h"
|
||||||
|
|
||||||
using namespace sysc;
|
using namespace sysc;
|
||||||
namespace po = boost::program_options;
|
namespace po = boost::program_options;
|
||||||
|
@ -42,7 +42,7 @@ const size_t ERROR_UNHANDLED_EXCEPTION = 2;
|
||||||
|
|
||||||
int sc_main(int argc, char *argv[]) {
|
int sc_main(int argc, char *argv[]) {
|
||||||
// sc_report_handler::set_handler(my_report_handler);
|
// sc_report_handler::set_handler(my_report_handler);
|
||||||
sysc::Logger<>::reporting_level() = log::ERROR;
|
scc::Logger<>::reporting_level() = logging::ERROR;
|
||||||
///////////////////////////////////////////////////////////////////////////
|
///////////////////////////////////////////////////////////////////////////
|
||||||
// CLI argument parsing
|
// CLI argument parsing
|
||||||
///////////////////////////////////////////////////////////////////////////
|
///////////////////////////////////////////////////////////////////////////
|
||||||
|
@ -84,7 +84,7 @@ int sc_main(int argc, char *argv[]) {
|
||||||
LOGGER(DEFAULT)::reporting_level() = l;
|
LOGGER(DEFAULT)::reporting_level() = l;
|
||||||
LOGGER(connection)::reporting_level() = l;
|
LOGGER(connection)::reporting_level() = l;
|
||||||
LOGGER(SystemC)::reporting_level() = l;
|
LOGGER(SystemC)::reporting_level() = l;
|
||||||
sysc::Logger<>::reporting_level() = l;
|
scc::Logger<>::reporting_level() = l;
|
||||||
}
|
}
|
||||||
if (vm.count("log-file")) {
|
if (vm.count("log-file")) {
|
||||||
// configure the connection logger
|
// configure the connection logger
|
||||||
|
@ -100,12 +100,12 @@ int sc_main(int argc, char *argv[]) {
|
||||||
///////////////////////////////////////////////////////////////////////////
|
///////////////////////////////////////////////////////////////////////////
|
||||||
// set up tracing & transaction recording
|
// set up tracing & transaction recording
|
||||||
///////////////////////////////////////////////////////////////////////////
|
///////////////////////////////////////////////////////////////////////////
|
||||||
sysc::tracer trace("simple_system", static_cast<sysc::tracer::file_type>(vm["trace"].as<uint8_t>() >> 1),
|
scc::tracer trace("simple_system", static_cast<scc::tracer::file_type>(vm["trace"].as<uint8_t>() >> 1),
|
||||||
vm["trace"].as<uint8_t>() != 0);
|
vm["trace"].as<uint8_t>() != 0);
|
||||||
///////////////////////////////////////////////////////////////////////////
|
///////////////////////////////////////////////////////////////////////////
|
||||||
// set up configuration
|
// set up configuration
|
||||||
///////////////////////////////////////////////////////////////////////////
|
///////////////////////////////////////////////////////////////////////////
|
||||||
sysc::configurer cfg(vm["config-file"].as<std::string>());
|
scc::configurer cfg(vm["config-file"].as<std::string>());
|
||||||
///////////////////////////////////////////////////////////////////////////
|
///////////////////////////////////////////////////////////////////////////
|
||||||
// instantiate top level
|
// instantiate top level
|
||||||
///////////////////////////////////////////////////////////////////////////
|
///////////////////////////////////////////////////////////////////////////
|
||||||
|
|
|
@ -15,8 +15,9 @@
|
||||||
////////////////////////////////////////////////////////////////////////////////
|
////////////////////////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
#include "sysc/SiFive/aon.h"
|
#include "sysc/SiFive/aon.h"
|
||||||
|
|
||||||
|
#include "scc/utilities.h"
|
||||||
#include "sysc/SiFive/gen/aon_regs.h"
|
#include "sysc/SiFive/gen/aon_regs.h"
|
||||||
#include "sysc/utilities.h"
|
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
|
|
|
@ -15,8 +15,9 @@
|
||||||
////////////////////////////////////////////////////////////////////////////////
|
////////////////////////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
#include "sysc/SiFive/clint.h"
|
#include "sysc/SiFive/clint.h"
|
||||||
|
|
||||||
|
#include "scc/utilities.h"
|
||||||
#include "sysc/SiFive/gen/clint_regs.h"
|
#include "sysc/SiFive/gen/clint_regs.h"
|
||||||
#include "sysc/utilities.h"
|
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
|
@ -37,20 +38,20 @@ clint::clint(sc_core::sc_module_name nm)
|
||||||
SC_METHOD(reset_cb);
|
SC_METHOD(reset_cb);
|
||||||
sensitive << rst_i;
|
sensitive << rst_i;
|
||||||
dont_initialize();
|
dont_initialize();
|
||||||
regs->mtimecmp.set_write_cb([this](sc_register<uint64_t> ®, uint64_t data) -> bool {
|
regs->mtimecmp.set_write_cb([this](scc::sc_register<uint64_t> ®, uint64_t data) -> bool {
|
||||||
if (!regs->in_reset()) {
|
if (!regs->in_reset()) {
|
||||||
reg.put(data);
|
reg.put(data);
|
||||||
this->update_mtime();
|
this->update_mtime();
|
||||||
}
|
}
|
||||||
return true;
|
return true;
|
||||||
});
|
});
|
||||||
regs->mtime.set_read_cb([this](const sc_register<uint64_t> ®, uint64_t &data) -> bool {
|
regs->mtime.set_read_cb([this](const scc::sc_register<uint64_t> ®, uint64_t &data) -> bool {
|
||||||
this->update_mtime();
|
this->update_mtime();
|
||||||
data = reg.get();
|
data = reg.get();
|
||||||
return true;
|
return true;
|
||||||
});
|
});
|
||||||
regs->mtime.set_write_cb([this](sc_register<uint64_t> ®, uint64_t data) -> bool { return false; });
|
regs->mtime.set_write_cb([this](scc::sc_register<uint64_t> ®, uint64_t data) -> bool { return false; });
|
||||||
regs->msip.set_write_cb([this](sc_register<uint32_t> ®, uint32_t data) -> bool {
|
regs->msip.set_write_cb([this](scc::sc_register<uint32_t> ®, uint32_t data) -> bool {
|
||||||
reg.put(data);
|
reg.put(data);
|
||||||
msip_int_o.write(regs->r_msip.msip);
|
msip_int_o.write(regs->r_msip.msip);
|
||||||
return true;
|
return true;
|
||||||
|
|
|
@ -39,7 +39,8 @@
|
||||||
#include <iss/iss.h>
|
#include <iss/iss.h>
|
||||||
#include <iss/vm_types.h>
|
#include <iss/vm_types.h>
|
||||||
#include <sysc/SiFive/core_complex.h>
|
#include <sysc/SiFive/core_complex.h>
|
||||||
#include <sysc/report.h>
|
|
||||||
|
#include "scc/report.h"
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
namespace SiFive {
|
namespace SiFive {
|
||||||
|
|
|
@ -15,8 +15,9 @@
|
||||||
////////////////////////////////////////////////////////////////////////////////
|
////////////////////////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
#include "sysc/SiFive/gpio.h"
|
#include "sysc/SiFive/gpio.h"
|
||||||
|
|
||||||
|
#include "scc/utilities.h"
|
||||||
#include "sysc/SiFive/gen/gpio_regs.h"
|
#include "sysc/SiFive/gen/gpio_regs.h"
|
||||||
#include "sysc/utilities.h"
|
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
|
|
|
@ -15,8 +15,9 @@
|
||||||
////////////////////////////////////////////////////////////////////////////////
|
////////////////////////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
#include "sysc/SiFive/plic.h"
|
#include "sysc/SiFive/plic.h"
|
||||||
|
|
||||||
|
#include "scc/utilities.h"
|
||||||
#include "sysc/SiFive/gen/plic_regs.h"
|
#include "sysc/SiFive/gen/plic_regs.h"
|
||||||
#include "sysc/utilities.h"
|
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
|
|
|
@ -15,8 +15,9 @@
|
||||||
////////////////////////////////////////////////////////////////////////////////
|
////////////////////////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
#include "sysc/SiFive/prci.h"
|
#include "sysc/SiFive/prci.h"
|
||||||
|
|
||||||
|
#include "scc/utilities.h"
|
||||||
#include "sysc/SiFive/gen/prci_regs.h"
|
#include "sysc/SiFive/gen/prci_regs.h"
|
||||||
#include "sysc/utilities.h"
|
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
|
@ -36,14 +37,14 @@ prci::prci(sc_core::sc_module_name nm)
|
||||||
sensitive << hfrosc_en_evt;
|
sensitive << hfrosc_en_evt;
|
||||||
dont_initialize();
|
dont_initialize();
|
||||||
|
|
||||||
regs->hfrosccfg.set_write_cb([this](sysc::sc_register<uint32_t> ®, uint32_t data) -> bool {
|
regs->hfrosccfg.set_write_cb([this](scc::sc_register<uint32_t> ®, uint32_t data) -> bool {
|
||||||
reg.put(data);
|
reg.put(data);
|
||||||
if (this->regs->r_hfrosccfg & (1 << 30)) { // check rosc_en
|
if (this->regs->r_hfrosccfg & (1 << 30)) { // check rosc_en
|
||||||
this->hfrosc_en_evt.notify(1, sc_core::SC_US);
|
this->hfrosc_en_evt.notify(1, sc_core::SC_US);
|
||||||
}
|
}
|
||||||
return true;
|
return true;
|
||||||
});
|
});
|
||||||
regs->pllcfg.set_write_cb([this](sysc::sc_register<uint32_t> ®, uint32_t data) -> bool {
|
regs->pllcfg.set_write_cb([this](scc::sc_register<uint32_t> ®, uint32_t data) -> bool {
|
||||||
reg.put(data);
|
reg.put(data);
|
||||||
auto &pllcfg = this->regs->r_pllcfg;
|
auto &pllcfg = this->regs->r_pllcfg;
|
||||||
if (pllcfg.pllbypass == 0 && pllcfg.pllq != 0) { // set pll_lock if pll is selected
|
if (pllcfg.pllbypass == 0 && pllcfg.pllq != 0) { // set pll_lock if pll is selected
|
||||||
|
|
|
@ -15,8 +15,9 @@
|
||||||
////////////////////////////////////////////////////////////////////////////////
|
////////////////////////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
#include "sysc/SiFive/spi.h"
|
#include "sysc/SiFive/spi.h"
|
||||||
|
|
||||||
|
#include "scc/utilities.h"
|
||||||
#include "sysc/SiFive/gen/spi_regs.h"
|
#include "sysc/SiFive/gen/spi_regs.h"
|
||||||
#include "sysc/utilities.h"
|
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
|
|
|
@ -15,9 +15,10 @@
|
||||||
////////////////////////////////////////////////////////////////////////////////
|
////////////////////////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
#include "sysc/SiFive/uart.h"
|
#include "sysc/SiFive/uart.h"
|
||||||
|
|
||||||
|
#include "scc/report.h"
|
||||||
|
#include "scc/utilities.h"
|
||||||
#include "sysc/SiFive/gen/uart_regs.h"
|
#include "sysc/SiFive/gen/uart_regs.h"
|
||||||
#include "sysc/report.h"
|
|
||||||
#include "sysc/utilities.h"
|
|
||||||
|
|
||||||
namespace sysc {
|
namespace sysc {
|
||||||
|
|
||||||
|
@ -33,7 +34,7 @@ uart::uart(sc_core::sc_module_name nm)
|
||||||
SC_METHOD(reset_cb);
|
SC_METHOD(reset_cb);
|
||||||
sensitive << rst_i;
|
sensitive << rst_i;
|
||||||
dont_initialize();
|
dont_initialize();
|
||||||
regs->txdata.set_write_cb([this](sc_register<uint32_t> ®, uint32_t data) -> bool {
|
regs->txdata.set_write_cb([this](scc::sc_register<uint32_t> ®, uint32_t data) -> bool {
|
||||||
if (!this->regs->in_reset()) {
|
if (!this->regs->in_reset()) {
|
||||||
reg.put(data);
|
reg.put(data);
|
||||||
this->transmit_data();
|
this->transmit_data();
|
||||||
|
|
|
@ -893,10 +893,10 @@ iss::status riscv_hart_msu_vp<BASE>::read_mem(phys_addr_t paddr, unsigned length
|
||||||
const auto &p = mem(paddr.val / mem.page_size);
|
const auto &p = mem(paddr.val / mem.page_size);
|
||||||
auto offs = paddr.val & mem.page_addr_mask;
|
auto offs = paddr.val & mem.page_addr_mask;
|
||||||
std::copy(p.data() + offs, p.data() + offs + length, data);
|
std::copy(p.data() + offs, p.data() + offs + length, data);
|
||||||
|
}
|
||||||
|
}
|
||||||
return iss::Ok;
|
return iss::Ok;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
template <typename BASE>
|
template <typename BASE>
|
||||||
iss::status riscv_hart_msu_vp<BASE>::write_mem(phys_addr_t paddr, unsigned length, const uint8_t *const data) {
|
iss::status riscv_hart_msu_vp<BASE>::write_mem(phys_addr_t paddr, unsigned length, const uint8_t *const data) {
|
||||||
|
@ -911,22 +911,20 @@ iss::status riscv_hart_msu_vp<BASE>::write_mem(phys_addr_t paddr, unsigned lengt
|
||||||
std::cout << uart_buf.str();
|
std::cout << uart_buf.str();
|
||||||
uart_buf.str("");
|
uart_buf.str("");
|
||||||
}
|
}
|
||||||
return iss::Ok;
|
break;
|
||||||
case 0x10008000: { // HFROSC base, hfrosccfg reg
|
case 0x10008000: { // HFROSC base, hfrosccfg reg
|
||||||
mem_type::page_type &p = mem(paddr.val / mem.page_size);
|
mem_type::page_type &p = mem(paddr.val / mem.page_size);
|
||||||
size_t offs = paddr.val & mem.page_addr_mask;
|
size_t offs = paddr.val & mem.page_addr_mask;
|
||||||
std::copy(data, data + length, p.data() + offs);
|
std::copy(data, data + length, p.data() + offs);
|
||||||
uint8_t &x = *(p.data() + offs + 3);
|
uint8_t &x = *(p.data() + offs + 3);
|
||||||
if (x & 0x40) x |= 0x80; // hfroscrdy = 1 if hfroscen==1
|
if (x & 0x40) x |= 0x80; // hfroscrdy = 1 if hfroscen==1
|
||||||
return iss::Ok;
|
} break;
|
||||||
}
|
|
||||||
case 0x10008008: { // HFROSC base, pllcfg reg
|
case 0x10008008: { // HFROSC base, pllcfg reg
|
||||||
mem_type::page_type &p = mem(paddr.val / mem.page_size);
|
mem_type::page_type &p = mem(paddr.val / mem.page_size);
|
||||||
size_t offs = paddr.val & mem.page_addr_mask;
|
size_t offs = paddr.val & mem.page_addr_mask;
|
||||||
std::copy(data, data + length, p.data() + offs);
|
std::copy(data, data + length, p.data() + offs);
|
||||||
uint8_t &x = *(p.data() + offs + 3);
|
uint8_t &x = *(p.data() + offs + 3);
|
||||||
x |= 0x80; // set pll lock upon writing
|
x |= 0x80; // set pll lock upon writing
|
||||||
return iss::Ok;
|
|
||||||
} break;
|
} break;
|
||||||
default: {
|
default: {
|
||||||
mem_type::page_type &p = mem(paddr.val / mem.page_size);
|
mem_type::page_type &p = mem(paddr.val / mem.page_size);
|
||||||
|
@ -969,10 +967,10 @@ iss::status riscv_hart_msu_vp<BASE>::write_mem(phys_addr_t paddr, unsigned lengt
|
||||||
*reinterpret_cast<uint64_t *>(p.data() + (tohost & mem.page_addr_mask)) = fhostvar;
|
*reinterpret_cast<uint64_t *>(p.data() + (tohost & mem.page_addr_mask)) = fhostvar;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
return iss::Ok;
|
return iss::Ok;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
template <typename BASE> void riscv_hart_msu_vp<BASE>::check_interrupt() {
|
template <typename BASE> void riscv_hart_msu_vp<BASE>::check_interrupt() {
|
||||||
auto status = csr[mstatus];
|
auto status = csr[mstatus];
|
||||||
|
|
|
@ -1 +1 @@
|
||||||
Subproject commit 35379b77b6297557de15e37c009501dbdfc747f7
|
Subproject commit f1c733dc2caed17742feca32a275eb21d15a4c8d
|
Loading…
Reference in New Issue