introduces new decoder to interp backend
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b1306c3a47
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c6b99cd155
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@ -35,6 +35,7 @@ def nativeTypeSize(int size){
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}
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%>
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// clang-format off
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#include <cstdint>
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#include <iss/arch/${coreDef.name.toLowerCase()}.h>
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#include <iss/debugger/gdb_session.h>
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#include <iss/debugger/server.h>
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@ -47,6 +48,8 @@ def nativeTypeSize(int size){
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#include <exception>
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#include <vector>
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#include <sstream>
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#include <vm/instruction_decoder.h>
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#ifndef FMT_HEADER_ONLY
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#define FMT_HEADER_ONLY
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@ -152,25 +155,20 @@ private:
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* start opcode definitions
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****************************************************************************/
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struct instruction_descriptor {
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size_t length;
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uint32_t length;
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uint32_t value;
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uint32_t mask;
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typename arch::traits<ARCH>::opcode_e op;
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};
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struct decoding_tree_node{
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std::vector<instruction_descriptor> instrs;
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std::vector<decoding_tree_node*> children;
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uint32_t submask = std::numeric_limits<uint32_t>::max();
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uint32_t value;
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decoding_tree_node(uint32_t value) : value(value){}
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};
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decoding_tree_node* root {nullptr};
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const std::array<instruction_descriptor, ${instructions.size()}> instr_descr = {{
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/* entries are: size, valid value, valid mask, function ptr */<%instructions.each{instr -> %>
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{${instr.length}, ${instr.encoding}, ${instr.mask}, arch::traits<ARCH>::opcode_e::${instr.instruction.name}},<%}%>
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}};
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//needs to be declared after instr_descr
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decoder instr_decoder;
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iss::status fetch_ins(virt_addr_t pc, uint8_t * data){
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if(this->core.has_mmu()) {
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auto phys_pc = this->core.virt2phys(pc);
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@ -190,58 +188,6 @@ private:
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}
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return iss::Ok;
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}
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void populate_decoding_tree(decoding_tree_node* root){
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//create submask
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for(auto instr: root->instrs){
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root->submask &= instr.mask;
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}
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//put each instr according to submask&encoding into children
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for(auto instr: root->instrs){
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bool foundMatch = false;
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for(auto child: root->children){
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//use value as identifying trait
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if(child->value == (instr.value&root->submask)){
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child->instrs.push_back(instr);
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foundMatch = true;
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}
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}
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if(!foundMatch){
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decoding_tree_node* child = new decoding_tree_node(instr.value&root->submask);
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child->instrs.push_back(instr);
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root->children.push_back(child);
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}
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}
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root->instrs.clear();
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//call populate_decoding_tree for all children
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if(root->children.size() >1)
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for(auto child: root->children){
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populate_decoding_tree(child);
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}
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else{
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//sort instrs by value of the mask, this works bc we want to have the least restrictive one last
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std::sort(root->children[0]->instrs.begin(), root->children[0]->instrs.end(), [](const instruction_descriptor& instr1, const instruction_descriptor& instr2) {
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return instr1.mask > instr2.mask;
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});
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}
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}
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typename arch::traits<ARCH>::opcode_e decode_instr(decoding_tree_node* node, code_word_t word){
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if(!node->children.size()){
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if(node->instrs.size() == 1) return node->instrs[0].op;
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for(auto instr : node->instrs){
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if((instr.mask&word) == instr.value) return instr.op;
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}
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}
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else{
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for(auto child : node->children){
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if (child->value == (node->submask&word)){
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return decode_instr(child, word);
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}
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}
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}
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return arch::traits<ARCH>::opcode_e::MAX_OPCODE;
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}
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};
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template <typename CODE_WORD> void debug_fn(CODE_WORD insn) {
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@ -267,13 +213,16 @@ constexpr size_t bit_count(uint32_t u) {
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template <typename ARCH>
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vm_impl<ARCH>::vm_impl(ARCH &core, unsigned core_id, unsigned cluster_id)
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: vm_base<ARCH>(core, core_id, cluster_id) {
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root = new decoding_tree_node(std::numeric_limits<uint32_t>::max());
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for(auto instr:instr_descr){
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root->instrs.push_back(instr);
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: vm_base<ARCH>(core, core_id, cluster_id)
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, instr_decoder([this]() {
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std::vector<generic_instruction_descriptor> g_instr_descr;
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g_instr_descr.reserve(instr_descr.size());
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for (uint32_t i = 0; i < instr_descr.size(); ++i) {
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generic_instruction_descriptor new_instr_descr {instr_descr[i].value, instr_descr[i].mask, i};
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g_instr_descr.push_back(new_instr_descr);
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}
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populate_decoding_tree(root);
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}
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return std::move(g_instr_descr);
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}()) {}
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inline bool is_icount_limit_enabled(finish_cond_e cond){
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return (cond & finish_cond_e::ICOUNT_LIMIT) == finish_cond_e::ICOUNT_LIMIT;
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@ -310,7 +259,11 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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} else {
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if (is_jump_to_self_enabled(cond) &&
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(instr == 0x0000006f || (instr&0xffff)==0xa001)) throw simulation_stopped(0); // 'J 0' or 'C.J 0'
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auto inst_id = decode_instr(root, instr);
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uint32_t inst_index = instr_decoder.decode_instr(instr);
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opcode_e inst_id = arch::traits<ARCH>::opcode_e::MAX_OPCODE;;
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if(inst_index <instr_descr.size())
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inst_id = instr_descr.at(instr_decoder.decode_instr(instr)).op;
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// pre execution stuff
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this->core.reg.last_branch = 0;
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if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, static_cast<unsigned>(inst_id));
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@ -46,6 +46,7 @@
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#include <sstream>
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#include <vm/instruction_decoder.h>
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#ifndef FMT_HEADER_ONLY
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#define FMT_HEADER_ONLY
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#endif
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@ -153,6 +154,7 @@ private:
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uint32_t mask;
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typename arch::traits<ARCH>::opcode_e op;
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};
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const std::array<instruction_descriptor, 87> instr_descr = {{
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/* entries are: size, valid value, valid mask, function ptr */
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{32, 0b00000000000000000000000000110111, 0b00000000000000000000000001111111, arch::traits<ARCH>::opcode_e::LUI},
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@ -243,6 +245,7 @@ private:
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{16, 0b1100000000000010, 0b1110000000000011, arch::traits<ARCH>::opcode_e::C__SWSP},
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{16, 0b0000000000000000, 0b1111111111111111, arch::traits<ARCH>::opcode_e::DII},
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}};
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//needs to be declared after instr_descr
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decoder instr_decoder;
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