DBT-RISE/DBT-RISE-TGC
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updates vms with fixed Zc in tgc5c.core_desc

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Eyck-Alexander Jentzsch
2024-07-10 12:43:43 +02:00
parent b2cbf90d0b
commit ac8f8b0539
3 changed files with 189 additions and 215 deletions
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6
src/vm/asmjit/vm_tgc5c.cpp
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@ -4333,7 +4333,8 @@ private:
cc.comment("//behavior:");
/*generate behavior*/
if(rs1&&rs1<static_cast<uint32_t>(traits::RFS)){
auto PC_val_v = gen_operation(cc, band, load_reg_from_mem(jh, traits::X0 + rs1%static_cast<uint32_t>(traits::RFS)), ~ 1)
auto addr_mask = (uint32_t)- 2;
auto PC_val_v = gen_operation(cc, band, load_reg_from_mem(jh, traits::X0 + rs1%static_cast<uint32_t>(traits::RFS)), addr_mask)
;
mov(cc, jh.next_pc, PC_val_v);
mov(cc, get_ptr_for(jh, traits::LAST_BRANCH), 32U);
@ -4464,10 +4465,11 @@ private:
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
}
else{
auto addr_mask = (uint32_t)- 2;
auto new_pc = load_reg_from_mem(jh, traits::X0 + rs1);
mov(cc, get_ptr_for(jh, traits::X0+ 1),
(uint32_t)(PC+2));
auto PC_val_v = gen_operation(cc, band, new_pc, ~ 1)
auto PC_val_v = gen_operation(cc, band, new_pc, addr_mask)
;
mov(cc, jh.next_pc, PC_val_v);
mov(cc, get_ptr_for(jh, traits::LAST_BRANCH), 32U);