add code word access for ISS plugins

gen_input/templates/CORENAME.h.gtl

@@ -37,7 +37,7 @@ def nativeTypeSize(int size){
 }
 def getRegisterSizes(){
     def regs = registers.collect{nativeTypeSize(it.size)}
-    regs+=[32,32, 64, 64, 64] // append TRAP_STATE, PENDING_TRAP, ICOUNT, CYCLE, INSTRET
+    regs+=[32,32, 64, 64, 64, 32] // append TRAP_STATE, PENDING_TRAP, ICOUNT, CYCLE, INSTRET, INSTRUCTION
     return regs
 }
 def getRegisterOffsets(){
@@ -96,7 +96,8 @@ template <> struct traits<${coreDef.name.toLowerCase()}> {
         PENDING_TRAP,
         ICOUNT,
         CYCLE,
-        INSTRET
+        INSTRET,
+        INSTRUCTION
     };
 
     using reg_t = uint${addrDataWidth}_t;
@@ -170,6 +171,7 @@ struct ${coreDef.name.toLowerCase()}: public arch_if {
         uint32_t trap_state = 0, pending_trap = 0;
         uint64_t icount = 0;
         uint64_t instret = 0;
+        uint32_t instruction = 0; 
         uint32_t last_branch;
     } reg;
 #pragma pack(pop)