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fixes CSR/CLIC implementation

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Eyck Jentzsch
2023-03-10 20:40:21 +01:00
parent ec55efd322
commit a83928fd8c
3 changed files with 42 additions and 23 deletions
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src/iss/arch/riscv_hart_common.h
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@@ -114,7 +114,7 @@ enum riscv_csr {
mtval = 0x343,
mip = 0x344,
mxnti = 0x345, //CLIC
mintstatus = 0x346, // MRW Current interrupt levels (CLIC) - addr subject to change
mintstatus = 0xFB1, // MRW Current interrupt levels (CLIC) - addr subject to change
mintthresh = 0x347, // MRW Interrupt-level threshold (CLIC) - addr subject to change
mscratchcsw = 0x348, // MRW Conditional scratch swap on priv mode change (CLIC)
mscratchcswl = 0x349, // MRW Conditional scratch swap on level change (CLIC)