DBT-RISE/DBT-RISE-TGC
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Generate and integrate TGF cores in Ecosystem-VP. Remove obsolete cores

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This commit is contained in:
Stanislaw Kaushanski
2020-08-24 15:01:54 +02:00
parent 03172e352d
commit 9754e3953f
39 changed files with 944 additions and 72865 deletions
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13
src/sysc/core_complex.cpp
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@@ -31,9 +31,8 @@
*******************************************************************************/
#include "sysc/core_complex.h"
#include "iss/arch/riscv_hart_msu_vp.h"
//#include "iss/arch/rv32imac.h"
#include "iss/arch/mnrv32.h"
#include "iss/arch/riscv_hart_m_p.h"
#include "iss/arch/tgf01.h"
#include "iss/debugger/encoderdecoder.h"
#include "iss/debugger/gdb_session.h"
#include "iss/debugger/server.h"
@@ -61,7 +60,7 @@ iss::debugger::encoder_decoder encdec;
}
//using core_type = iss::arch::rv32imac;
using core_type = iss::arch::mnrv32;
using core_type = iss::arch::tgf01;
namespace {
@@ -91,9 +90,9 @@ std::array<const char*, 12> irq_str = { {
"User external interrupt", "Supervisor external interrupt", "Reserved", "Machine external interrupt" } };
}
class core_wrapper : public iss::arch::riscv_hart_msu_vp<core_type> {
class core_wrapper : public iss::arch::riscv_hart_m_p<core_type> {
public:
using base_type = arch::riscv_hart_msu_vp<core_type>;
using base_type = arch::riscv_hart_m_p<core_type>;
using phys_addr_t = typename arch::traits<core_type>::phys_addr_t;
core_wrapper(core_complex *owner)
: owner(owner)
@@ -287,7 +286,7 @@ vm_ptr create_cpu(core_wrapper* cpu, std::string const& backend, unsigned gdb_po
}
void core_complex::before_end_of_elaboration() {
SCCDEBUG(SCMOD)<<"instantiating iss::arch::mnrv32 with "<<backend.get_value()<<" backend";
SCCDEBUG(SCMOD)<<"instantiating iss::arch::tgf with "<<backend.get_value()<<" backend";
cpu = scc::make_unique<core_wrapper>(this);
vm = create_cpu(cpu.get(), backend.get_value(), gdb_server_port.get_value());
#ifdef WITH_SCV