DBT-RISE/DBT-RISE-TGC
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[WIP] implement basic infrastructure

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This commit is contained in:
Eyck Jentzsch
2020-04-12 12:44:30 +02:00
parent 50663a2fbc
commit 8cdf50d69e
3 changed files with 132 additions and 139 deletions
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4
src/main.cpp
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@@ -105,7 +105,9 @@ int main(int argc, char *argv[]) {
std::unique_ptr<iss::arch_if> cpu{nullptr};
std::string isa_opt(clim["isa"].as<std::string>());
iss::arch::mnrv32* lcpu = new iss::arch::riscv_hart_msu_vp<iss::arch::mnrv32>();
vm = iss::interp::create(lcpu, clim["gdb-port"].as<unsigned>()); //iss::llvm::create(lcpu, clim["gdb-port"].as<unsigned>());
//vm = iss::interp::create(lcpu, clim["gdb-port"].as<unsigned>());
//vm = iss::llvm::create(lcpu, clim["gdb-port"].as<unsigned>());
vm = iss::tcc::create(lcpu, clim["gdb-port"].as<unsigned>());
cpu.reset(lcpu);
if (clim.count("plugin")) {
for (std::string opt_val : clim["plugin"].as<std::vector<std::string>>()) {