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adds UserProvidedFunctions for NaNBoxing, updates generated files, adapts to new fp API

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Eyck-Alexander Jentzsch
2025-04-02 10:19:11 +02:00
parent 8f5d666b7d
commit 7e97329e78
8 changed files with 412 additions and 265 deletions
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33
gen_input/templates/asmjit/CORENAME.cpp.gtl
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@ -117,7 +117,36 @@ protected:
return (from & mask) | ((from & sign_mask) ? ~mask : 0);
}
<%functions.each{ it.eachLine { %>
${it}<%}%>
${it}<%}
}
if(fcsr != null) {%>
x86_reg_t NaNBox16(jit_holder& jh , x86_reg_t NaNBox16_val){
x86::Compiler& cc = jh.cc;
if(static_cast<uint32_t>(traits::FLEN) == 16)
return gen_ext(cc, NaNBox16_val, traits::FLEN, false);
else {
auto box = gen_operation(cc, bnot, (gen_ext(cc, 0, traits::FLEN, false)));
return gen_ext(cc, (gen_operation(jh.cc, bor, gen_ext(jh.cc, gen_operation(jh.cc, shl, box, 16), traits::FLEN, false), gen_ext(jh.cc, NaNBox16_val, traits::FLEN, false))), traits::FLEN, false);
}
}
x86_reg_t NaNBox32(jit_holder& jh , x86_reg_t NaNBox32_val){
x86::Compiler& cc = jh.cc;
if(static_cast<uint32_t>(traits::FLEN) == 32)
return gen_ext(cc, NaNBox32_val, traits::FLEN, false);
else {
auto box = gen_operation(cc, bnot, (gen_ext(cc, 0, /* we need to shift for 32 so need larger dt*/ 64, false)));
return gen_ext(cc, (gen_operation(jh.cc, bor, gen_ext(jh.cc, gen_operation(jh.cc, shl, box, 32), traits::FLEN, false), gen_ext(jh.cc, NaNBox32_val, traits::FLEN, false))), traits::FLEN, false);
}
}
x86_reg_t NaNBox64(jit_holder& jh , x86_reg_t NaNBox64_val){
x86::Compiler& cc = jh.cc;
if(static_cast<uint32_t>(traits::FLEN) == 64)
return gen_ext(cc, NaNBox64_val, traits::FLEN, false);
else {
auto box = gen_operation(cc, bnot, (gen_ext(cc, 0, /* we need to shift for 32 so need larger dt*/ 128, false)));
return gen_ext(cc, (gen_operation(jh.cc, bor, gen_ext(jh.cc, gen_operation(jh.cc, shl, box, 64), traits::FLEN, false), gen_ext(jh.cc, NaNBox64_val, traits::FLEN, false))), traits::FLEN, false);
}
}
<%}%>
private:
/****************************************************************************
@ -226,8 +255,6 @@ continuation_e vm_impl<ARCH>::gen_single_inst_behavior(virt_addr_t &pc, jit_hold
code_word_t instr = 0;
phys_addr_t paddr(pc);
auto *const data = (uint8_t *)&instr;
if(this->core.has_mmu())
paddr = this->core.virt2phys(pc);
auto res = this->core.read(paddr, 4, data);
if (res != iss::Ok)
return ILLEGAL_FETCH;