Archived
reorganized layout to only contain risc-v stuff
This commit is contained in:
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eb8365f4c3
commit
67d9beb7bd
133 files changed
+1460
-9277
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@@ -187,7 +187,11 @@
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</configuration>
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</configuration>
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||||||
</storageModule>
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</storageModule>
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||||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
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<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||||
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
|
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings">
|
||||||
|
<doc-comment-owner id="org.eclipse.cdt.ui.doxygen">
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||||||
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<path value=""/>
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||||||
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</doc-comment-owner>
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||||||
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</storageModule>
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||||||
<storageModule moduleId="scannerConfiguration">
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<storageModule moduleId="scannerConfiguration">
|
||||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
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||||||
<scannerConfigBuildInfo instanceId="cdt.managedbuild.config.gnu.exe.debug.119132886.1995486963;cdt.managedbuild.config.gnu.exe.debug.119132886.1995486963.;cdt.managedbuild.tool.gnu.cpp.compiler.base.64491626;cdt.managedbuild.tool.gnu.cpp.compiler.input.550087631">
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<scannerConfigBuildInfo instanceId="cdt.managedbuild.config.gnu.exe.debug.119132886.1995486963;cdt.managedbuild.config.gnu.exe.debug.119132886.1995486963.;cdt.managedbuild.tool.gnu.cpp.compiler.base.64491626;cdt.managedbuild.tool.gnu.cpp.compiler.input.550087631">
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@@ -30,3 +30,4 @@ language.settings.xml
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/.gdbinit
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/.gdbinit
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||||||
/*.out
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/*.out
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||||||
/dump.json
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/dump.json
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||||||
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/src-gen/
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||||||
-12
@@ -1,12 +0,0 @@
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[submodule "dbt-core"]
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path = dbt-core
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||||||
url = https://git.minres.com/DBT-RISE/DBT-RISE-Core.git
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|
||||||
[submodule "sc-components"]
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path = sc-components
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|
||||||
url = https://git.minres.com/SystemC/SystemC-Components.git
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||||||
[submodule "external/elfio"]
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||||||
path = external/elfio
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||||||
url = http://git.code.sf.net/p/elfio/code
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||||||
[submodule "external/libGIS"]
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path = external/libGIS
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||||||
url = https://github.com/vsergeev/libGIS.git
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|
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+54
-119
@@ -1,119 +1,54 @@
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|||||||
cmake_minimum_required(VERSION 3.3)
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cmake_minimum_required(VERSION 3.3)
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||||||
set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/cmake ${CMAKE_CURRENT_SOURCE_DIR}/sc-components/cmake)
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set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/../cmake) # main (top) cmake dir
|
||||||
|
set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/cmake) # project specific cmake dir
|
||||||
set(ENABLE_SCV TRUE CACHE BOOL "Enable use of SCV")
|
|
||||||
set(ENABLE_SHARED TRUE CACHE BOOL "Build shared libraries")
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# CMake useful variables
|
||||||
|
set(CMAKE_RUNTIME_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/bin")
|
||||||
include(GitFunctions)
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set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/lib")
|
||||||
get_branch_from_git()
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set(CMAKE_LIBRARY_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/lib")
|
||||||
# if we are not on master or develop set the submodules to develop
|
|
||||||
IF(NOT ${GIT_BRANCH} MATCHES "master")
|
add_subdirectory(softfloat)
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||||||
IF(NOT ${GIT_BRANCH} MATCHES "develop")
|
|
||||||
message(STATUS "main branch is '${GIT_BRANCH}', setting submodules to 'develop'")
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# Set the name of your project here
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||||||
set(GIT_BRANCH develop)
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project("riscv")
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endif()
|
|
||||||
endif()
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include(Common)
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||||||
|
|
||||||
### set the directory names of the submodules
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conan_basic_setup()
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set(GIT_SUBMODULES elfio libGIS sc-components dbt-core)
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set(GIT_SUBMODULE_DIR_sc-components .)
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# This sets the include directory for the reference project. This is the -I flag in gcc.
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set(GIT_SUBMODULE_DIR_dbt-core .)
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include_directories(
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||||||
### set each submodules's commit or tag that is to be checked out
|
${PROJECT_SOURCE_DIR}/incl
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||||||
### (leave empty if you want master)
|
${SOFTFLOAT_INCLUDE_DIRS}
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||||||
#set(GIT_SUBMODULE_VERSION_sc-comp 3af6b9836589b082c19d9131c5d0b7afa8ddd7cd)
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${LLVM_INCLUDE_DIRS}
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||||||
set(GIT_SUBMODULE_BRANCH_sc-components ${GIT_BRANCH})
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)
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||||||
set(GIT_SUBMODULE_BRANCH_dbt-core ${GIT_BRANCH})
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add_dependent_subproject(dbt-core)
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||||||
|
add_dependent_subproject(sc-components)
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||||||
include(GNUInstallDirs)
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include_directories(
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include(Submodules)
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${PROJECT_SOURCE_DIR}/incl
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include(Conan)
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${PROJECT_SOURCE_DIR}/../external/elfio
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||||||
|
${PROJECT_SOURCE_DIR}/../external/libGIS
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||||||
#enable_testing()
|
${Boost_INCLUDE_DIRS}
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||||||
|
)
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||||||
set(CMAKE_CXX_STANDARD 14)
|
|
||||||
set(CMAKE_CXX_STANDARD_REQUIRED ON)
|
|
||||||
set(CMAKE_CXX_EXTENSIONS OFF)
|
# Mac needed variables (adapt for your needs - http://www.cmake.org/Wiki/CMake_RPATH_handling#Mac_OS_X_and_the_RPATH)
|
||||||
set(CMAKE_POSITION_INDEPENDENT_CODE ON)
|
set(CMAKE_MACOSX_RPATH ON)
|
||||||
|
set(CMAKE_SKIP_BUILD_RPATH FALSE)
|
||||||
include(CheckCXXCompilerFlag)
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set(CMAKE_BUILD_WITH_INSTALL_RPATH FALSE)
|
||||||
CHECK_CXX_COMPILER_FLAG("-march=native" COMPILER_SUPPORTS_MARCH_NATIVE)
|
set(CMAKE_INSTALL_RPATH "${CMAKE_INSTALL_PREFIX}/lib")
|
||||||
if(COMPILER_SUPPORTS_MARCH_NATIVE)
|
set(CMAKE_INSTALL_RPATH_USE_LINK_PATH TRUE)
|
||||||
if("${CMAKE_BUILD_TYPE}" STREQUAL "")
|
|
||||||
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=native")
|
add_subdirectory(src)
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||||||
elseif(NOT(${CMAKE_BUILD_TYPE} STREQUAL "RelWithDebInfo"))
|
|
||||||
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=native")
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#
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||||||
endif()
|
# SYSTEM PACKAGING (RPM, TGZ, ...)
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||||||
endif()
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# _____________________________________________________________________________
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||||||
|
|
||||||
if ("${CMAKE_CXX_COMPILER_ID}" STREQUAL "GNU" OR "${CMAKE_CXX_COMPILER_ID}" STREQUAL "Clang")
|
#include(CPackConfig)
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||||||
set(warnings "-Wall -Wextra -Werror")
|
|
||||||
#set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -D_GLIBCXX_USE_CXX11_ABI=0")
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#
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||||||
set(CMAKE_CXX_FLAGS_RELEASE "-O3 -DNDEBUG")
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# CMAKE PACKAGING (for other CMake projects to use this one easily)
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||||||
set(CMAKE_C_FLAGS_RELEASE "-O3 -DNDEBUG")
|
# _____________________________________________________________________________
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||||||
elseif ("${CMAKE_CXX_COMPILER_ID}" STREQUAL "MSVC")
|
|
||||||
set(warnings "/W4 /WX /EHsc")
|
#include(PackageConfigurator)
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||||||
endif()
|
|
||||||
|
|
||||||
setup_conan()
|
|
||||||
|
|
||||||
# This line finds the boost lib and headers.
|
|
||||||
set(Boost_NO_BOOST_CMAKE ON) # Don't do a find_package in config mode before searching for a regular boost install.
|
|
||||||
find_package(Boost COMPONENTS program_options system thread filesystem REQUIRED)
|
|
||||||
|
|
||||||
if(DEFINED ENV{LLVM_HOME})
|
|
||||||
find_path (LLVM_DIR LLVM-Config.cmake $ENV{LLVM_HOME}/lib/cmake/llvm)
|
|
||||||
endif(DEFINED ENV{LLVM_HOME})
|
|
||||||
find_package(LLVM REQUIRED CONFIG)
|
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||||||
message(STATUS "Found LLVM ${LLVM_PACKAGE_VERSION}")
|
|
||||||
message(STATUS "Using LLVMConfig.cmake in: ${LLVM_DIR}")
|
|
||||||
llvm_map_components_to_libnames(llvm_libs support core mcjit x86codegen x86asmparser)
|
|
||||||
|
|
||||||
find_package(Threads)
|
|
||||||
find_package(Tcmalloc)
|
|
||||||
find_package(ZLIB)
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|
||||||
find_package(SystemC)
|
|
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if(SystemC_FOUND)
|
|
||||||
message(STATUS "SystemC headers at ${SystemC_INCLUDE_DIRS}")
|
|
||||||
message(STATUS "SystemC library at ${SystemC_LIBRARY_DIRS}")
|
|
||||||
if(SCV_FOUND)
|
|
||||||
message(STATUS "SCV headers at ${SCV_INCLUDE_DIRS}")
|
|
||||||
message(STATUS "SCV library at ${SCV_LIBRARY_DIRS}")
|
|
||||||
endif(SCV_FOUND)
|
|
||||||
if(CCI_FOUND)
|
|
||||||
message(STATUS "CCI headers at ${CCI_INCLUDE_DIRS}")
|
|
||||||
message(STATUS "CCI library at ${CCI_LIBRARY_DIRS}")
|
|
||||||
endif()
|
|
||||||
endif(SystemC_FOUND)
|
|
||||||
|
|
||||||
set(PROJECT_3PARTY_DIRS external)
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|
||||||
include(clang-format)
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|
||||||
|
|
||||||
set(ENABLE_CLANG_TIDY OFF CACHE BOOL "Add clang-tidy automatically to builds")
|
|
||||||
if (ENABLE_CLANG_TIDY)
|
|
||||||
find_program (CLANG_TIDY_EXE NAMES "clang-tidy" PATHS /usr/local/opt/llvm/bin )
|
|
||||||
if (CLANG_TIDY_EXE)
|
|
||||||
message(STATUS "clang-tidy found: ${CLANG_TIDY_EXE}")
|
|
||||||
set(CLANG_TIDY_CHECKS "-*,modernize-*")
|
|
||||||
set(CMAKE_CXX_CLANG_TIDY "${CLANG_TIDY_EXE};-checks=${CLANG_TIDY_CHECKS};-header-filter='${CMAKE_SOURCE_DIR}/*';-fix"
|
|
||||||
CACHE STRING "" FORCE)
|
|
||||||
else()
|
|
||||||
message(AUTHOR_WARNING "clang-tidy not found!")
|
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||||||
set(CMAKE_CXX_CLANG_TIDY "" CACHE STRING "" FORCE) # delete it
|
|
||||||
endif()
|
|
||||||
endif()
|
|
||||||
|
|
||||||
# Set the version number of your project here (format is MAJOR.MINOR.PATCHLEVEL - e.g. 1.0.0)
|
|
||||||
set(VERSION_MAJOR "1")
|
|
||||||
set(VERSION_MINOR "0")
|
|
||||||
set(VERSION_PATCH "0")
|
|
||||||
set(VERSION ${VERSION_MAJOR}.${VERSION_MINOR}.${VERSION_PATCH})
|
|
||||||
|
|
||||||
add_subdirectory(external)
|
|
||||||
add_subdirectory(dbt-core)
|
|
||||||
add_subdirectory(sc-components)
|
|
||||||
add_subdirectory(softfloat)
|
|
||||||
GET_DIRECTORY_PROPERTY(SOFTFLOAT_INCLUDE_DIRS DIRECTORY softfloat DEFINITION SOFTFLOAT_INCLUDE_DIRS)
|
|
||||||
add_subdirectory(riscv)
|
|
||||||
add_subdirectory(platform)
|
|
||||||
|
|
||||||
message(STATUS "Build Type: ${CMAKE_BUILD_TYPE}")
|
|
||||||
@@ -0,0 +1,119 @@
|
|||||||
|
cmake_minimum_required(VERSION 3.3)
|
||||||
|
set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/cmake ${CMAKE_CURRENT_SOURCE_DIR}/sc-components/cmake)
|
||||||
|
|
||||||
|
set(ENABLE_SCV TRUE CACHE BOOL "Enable use of SCV")
|
||||||
|
set(ENABLE_SHARED TRUE CACHE BOOL "Build shared libraries")
|
||||||
|
|
||||||
|
include(GitFunctions)
|
||||||
|
get_branch_from_git()
|
||||||
|
# if we are not on master or develop set the submodules to develop
|
||||||
|
IF(NOT ${GIT_BRANCH} MATCHES "master")
|
||||||
|
IF(NOT ${GIT_BRANCH} MATCHES "develop")
|
||||||
|
message(STATUS "main branch is '${GIT_BRANCH}', setting submodules to 'develop'")
|
||||||
|
set(GIT_BRANCH develop)
|
||||||
|
endif()
|
||||||
|
endif()
|
||||||
|
|
||||||
|
### set the directory names of the submodules
|
||||||
|
set(GIT_SUBMODULES elfio libGIS sc-components dbt-core)
|
||||||
|
set(GIT_SUBMODULE_DIR_sc-components .)
|
||||||
|
set(GIT_SUBMODULE_DIR_dbt-core .)
|
||||||
|
### set each submodules's commit or tag that is to be checked out
|
||||||
|
### (leave empty if you want master)
|
||||||
|
#set(GIT_SUBMODULE_VERSION_sc-comp 3af6b9836589b082c19d9131c5d0b7afa8ddd7cd)
|
||||||
|
set(GIT_SUBMODULE_BRANCH_sc-components ${GIT_BRANCH})
|
||||||
|
set(GIT_SUBMODULE_BRANCH_dbt-core ${GIT_BRANCH})
|
||||||
|
|
||||||
|
include(GNUInstallDirs)
|
||||||
|
include(Submodules)
|
||||||
|
include(Conan)
|
||||||
|
|
||||||
|
#enable_testing()
|
||||||
|
|
||||||
|
set(CMAKE_CXX_STANDARD 14)
|
||||||
|
set(CMAKE_CXX_STANDARD_REQUIRED ON)
|
||||||
|
set(CMAKE_CXX_EXTENSIONS OFF)
|
||||||
|
set(CMAKE_POSITION_INDEPENDENT_CODE ON)
|
||||||
|
|
||||||
|
include(CheckCXXCompilerFlag)
|
||||||
|
CHECK_CXX_COMPILER_FLAG("-march=native" COMPILER_SUPPORTS_MARCH_NATIVE)
|
||||||
|
if(COMPILER_SUPPORTS_MARCH_NATIVE)
|
||||||
|
if("${CMAKE_BUILD_TYPE}" STREQUAL "")
|
||||||
|
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=native")
|
||||||
|
elseif(NOT(${CMAKE_BUILD_TYPE} STREQUAL "RelWithDebInfo"))
|
||||||
|
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=native")
|
||||||
|
endif()
|
||||||
|
endif()
|
||||||
|
|
||||||
|
if ("${CMAKE_CXX_COMPILER_ID}" STREQUAL "GNU" OR "${CMAKE_CXX_COMPILER_ID}" STREQUAL "Clang")
|
||||||
|
set(warnings "-Wall -Wextra -Werror")
|
||||||
|
#set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -D_GLIBCXX_USE_CXX11_ABI=0")
|
||||||
|
set(CMAKE_CXX_FLAGS_RELEASE "-O3 -DNDEBUG")
|
||||||
|
set(CMAKE_C_FLAGS_RELEASE "-O3 -DNDEBUG")
|
||||||
|
elseif ("${CMAKE_CXX_COMPILER_ID}" STREQUAL "MSVC")
|
||||||
|
set(warnings "/W4 /WX /EHsc")
|
||||||
|
endif()
|
||||||
|
|
||||||
|
setup_conan()
|
||||||
|
|
||||||
|
# This line finds the boost lib and headers.
|
||||||
|
set(Boost_NO_BOOST_CMAKE ON) # Don't do a find_package in config mode before searching for a regular boost install.
|
||||||
|
find_package(Boost COMPONENTS program_options system thread filesystem REQUIRED)
|
||||||
|
|
||||||
|
if(DEFINED ENV{LLVM_HOME})
|
||||||
|
find_path (LLVM_DIR LLVM-Config.cmake $ENV{LLVM_HOME}/lib/cmake/llvm)
|
||||||
|
endif(DEFINED ENV{LLVM_HOME})
|
||||||
|
find_package(LLVM REQUIRED CONFIG)
|
||||||
|
message(STATUS "Found LLVM ${LLVM_PACKAGE_VERSION}")
|
||||||
|
message(STATUS "Using LLVMConfig.cmake in: ${LLVM_DIR}")
|
||||||
|
llvm_map_components_to_libnames(llvm_libs support core mcjit x86codegen x86asmparser)
|
||||||
|
|
||||||
|
find_package(Threads)
|
||||||
|
find_package(Tcmalloc)
|
||||||
|
find_package(ZLIB)
|
||||||
|
find_package(SystemC)
|
||||||
|
if(SystemC_FOUND)
|
||||||
|
message(STATUS "SystemC headers at ${SystemC_INCLUDE_DIRS}")
|
||||||
|
message(STATUS "SystemC library at ${SystemC_LIBRARY_DIRS}")
|
||||||
|
if(SCV_FOUND)
|
||||||
|
message(STATUS "SCV headers at ${SCV_INCLUDE_DIRS}")
|
||||||
|
message(STATUS "SCV library at ${SCV_LIBRARY_DIRS}")
|
||||||
|
endif(SCV_FOUND)
|
||||||
|
if(CCI_FOUND)
|
||||||
|
message(STATUS "CCI headers at ${CCI_INCLUDE_DIRS}")
|
||||||
|
message(STATUS "CCI library at ${CCI_LIBRARY_DIRS}")
|
||||||
|
endif()
|
||||||
|
endif(SystemC_FOUND)
|
||||||
|
|
||||||
|
set(PROJECT_3PARTY_DIRS external)
|
||||||
|
include(clang-format)
|
||||||
|
|
||||||
|
set(ENABLE_CLANG_TIDY OFF CACHE BOOL "Add clang-tidy automatically to builds")
|
||||||
|
if (ENABLE_CLANG_TIDY)
|
||||||
|
find_program (CLANG_TIDY_EXE NAMES "clang-tidy" PATHS /usr/local/opt/llvm/bin )
|
||||||
|
if (CLANG_TIDY_EXE)
|
||||||
|
message(STATUS "clang-tidy found: ${CLANG_TIDY_EXE}")
|
||||||
|
set(CLANG_TIDY_CHECKS "-*,modernize-*")
|
||||||
|
set(CMAKE_CXX_CLANG_TIDY "${CLANG_TIDY_EXE};-checks=${CLANG_TIDY_CHECKS};-header-filter='${CMAKE_SOURCE_DIR}/*';-fix"
|
||||||
|
CACHE STRING "" FORCE)
|
||||||
|
else()
|
||||||
|
message(AUTHOR_WARNING "clang-tidy not found!")
|
||||||
|
set(CMAKE_CXX_CLANG_TIDY "" CACHE STRING "" FORCE) # delete it
|
||||||
|
endif()
|
||||||
|
endif()
|
||||||
|
|
||||||
|
# Set the version number of your project here (format is MAJOR.MINOR.PATCHLEVEL - e.g. 1.0.0)
|
||||||
|
set(VERSION_MAJOR "1")
|
||||||
|
set(VERSION_MINOR "0")
|
||||||
|
set(VERSION_PATCH "0")
|
||||||
|
set(VERSION ${VERSION_MAJOR}.${VERSION_MINOR}.${VERSION_PATCH})
|
||||||
|
|
||||||
|
add_subdirectory(external)
|
||||||
|
add_subdirectory(dbt-core)
|
||||||
|
add_subdirectory(sc-components)
|
||||||
|
add_subdirectory(softfloat)
|
||||||
|
GET_DIRECTORY_PROPERTY(SOFTFLOAT_INCLUDE_DIRS DIRECTORY softfloat DEFINITION SOFTFLOAT_INCLUDE_DIRS)
|
||||||
|
add_subdirectory(riscv)
|
||||||
|
add_subdirectory(platform)
|
||||||
|
|
||||||
|
message(STATUS "Build Type: ${CMAKE_BUILD_TYPE}")
|
||||||
@@ -1,6 +0,0 @@
|
|||||||
mkdir -f build/Release
|
|
||||||
cd build/Release
|
|
||||||
cmake ../.. -DCMAKE_BUILD_TYPE=RelWithDebInfo && \
|
|
||||||
cmake --build . && \
|
|
||||||
bin/riscv --reset=0x20400000 --verbose=4 $HOME/eclipse-workspace/RiscV-dhrystone/dhrystone
|
|
||||||
|
|
||||||
@@ -1,20 +0,0 @@
|
|||||||
# Function to link between sub-projects
|
|
||||||
function(add_dependent_subproject subproject_name)
|
|
||||||
#if (NOT TARGET ${subproject_name}) # target unknown
|
|
||||||
if(NOT PROJECT_${subproject_name}) # var unknown because we build only this subproject
|
|
||||||
find_package(${subproject_name} CONFIG REQUIRED)
|
|
||||||
else () # we know the target thus we are doing a build from the top directory
|
|
||||||
include_directories(../${subproject_name}/incl)
|
|
||||||
endif ()
|
|
||||||
endfunction(add_dependent_subproject)
|
|
||||||
|
|
||||||
# Make sure we tell the topdir CMakeLists that we exist (if build from topdir)
|
|
||||||
get_directory_property(hasParent PARENT_DIRECTORY)
|
|
||||||
if(hasParent)
|
|
||||||
set(PROJECT_${PROJECT_NAME} true PARENT_SCOPE)
|
|
||||||
endif()
|
|
||||||
|
|
||||||
# Function to link between sub-projects
|
|
||||||
function(add_dependent_header subproject_name)
|
|
||||||
include_directories(../${subproject_name}/incl)
|
|
||||||
endfunction(add_dependent_header)
|
|
||||||
@@ -1,46 +0,0 @@
|
|||||||
macro(setup_conan)
|
|
||||||
find_program(conan conan)
|
|
||||||
if(NOT EXISTS ${conan})
|
|
||||||
message(FATAL_ERROR "Conan is required. Please see README.md")
|
|
||||||
return()
|
|
||||||
endif()
|
|
||||||
|
|
||||||
if(${CMAKE_HOST_SYSTEM_NAME} STREQUAL Darwin)
|
|
||||||
set(os Macos)
|
|
||||||
else()
|
|
||||||
set(os ${CMAKE_HOST_SYSTEM_NAME})
|
|
||||||
endif()
|
|
||||||
|
|
||||||
if(${CMAKE_CXX_COMPILER_ID} STREQUAL GNU)
|
|
||||||
set(compiler gcc)
|
|
||||||
elseif(${CMAKE_CXX_COMPILER_ID} STREQUAL AppleClang)
|
|
||||||
set(compiler apple-clang)
|
|
||||||
else()
|
|
||||||
message(FATAL_ERROR "Unknown compiler: ${CMAKE_CXX_COMPILER_ID}")
|
|
||||||
endif()
|
|
||||||
|
|
||||||
string(SUBSTRING ${CMAKE_CXX_COMPILER_VERSION} 0 3 compiler_version)
|
|
||||||
|
|
||||||
set(conanfile ${CMAKE_SOURCE_DIR}/conanfile.txt)
|
|
||||||
set(conanfile_cmake ${CMAKE_BINARY_DIR}/conanbuildinfo.cmake)
|
|
||||||
set(compiler_libcxx libstdc++11)
|
|
||||||
|
|
||||||
if("${CMAKE_BUILD_TYPE}" STREQUAL "")
|
|
||||||
set(CONAN_BUILD_TYPE Debug)
|
|
||||||
elseif("${CMAKE_BUILD_TYPE}" STREQUAL "RelWithDebInfo")
|
|
||||||
set(CONAN_BUILD_TYPE Release)
|
|
||||||
else()
|
|
||||||
set(CONAN_BUILD_TYPE ${CMAKE_BUILD_TYPE})
|
|
||||||
endif()
|
|
||||||
|
|
||||||
execute_process(COMMAND ${conan} install --build=missing
|
|
||||||
-s build_type=${CONAN_BUILD_TYPE} -s compiler.libcxx=${compiler_libcxx}
|
|
||||||
${CMAKE_SOURCE_DIR} RESULT_VARIABLE return_code)
|
|
||||||
if(NOT ${return_code} EQUAL 0)
|
|
||||||
message(FATAL_ERROR "conan install command failed.")
|
|
||||||
endif()
|
|
||||||
|
|
||||||
include(${conanfile_cmake})
|
|
||||||
#conan_basic_setup(TARGETS)
|
|
||||||
conan_basic_setup()
|
|
||||||
endmacro()
|
|
||||||
@@ -1,24 +0,0 @@
|
|||||||
function(PrepareDocTarget)
|
|
||||||
|
|
||||||
# Configure the doxygen config file with current settings:
|
|
||||||
configure_file(documentation-config.doxygen.in ${CMAKE_CURRENT_BINARY_DIR}/documentation-config.doxygen @ONLY)
|
|
||||||
|
|
||||||
# Set the name of the target : "doc" if it doesn't already exist and "doc<projectname>" if it does.
|
|
||||||
# This way we make sure to have a single "doc" target. Either it is the one of the top directory or
|
|
||||||
# it is the one of the subproject that we are compiling alone.
|
|
||||||
set(DOC_TARGET_NAME "doc")
|
|
||||||
if(TARGET doc)
|
|
||||||
set(DOC_TARGET_NAME "doc${PROJECT_NAME}")
|
|
||||||
endif()
|
|
||||||
|
|
||||||
add_custom_target(${DOC_TARGET_NAME} ${TARGET_ALL}
|
|
||||||
${DOXYGEN_EXECUTABLE} ${CMAKE_CURRENT_BINARY_DIR}/documentation-config.doxygen
|
|
||||||
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
|
|
||||||
COMMENT "Generating API documentation using doxygen for ${PROJECT_NAME}" VERBATIM)
|
|
||||||
|
|
||||||
set(INSTALL_DOC_DIR ${CMAKE_BINARY_DIR}/doc/${PROJECT_NAME}/html)
|
|
||||||
file(MAKE_DIRECTORY ${INSTALL_DOC_DIR}) # needed for install
|
|
||||||
|
|
||||||
install(DIRECTORY ${INSTALL_DOC_DIR} DESTINATION share/${PROJECT_NAME}-${VERSION_MAJOR} COMPONENT doc)
|
|
||||||
|
|
||||||
endfunction()
|
|
||||||
@@ -1,38 +0,0 @@
|
|||||||
# - Find Tcmalloc
|
|
||||||
# Find the native Tcmalloc library
|
|
||||||
#
|
|
||||||
# Tcmalloc_LIBRARIES - List of libraries when using Tcmalloc.
|
|
||||||
# Tcmalloc_FOUND - True if Tcmalloc found.
|
|
||||||
|
|
||||||
if (USE_TCMALLOC)
|
|
||||||
set(Tcmalloc_NAMES tcmalloc)
|
|
||||||
else ()
|
|
||||||
set(Tcmalloc_NAMES tcmalloc_minimal tcmalloc tcmalloc_minimal4 libtcmalloc_minimal.so.4)
|
|
||||||
endif ()
|
|
||||||
|
|
||||||
find_library(Tcmalloc_LIBRARY NO_DEFAULT_PATH
|
|
||||||
NAMES ${Tcmalloc_NAMES}
|
|
||||||
PATHS ${HT_DEPENDENCY_LIB_DIR} /lib /usr/lib /usr/lib/x86_64-linux-gnu /usr/local/lib /opt/local/lib
|
|
||||||
)
|
|
||||||
|
|
||||||
if (Tcmalloc_LIBRARY)
|
|
||||||
set(Tcmalloc_FOUND TRUE)
|
|
||||||
set( Tcmalloc_LIBRARIES ${Tcmalloc_LIBRARY} )
|
|
||||||
else ()
|
|
||||||
set(Tcmalloc_FOUND FALSE)
|
|
||||||
set( Tcmalloc_LIBRARIES )
|
|
||||||
endif ()
|
|
||||||
|
|
||||||
if (Tcmalloc_FOUND)
|
|
||||||
message(STATUS "Found Tcmalloc: ${Tcmalloc_LIBRARY}")
|
|
||||||
else ()
|
|
||||||
message(STATUS "Not Found Tcmalloc: ${Tcmalloc_LIBRARY}")
|
|
||||||
if (Tcmalloc_FIND_REQUIRED)
|
|
||||||
message(STATUS "Looked for Tcmalloc libraries named ${Tcmalloc_NAMES}.")
|
|
||||||
message(FATAL_ERROR "Could NOT find Tcmalloc library")
|
|
||||||
endif ()
|
|
||||||
endif ()
|
|
||||||
|
|
||||||
mark_as_advanced(
|
|
||||||
Tcmalloc_LIBRARY
|
|
||||||
)
|
|
||||||
@@ -1,130 +0,0 @@
|
|||||||
# - Returns a version string from Git
|
|
||||||
#
|
|
||||||
# These functions force a re-configure on each git commit so that you can
|
|
||||||
# trust the values of the variables in your build system.
|
|
||||||
#
|
|
||||||
# get_git_head_revision(<refspecvar> <hashvar> [<additional arguments to git describe> ...])
|
|
||||||
#
|
|
||||||
# Returns the refspec and sha hash of the current head revision
|
|
||||||
#
|
|
||||||
# git_describe(<var> [<additional arguments to git describe> ...])
|
|
||||||
#
|
|
||||||
# Returns the results of git describe on the source tree, and adjusting
|
|
||||||
# the output so that it tests false if an error occurs.
|
|
||||||
#
|
|
||||||
# git_get_exact_tag(<var> [<additional arguments to git describe> ...])
|
|
||||||
#
|
|
||||||
# Returns the results of git describe --exact-match on the source tree,
|
|
||||||
# and adjusting the output so that it tests false if there was no exact
|
|
||||||
# matching tag.
|
|
||||||
#
|
|
||||||
# Requires CMake 2.6 or newer (uses the 'function' command)
|
|
||||||
#
|
|
||||||
# Original Author:
|
|
||||||
# 2009-2010 Ryan Pavlik <rpavlik@iastate.edu> <abiryan@ryand.net>
|
|
||||||
# http://academic.cleardefinition.com
|
|
||||||
# Iowa State University HCI Graduate Program/VRAC
|
|
||||||
#
|
|
||||||
# Copyright Iowa State University 2009-2010.
|
|
||||||
# Distributed under the Boost Software License, Version 1.0.
|
|
||||||
# (See accompanying file LICENSE_1_0.txt or copy at
|
|
||||||
# http://www.boost.org/LICENSE_1_0.txt)
|
|
||||||
|
|
||||||
if(__get_git_revision_description)
|
|
||||||
return()
|
|
||||||
endif()
|
|
||||||
set(__get_git_revision_description YES)
|
|
||||||
|
|
||||||
# We must run the following at "include" time, not at function call time,
|
|
||||||
# to find the path to this module rather than the path to a calling list file
|
|
||||||
get_filename_component(_gitdescmoddir ${CMAKE_CURRENT_LIST_FILE} PATH)
|
|
||||||
|
|
||||||
function(get_git_head_revision _refspecvar _hashvar)
|
|
||||||
set(GIT_PARENT_DIR "${CMAKE_CURRENT_LIST_DIR}")
|
|
||||||
set(GIT_DIR "${GIT_PARENT_DIR}/.git")
|
|
||||||
while(NOT EXISTS "${GIT_DIR}") # .git dir not found, search parent directories
|
|
||||||
set(GIT_PREVIOUS_PARENT "${GIT_PARENT_DIR}")
|
|
||||||
get_filename_component(GIT_PARENT_DIR ${GIT_PARENT_DIR} PATH)
|
|
||||||
if(GIT_PARENT_DIR STREQUAL GIT_PREVIOUS_PARENT)
|
|
||||||
# We have reached the root directory, we are not in git
|
|
||||||
set(${_refspecvar} "GITDIR-NOTFOUND" PARENT_SCOPE)
|
|
||||||
set(${_hashvar} "GITDIR-NOTFOUND" PARENT_SCOPE)
|
|
||||||
return()
|
|
||||||
endif()
|
|
||||||
set(GIT_DIR "${GIT_PARENT_DIR}/.git")
|
|
||||||
endwhile()
|
|
||||||
# check if this is a submodule
|
|
||||||
if(NOT IS_DIRECTORY ${GIT_DIR})
|
|
||||||
file(READ ${GIT_DIR} submodule)
|
|
||||||
string(REGEX REPLACE "gitdir: (.*)\n$" "\\1" GIT_DIR_RELATIVE ${submodule})
|
|
||||||
get_filename_component(SUBMODULE_DIR ${GIT_DIR} PATH)
|
|
||||||
get_filename_component(GIT_DIR ${SUBMODULE_DIR}/${GIT_DIR_RELATIVE} ABSOLUTE)
|
|
||||||
endif()
|
|
||||||
set(GIT_DATA "${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/git-data")
|
|
||||||
if(NOT EXISTS "${GIT_DATA}")
|
|
||||||
file(MAKE_DIRECTORY "${GIT_DATA}")
|
|
||||||
endif()
|
|
||||||
|
|
||||||
if(NOT EXISTS "${GIT_DIR}/HEAD")
|
|
||||||
return()
|
|
||||||
endif()
|
|
||||||
set(HEAD_FILE "${GIT_DATA}/HEAD")
|
|
||||||
configure_file("${GIT_DIR}/HEAD" "${HEAD_FILE}" COPYONLY)
|
|
||||||
|
|
||||||
configure_file("${_gitdescmoddir}/GetGitRevisionDescription.cmake.in"
|
|
||||||
"${GIT_DATA}/grabRef.cmake"
|
|
||||||
@ONLY)
|
|
||||||
include("${GIT_DATA}/grabRef.cmake")
|
|
||||||
|
|
||||||
set(${_refspecvar} "${HEAD_REF}" PARENT_SCOPE)
|
|
||||||
set(${_hashvar} "${HEAD_HASH}" PARENT_SCOPE)
|
|
||||||
endfunction()
|
|
||||||
|
|
||||||
function(git_describe _var)
|
|
||||||
if(NOT GIT_FOUND)
|
|
||||||
find_package(Git QUIET)
|
|
||||||
endif()
|
|
||||||
get_git_head_revision(refspec hash)
|
|
||||||
if(NOT GIT_FOUND)
|
|
||||||
set(${_var} "GIT-NOTFOUND" PARENT_SCOPE)
|
|
||||||
return()
|
|
||||||
endif()
|
|
||||||
if(NOT hash)
|
|
||||||
set(${_var} "HEAD-HASH-NOTFOUND" PARENT_SCOPE)
|
|
||||||
return()
|
|
||||||
endif()
|
|
||||||
|
|
||||||
# TODO sanitize
|
|
||||||
#if((${ARGN}" MATCHES "&&") OR
|
|
||||||
# (ARGN MATCHES "||") OR
|
|
||||||
# (ARGN MATCHES "\\;"))
|
|
||||||
# message("Please report the following error to the project!")
|
|
||||||
# message(FATAL_ERROR "Looks like someone's doing something nefarious with git_describe! Passed arguments ${ARGN}")
|
|
||||||
#endif()
|
|
||||||
|
|
||||||
#message(STATUS "Arguments to execute_process: ${ARGN}")
|
|
||||||
|
|
||||||
execute_process(COMMAND
|
|
||||||
"${GIT_EXECUTABLE}"
|
|
||||||
describe
|
|
||||||
${hash}
|
|
||||||
${ARGN}
|
|
||||||
WORKING_DIRECTORY
|
|
||||||
"${CMAKE_SOURCE_DIR}"
|
|
||||||
RESULT_VARIABLE
|
|
||||||
res
|
|
||||||
OUTPUT_VARIABLE
|
|
||||||
out
|
|
||||||
ERROR_QUIET
|
|
||||||
OUTPUT_STRIP_TRAILING_WHITESPACE)
|
|
||||||
if(NOT res EQUAL 0)
|
|
||||||
set(out "${out}-${res}-NOTFOUND")
|
|
||||||
endif()
|
|
||||||
|
|
||||||
set(${_var} "${out}" PARENT_SCOPE)
|
|
||||||
endfunction()
|
|
||||||
|
|
||||||
function(git_get_exact_tag _var)
|
|
||||||
git_describe(out --exact-match ${ARGN})
|
|
||||||
set(${_var} "${out}" PARENT_SCOPE)
|
|
||||||
endfunction()
|
|
||||||
@@ -1,41 +0,0 @@
|
|||||||
#
|
|
||||||
# Internal file for GetGitRevisionDescription.cmake
|
|
||||||
#
|
|
||||||
# Requires CMake 2.6 or newer (uses the 'function' command)
|
|
||||||
#
|
|
||||||
# Original Author:
|
|
||||||
# 2009-2010 Ryan Pavlik <rpavlik@iastate.edu> <abiryan@ryand.net>
|
|
||||||
# http://academic.cleardefinition.com
|
|
||||||
# Iowa State University HCI Graduate Program/VRAC
|
|
||||||
#
|
|
||||||
# Copyright Iowa State University 2009-2010.
|
|
||||||
# Distributed under the Boost Software License, Version 1.0.
|
|
||||||
# (See accompanying file LICENSE_1_0.txt or copy at
|
|
||||||
# http://www.boost.org/LICENSE_1_0.txt)
|
|
||||||
|
|
||||||
set(HEAD_HASH)
|
|
||||||
|
|
||||||
file(READ "@HEAD_FILE@" HEAD_CONTENTS LIMIT 1024)
|
|
||||||
|
|
||||||
string(STRIP "${HEAD_CONTENTS}" HEAD_CONTENTS)
|
|
||||||
if(HEAD_CONTENTS MATCHES "ref")
|
|
||||||
# named branch
|
|
||||||
string(REPLACE "ref: " "" HEAD_REF "${HEAD_CONTENTS}")
|
|
||||||
if(EXISTS "@GIT_DIR@/${HEAD_REF}")
|
|
||||||
configure_file("@GIT_DIR@/${HEAD_REF}" "@GIT_DATA@/head-ref" COPYONLY)
|
|
||||||
else()
|
|
||||||
configure_file("@GIT_DIR@/packed-refs" "@GIT_DATA@/packed-refs" COPYONLY)
|
|
||||||
file(READ "@GIT_DATA@/packed-refs" PACKED_REFS)
|
|
||||||
if(${PACKED_REFS} MATCHES "([0-9a-z]*) ${HEAD_REF}")
|
|
||||||
set(HEAD_HASH "${CMAKE_MATCH_1}")
|
|
||||||
endif()
|
|
||||||
endif()
|
|
||||||
else()
|
|
||||||
# detached HEAD
|
|
||||||
configure_file("@GIT_DIR@/HEAD" "@GIT_DATA@/head-ref" COPYONLY)
|
|
||||||
endif()
|
|
||||||
|
|
||||||
if(NOT HEAD_HASH)
|
|
||||||
file(READ "@GIT_DATA@/head-ref" HEAD_HASH LIMIT 1024)
|
|
||||||
string(STRIP "${HEAD_HASH}" HEAD_HASH)
|
|
||||||
endif()
|
|
||||||
@@ -1,22 +0,0 @@
|
|||||||
if(__git_functions)
|
|
||||||
return()
|
|
||||||
endif()
|
|
||||||
set(__git_functions YES)
|
|
||||||
|
|
||||||
function( get_branch_from_git )
|
|
||||||
execute_process(
|
|
||||||
COMMAND git rev-parse --abbrev-ref HEAD
|
|
||||||
WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}
|
|
||||||
RESULT_VARIABLE git_result
|
|
||||||
OUTPUT_VARIABLE git_branch
|
|
||||||
ERROR_VARIABLE git_error
|
|
||||||
OUTPUT_STRIP_TRAILING_WHITESPACE
|
|
||||||
ERROR_STRIP_TRAILING_WHITESPACE
|
|
||||||
)
|
|
||||||
if( NOT git_result EQUAL 0 )
|
|
||||||
message( FATAL_ERROR "Failed to execute Git: ${git_error}" )
|
|
||||||
endif()
|
|
||||||
|
|
||||||
set( GIT_BRANCH ${git_branch} PARENT_SCOPE )
|
|
||||||
endfunction( get_branch_from_git )
|
|
||||||
|
|
||||||
@@ -1,44 +0,0 @@
|
|||||||
# Create package-config files :
|
|
||||||
# - <projectname>ConfigVersion.cmake
|
|
||||||
# - <projectname>Config.cmake
|
|
||||||
# They are installed in lib/cmake/<projectname>.
|
|
||||||
#
|
|
||||||
# Required variables :
|
|
||||||
# - VERSION
|
|
||||||
# - PROJECT_NAME
|
|
||||||
#
|
|
||||||
|
|
||||||
# Include needed for 'write_basic_package_version_file'
|
|
||||||
include(CMakePackageConfigHelpers)
|
|
||||||
|
|
||||||
write_basic_package_version_file(
|
|
||||||
"${CMAKE_CURRENT_BINARY_DIR}/cmake/${PROJECT_NAME}ConfigVersion.cmake"
|
|
||||||
VERSION ${VERSION}
|
|
||||||
COMPATIBILITY AnyNewerVersion
|
|
||||||
)
|
|
||||||
|
|
||||||
configure_file(cmake/${PROJECT_NAME}Config.cmake
|
|
||||||
"${CMAKE_CURRENT_BINARY_DIR}/cmake/${PROJECT_NAME}Config.cmake"
|
|
||||||
COPYONLY
|
|
||||||
)
|
|
||||||
|
|
||||||
# Destination
|
|
||||||
set(config_install_dir lib/cmake/${PROJECT_NAME})
|
|
||||||
|
|
||||||
# Config installation
|
|
||||||
# * <prefix>/lib/cmake/<project>/<project>Targets.cmake
|
|
||||||
install(
|
|
||||||
EXPORT ${PROJECT_NAME}Targets
|
|
||||||
DESTINATION ${config_install_dir}
|
|
||||||
)
|
|
||||||
|
|
||||||
# Config installation
|
|
||||||
# * <prefix>/lib/cmake/<project>/<project>Config.cmake
|
|
||||||
# * <prefix>/lib/cmake/<project>/<project>ConfigVersion.cmake
|
|
||||||
install(
|
|
||||||
FILES
|
|
||||||
cmake/${PROJECT_NAME}Config.cmake
|
|
||||||
"${CMAKE_CURRENT_BINARY_DIR}/cmake/${PROJECT_NAME}ConfigVersion.cmake"
|
|
||||||
DESTINATION ${config_install_dir}
|
|
||||||
COMPONENT devel
|
|
||||||
)
|
|
||||||
@@ -1,57 +0,0 @@
|
|||||||
if(EXISTS "${PROJECT_SOURCE_DIR}/.gitmodules")
|
|
||||||
message(STATUS "Updating submodules to their latest/fixed versions")
|
|
||||||
message(STATUS "(this can take a while, please be patient)")
|
|
||||||
|
|
||||||
### First, get all submodules in
|
|
||||||
if(${GIT_SUBMODULES_CHECKOUT_QUIET})
|
|
||||||
execute_process(
|
|
||||||
COMMAND git submodule update --init --recursive
|
|
||||||
WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}
|
|
||||||
OUTPUT_QUIET
|
|
||||||
ERROR_QUIET
|
|
||||||
)
|
|
||||||
else()
|
|
||||||
execute_process(
|
|
||||||
COMMAND git submodule update --init --recursive
|
|
||||||
WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}
|
|
||||||
)
|
|
||||||
endif()
|
|
||||||
|
|
||||||
### Then, checkout each submodule to the specified commit
|
|
||||||
# Note: Execute separate processes here, to make sure each one is run,
|
|
||||||
# should one crash (because of branch not existing, this, that ... whatever)
|
|
||||||
foreach(GIT_SUBMODULE ${GIT_SUBMODULES})
|
|
||||||
|
|
||||||
if( "${GIT_SUBMODULE_VERSION_${GIT_SUBMODULE}}" STREQUAL "" )
|
|
||||||
message(STATUS "no specific version given for submodule ${GIT_SUBMODULE}, checking out master")
|
|
||||||
if( "${GIT_SUBMODULE_BRANCH_${GIT_SUBMODULE}}" STREQUAL "" )
|
|
||||||
set(GIT_SUBMODULE_VERSION_${GIT_SUBMODULE} "master")
|
|
||||||
else()
|
|
||||||
set(GIT_SUBMODULE_VERSION_${GIT_SUBMODULE} ${GIT_SUBMODULE_BRANCH_${GIT_SUBMODULE}})
|
|
||||||
endif()
|
|
||||||
endif()
|
|
||||||
|
|
||||||
if( "${GIT_SUBMODULE_DIR_${GIT_SUBMODULE}}" STREQUAL "" )
|
|
||||||
set(GIT_SUBMODULES_DIRECTORY external)
|
|
||||||
else()
|
|
||||||
set(GIT_SUBMODULES_DIRECTORY ${GIT_SUBMODULE_DIR_${GIT_SUBMODULE}})
|
|
||||||
endif()
|
|
||||||
|
|
||||||
if(${GIT_SUBMODULES_CHECKOUT_QUIET})
|
|
||||||
execute_process(
|
|
||||||
COMMAND git checkout ${GIT_SUBMODULE_VERSION_${GIT_SUBMODULE}}
|
|
||||||
WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}/${GIT_SUBMODULES_DIRECTORY}/${GIT_SUBMODULE}
|
|
||||||
OUTPUT_QUIET
|
|
||||||
ERROR_QUIET
|
|
||||||
)
|
|
||||||
else()
|
|
||||||
message(STATUS "checking out ${GIT_SUBMODULE}'s commit/tag ${GIT_SUBMODULE_VERSION_${GIT_SUBMODULE}}")
|
|
||||||
execute_process(
|
|
||||||
COMMAND git checkout ${GIT_SUBMODULE_VERSION_${GIT_SUBMODULE}}
|
|
||||||
WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}/${GIT_SUBMODULES_DIRECTORY}/${GIT_SUBMODULE}
|
|
||||||
)
|
|
||||||
endif()
|
|
||||||
|
|
||||||
endforeach(${GIT_SUBMODULE})
|
|
||||||
|
|
||||||
endif()
|
|
||||||
@@ -1,19 +0,0 @@
|
|||||||
[requires]
|
|
||||||
gsl_microsoft/20180102@bincrafters/stable
|
|
||||||
spdlog/0.16.3@bincrafters/stable
|
|
||||||
fmt/5.2.1@bincrafters/stable
|
|
||||||
Seasocks/1.3.2@minres/stable
|
|
||||||
SystemC/2.3.2@minres/stable
|
|
||||||
SystemCVerification/2.0.1@minres/stable
|
|
||||||
SystemC-CCI/1.0.0@minres/stable
|
|
||||||
|
|
||||||
[generators]
|
|
||||||
cmake
|
|
||||||
|
|
||||||
[options]
|
|
||||||
Seasocks:shared=True
|
|
||||||
fmt:header_only=True
|
|
||||||
SystemC:stdcxx=14
|
|
||||||
SystemC:shared=True
|
|
||||||
SystemCVerification:stdcxx=14
|
|
||||||
SystemC-CCI:stdcxx=14
|
|
||||||
-1728
File diff suppressed because it is too large.
Load diff
-1
Submodule dbt-core deleted from 2f4aab87b0.
@@ -1,8 +0,0 @@
|
|||||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
|
||||||
<launchConfiguration type="org.eclipse.ui.externaltools.ProgramLaunchConfigurationType">
|
|
||||||
<stringAttribute key="org.eclipse.debug.core.ATTR_REFRESH_SCOPE" value="${working_set:<?xml version="1.0" encoding="UTF-8"?> <resources> <item path="/dbt-riscv/riscv" type="2"/> </resources>}"/>
|
|
||||||
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_LAUNCH_CONFIGURATION_BUILD_SCOPE" value="${none}"/>
|
|
||||||
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_LOCATION" value="/usr/bin/java"/>
|
|
||||||
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_TOOL_ARGUMENTS" value="-Xmx1G -jar ${env_var:HOME}/git/JIT-ISS-CoreDsl/com.minres.coredsl.standalone/target/com.minres.coredsl.standalone-1.0.0-SNAPSHOT.jar -i=${project_loc:DBT-RISE-RISCV}/riscv/incl/iss/arch -s=${project_loc:DBT-RISE-RISCV}/riscv/src/iss -v=${project_loc:DBT-RISE-RISCV}/riscv/src/internal -t=${project_loc:DBT-RISE-RISCV}/riscv/gen_input/templates ${project_loc:DBT-RISE-RISCV}/riscv/gen_input/minres_rv.core_desc"/>
|
|
||||||
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_WORKING_DIRECTORY" value="${workspace_loc:/DBT-RISE-RISCV}/riscv/gen_input"/>
|
|
||||||
</launchConfiguration>
|
|
||||||
@@ -1,15 +0,0 @@
|
|||||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
|
||||||
<launchConfiguration type="org.eclipse.ui.externaltools.ProgramLaunchConfigurationType">
|
|
||||||
<booleanAttribute key="de.toem.impulse.launchactivateLaunch" value="false"/>
|
|
||||||
<booleanAttribute key="de.toem.impulse.launchactivateTermination" value="false"/>
|
|
||||||
<intAttribute key="de.toem.impulse.launchdelayLaunch" value="0"/>
|
|
||||||
<intAttribute key="de.toem.impulse.launchlaunch" value="2"/>
|
|
||||||
<intAttribute key="de.toem.impulse.launchmode" value="3"/>
|
|
||||||
<stringAttribute key="de.toem.impulse.launchport" value=""/>
|
|
||||||
<booleanAttribute key="de.toem.impulse.launchrestart" value="true"/>
|
|
||||||
<intAttribute key="de.toem.impulse.launchterminate" value="1"/>
|
|
||||||
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_LAUNCH_CONFIGURATION_BUILD_SCOPE" value="${none}"/>
|
|
||||||
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_LOCATION" value="${workspace_loc:/DBT-RISE-RISCV/etc/cmake.sh}"/>
|
|
||||||
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_TOOL_ARGUMENTS" value="-DCMAKE_BUILD_TYPE=Debug .."/>
|
|
||||||
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_WORKING_DIRECTORY" value="${workspace_loc:/DBT-RISE-RISCV}"/>
|
|
||||||
</launchConfiguration>
|
|
||||||
@@ -1,7 +0,0 @@
|
|||||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
|
||||||
<launchConfiguration type="org.eclipse.ui.externaltools.ProgramLaunchConfigurationType">
|
|
||||||
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_LAUNCH_CONFIGURATION_BUILD_SCOPE" value="${none}"/>
|
|
||||||
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_LOCATION" value="${workspace_loc:/dbt-riscv/etc/cmake.sh}"/>
|
|
||||||
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_TOOL_ARGUMENTS" value="-DCMAKE_BUILD_TYPE=Release .."/>
|
|
||||||
<stringAttribute key="org.eclipse.ui.externaltools.ATTR_WORKING_DIRECTORY" value="${workspace_loc:/dbt-riscv}"/>
|
|
||||||
</launchConfiguration>
|
|
||||||
@@ -1,47 +0,0 @@
|
|||||||
#!/bin/sh
|
|
||||||
#******************************************************************************
|
|
||||||
# Copyright (C) 2018 MINRES Technologies GmbH
|
|
||||||
# All rights reserved.
|
|
||||||
#
|
|
||||||
# Redistribution and use in source and binary forms, with or without
|
|
||||||
# modification, are permitted provided that the following conditions are met:
|
|
||||||
#
|
|
||||||
# 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
# this list of conditions and the following disclaimer.
|
|
||||||
#
|
|
||||||
# 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
# this list of conditions and the following disclaimer in the documentation
|
|
||||||
# and/or other materials provided with the distribution.
|
|
||||||
#
|
|
||||||
# 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
# may be used to endorse or promote products derived from this software
|
|
||||||
# without specific prior written permission.
|
|
||||||
#
|
|
||||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
# POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
#
|
|
||||||
#******************************************************************************/
|
|
||||||
##
|
|
||||||
|
|
||||||
if [ -n "$1" ]; then
|
|
||||||
suffix=$1
|
|
||||||
else
|
|
||||||
suffix=Debug
|
|
||||||
fi
|
|
||||||
cwd=`pwd`
|
|
||||||
for i in $*; do
|
|
||||||
if echo "$i" | grep 'CMAKE_BUILD_TYPE='; then
|
|
||||||
suffix=`echo $i | sed 's/-DCMAKE_BUILD_TYPE=//'`
|
|
||||||
fi
|
|
||||||
done
|
|
||||||
mkdir -p build/$suffix && cd build/$suffix
|
|
||||||
cmake $* $cwd
|
|
||||||
@@ -1,42 +0,0 @@
|
|||||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
|
||||||
<launchConfiguration type="org.eclipse.cdt.launch.applicationLaunchType">
|
|
||||||
<booleanAttribute key="de.toem.impulse.launchactivateLaunch" value="false"/>
|
|
||||||
<booleanAttribute key="de.toem.impulse.launchactivateTermination" value="false"/>
|
|
||||||
<intAttribute key="de.toem.impulse.launchdelayLaunch" value="0"/>
|
|
||||||
<intAttribute key="de.toem.impulse.launchlaunch" value="2"/>
|
|
||||||
<intAttribute key="de.toem.impulse.launchmode" value="3"/>
|
|
||||||
<stringAttribute key="de.toem.impulse.launchport" value=""/>
|
|
||||||
<booleanAttribute key="de.toem.impulse.launchrestart" value="true"/>
|
|
||||||
<intAttribute key="de.toem.impulse.launchterminate" value="1"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.AUTO_SOLIB" value="true"/>
|
|
||||||
<listAttribute key="org.eclipse.cdt.dsf.gdb.AUTO_SOLIB_LIST"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="gdb"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_ON_FORK" value="false"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.GDB_INIT" value=".gdbinit"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.NON_STOP" value="false"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE" value="false"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE_MODE" value="UseSoftTrace"/>
|
|
||||||
<listAttribute key="org.eclipse.cdt.dsf.gdb.SOLIB_PATH"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.TRACEPOINT_MODE" value="TP_NORMAL_ONLY"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.internal.ui.launching.LocalApplicationCDebuggerTab.DEFAULTS_SET" value="true"/>
|
|
||||||
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="1"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="gdb"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="main"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_ARGUMENTS" value="-v4 -g10000 ${project_loc:hello}/hello"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="build/Debug/riscv/bin/riscv-sim"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="DBT-RISE-RISCV"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="cdt.managedbuild.config.gnu.exe.debug.1751741082"/>
|
|
||||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
|
|
||||||
<listEntry value="/DBT-RISE-RISCV"/>
|
|
||||||
</listAttribute>
|
|
||||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
|
|
||||||
<listEntry value="4"/>
|
|
||||||
</listAttribute>
|
|
||||||
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="reserved-for-future-use"/> "/>
|
|
||||||
<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
|
|
||||||
</launchConfiguration>
|
|
||||||
@@ -1,42 +0,0 @@
|
|||||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
|
||||||
<launchConfiguration type="org.eclipse.cdt.launch.applicationLaunchType">
|
|
||||||
<booleanAttribute key="de.toem.impulse.launchactivateLaunch" value="false"/>
|
|
||||||
<booleanAttribute key="de.toem.impulse.launchactivateTermination" value="false"/>
|
|
||||||
<intAttribute key="de.toem.impulse.launchdelayLaunch" value="0"/>
|
|
||||||
<intAttribute key="de.toem.impulse.launchlaunch" value="2"/>
|
|
||||||
<intAttribute key="de.toem.impulse.launchmode" value="3"/>
|
|
||||||
<stringAttribute key="de.toem.impulse.launchport" value=""/>
|
|
||||||
<booleanAttribute key="de.toem.impulse.launchrestart" value="true"/>
|
|
||||||
<intAttribute key="de.toem.impulse.launchterminate" value="1"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.AUTO_SOLIB" value="true"/>
|
|
||||||
<listAttribute key="org.eclipse.cdt.dsf.gdb.AUTO_SOLIB_LIST"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="gdb"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_ON_FORK" value="false"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.GDB_INIT" value=".gdbinit"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.NON_STOP" value="false"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE" value="false"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE_MODE" value="UseSoftTrace"/>
|
|
||||||
<listAttribute key="org.eclipse.cdt.dsf.gdb.SOLIB_PATH"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.TRACEPOINT_MODE" value="TP_NORMAL_ONLY"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.internal.ui.launching.LocalApplicationCDebuggerTab.DEFAULTS_SET" value="true"/>
|
|
||||||
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="1"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="gdb"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="main"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_ARGUMENTS" value="-v4 -p ic=${workspace_loc:DBT-RISE-RISCV}/cycles.txt ${project_loc:hello}/hello"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="build/Debug/riscv/bin/riscv-sim"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="DBT-RISE-RISCV"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="cdt.managedbuild.config.gnu.exe.debug.1751741082"/>
|
|
||||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
|
|
||||||
<listEntry value="/DBT-RISE-RISCV"/>
|
|
||||||
</listAttribute>
|
|
||||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
|
|
||||||
<listEntry value="4"/>
|
|
||||||
</listAttribute>
|
|
||||||
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="reserved-for-future-use"/> "/>
|
|
||||||
<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
|
|
||||||
</launchConfiguration>
|
|
||||||
@@ -1,47 +0,0 @@
|
|||||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
|
||||||
<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
|
|
||||||
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="3"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="false"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="false"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value=""/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDeviceId" value="org.eclipse.cdt.debug.gdbjtag.core.jtagdevice.genericDevice"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="false"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
|
|
||||||
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="10000"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="false"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value=""/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="riscv64-unknown-elf-gdb"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.REMOTE_TIMEOUT_ENABLED" value="false"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.REMOTE_TIMEOUT_VALUE" value=""/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="true"/>
|
|
||||||
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="0"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="remote"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="hello"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="hello"/>
|
|
||||||
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
|
|
||||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="cdt.managedbuild.config.gnu.cross.exe.debug.1288357282"/>
|
|
||||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
|
|
||||||
<listEntry value="/hello"/>
|
|
||||||
</listAttribute>
|
|
||||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
|
|
||||||
<listEntry value="4"/>
|
|
||||||
</listAttribute>
|
|
||||||
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="reserved-for-future-use"/> "/>
|
|
||||||
<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
|
|
||||||
</launchConfiguration>
|
|
||||||
Vendored
-28
@@ -1,28 +0,0 @@
|
|||||||
cmake_minimum_required(VERSION 3.3)
|
|
||||||
set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/../cmake)
|
|
||||||
|
|
||||||
# Set the name of your project here
|
|
||||||
project("external")
|
|
||||||
|
|
||||||
include(Common)
|
|
||||||
|
|
||||||
|
|
||||||
include_directories( ${PROJECT_SOURCE_DIR}/libGIS )
|
|
||||||
|
|
||||||
FILE(GLOB ElfioHeaders elfio *.hpp)
|
|
||||||
FILE(GLOB GISHeaders libGis *.h)
|
|
||||||
|
|
||||||
set(LIB_HEADERS ${ElfioHeaders} ${GISHeaders})
|
|
||||||
set(LIB_SOURCES
|
|
||||||
libGIS/atmel_generic.c
|
|
||||||
libGIS/ihex.c
|
|
||||||
libGIS/srecord.c
|
|
||||||
)
|
|
||||||
|
|
||||||
# Define two variables in order not to repeat ourselves.
|
|
||||||
set(LIBRARY_NAME external)
|
|
||||||
|
|
||||||
# Define the library
|
|
||||||
add_library(${LIBRARY_NAME} ${LIB_SOURCES})
|
|
||||||
|
|
||||||
|
|
||||||
Vendored
-1
Submodule external/elfio deleted from 1fdbb64235.
Vendored
-1
Submodule external/libGIS deleted from f82b9dd301.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
-64
@@ -1,64 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
var ws;
|
|
||||||
|
|
||||||
$(function() {
|
|
||||||
ws = new WebSocket('ws://' + document.location.host + '/ws');
|
|
||||||
ws.onopen = function() {
|
|
||||||
console.log('onopen');
|
|
||||||
};
|
|
||||||
ws.onclose = function() {
|
|
||||||
$('#message').text('Lost connection.');
|
|
||||||
console.log('onclose');
|
|
||||||
};
|
|
||||||
ws.onmessage = function(message) {
|
|
||||||
console.log("got '" + message.data + "'");
|
|
||||||
eval(message.data);
|
|
||||||
};
|
|
||||||
ws.onerror = function(error) {
|
|
||||||
console.log('onerror ' + error);
|
|
||||||
console.log(error);
|
|
||||||
};
|
|
||||||
$('#count').click(function() {
|
|
||||||
ws.send($('#count').val());
|
|
||||||
});
|
|
||||||
$('#close').click(function() {
|
|
||||||
ws.send('close');
|
|
||||||
});
|
|
||||||
$('#die').click(function() {
|
|
||||||
ws.send('die');
|
|
||||||
});
|
|
||||||
});
|
|
||||||
|
|
||||||
set = function(value) {
|
|
||||||
$('#count').val(value)
|
|
||||||
}
|
|
||||||
@@ -1,14 +0,0 @@
|
|||||||
<!DOCTYPE html>
|
|
||||||
<html>
|
|
||||||
<head>
|
|
||||||
<title>Hello, world</title>
|
|
||||||
<script src='lib/jquery.min.js'></script>
|
|
||||||
<script src='app.js'></script>
|
|
||||||
</head>
|
|
||||||
<body>
|
|
||||||
<input id="count" type="button" value="..."></input>
|
|
||||||
<input id="close" type="button" value="Close"></input>
|
|
||||||
<input id="die" type="button" value="Die"></input>
|
|
||||||
</body>
|
|
||||||
</html>
|
|
||||||
|
|
||||||
Vendored
-16
@@ -1,16 +0,0 @@
|
|||||||
/*!
|
|
||||||
* jQuery JavaScript Library v1.5.2
|
|
||||||
* http://jquery.com/
|
|
||||||
*
|
|
||||||
* Copyright 2011, John Resig
|
|
||||||
* Dual licensed under the MIT or GPL Version 2 licenses.
|
|
||||||
* http://jquery.org/license
|
|
||||||
*
|
|
||||||
* Includes Sizzle.js
|
|
||||||
* http://sizzlejs.com/
|
|
||||||
* Copyright 2011, The Dojo Foundation
|
|
||||||
* Released under the MIT, BSD, and GPL Licenses.
|
|
||||||
*
|
|
||||||
* Date: Thu Mar 31 15:28:23 2011 -0400
|
|
||||||
*/
|
|
||||||
(function(a,b){function ci(a){return d.isWindow(a)?a:a.nodeType===9?a.defaultView||a.parentWindow:!1}function cf(a){if(!b_[a]){var b=d("<"+a+">").appendTo("body"),c=b.css("display");b.remove();if(c==="none"||c==="")c="block";b_[a]=c}return b_[a]}function ce(a,b){var c={};d.each(cd.concat.apply([],cd.slice(0,b)),function(){c[this]=a});return c}function b$(){try{return new a.ActiveXObject("Microsoft.XMLHTTP")}catch(b){}}function bZ(){try{return new a.XMLHttpRequest}catch(b){}}function bY(){d(a).unload(function(){for(var a in bW)bW[a](0,1)})}function bS(a,c){a.dataFilter&&(c=a.dataFilter(c,a.dataType));var e=a.dataTypes,f={},g,h,i=e.length,j,k=e[0],l,m,n,o,p;for(g=1;g<i;g++){if(g===1)for(h in a.converters)typeof h==="string"&&(f[h.toLowerCase()]=a.converters[h]);l=k,k=e[g];if(k==="*")k=l;else if(l!=="*"&&l!==k){m=l+" "+k,n=f[m]||f["* "+k];if(!n){p=b;for(o in f){j=o.split(" ");if(j[0]===l||j[0]==="*"){p=f[j[1]+" "+k];if(p){o=f[o],o===!0?n=p:p===!0&&(n=o);break}}}}!n&&!p&&d.error("No conversion from "+m.replace(" "," to ")),n!==!0&&(c=n?n(c):p(o(c)))}}return c}function bR(a,c,d){var e=a.contents,f=a.dataTypes,g=a.responseFields,h,i,j,k;for(i in g)i in d&&(c[g[i]]=d[i]);while(f[0]==="*")f.shift(),h===b&&(h=a.mimeType||c.getResponseHeader("content-type"));if(h)for(i in e)if(e[i]&&e[i].test(h)){f.unshift(i);break}if(f[0]in d)j=f[0];else{for(i in d){if(!f[0]||a.converters[i+" "+f[0]]){j=i;break}k||(k=i)}j=j||k}if(j){j!==f[0]&&f.unshift(j);return d[j]}}function bQ(a,b,c,e){if(d.isArray(b)&&b.length)d.each(b,function(b,f){c||bs.test(a)?e(a,f):bQ(a+"["+(typeof f==="object"||d.isArray(f)?b:"")+"]",f,c,e)});else if(c||b==null||typeof b!=="object")e(a,b);else if(d.isArray(b)||d.isEmptyObject(b))e(a,"");else for(var f in b)bQ(a+"["+f+"]",b[f],c,e)}function bP(a,c,d,e,f,g){f=f||c.dataTypes[0],g=g||{},g[f]=!0;var h=a[f],i=0,j=h?h.length:0,k=a===bJ,l;for(;i<j&&(k||!l);i++)l=h[i](c,d,e),typeof l==="string"&&(!k||g[l]?l=b:(c.dataTypes.unshift(l),l=bP(a,c,d,e,l,g)));(k||!l)&&!g["*"]&&(l=bP(a,c,d,e,"*",g));return l}function bO(a){return function(b,c){typeof b!=="string"&&(c=b,b="*");if(d.isFunction(c)){var e=b.toLowerCase().split(bD),f=0,g=e.length,h,i,j;for(;f<g;f++)h=e[f],j=/^\+/.test(h),j&&(h=h.substr(1)||"*"),i=a[h]=a[h]||[],i[j?"unshift":"push"](c)}}}function bq(a,b,c){var e=b==="width"?bk:bl,f=b==="width"?a.offsetWidth:a.offsetHeight;if(c==="border")return f;d.each(e,function(){c||(f-=parseFloat(d.css(a,"padding"+this))||0),c==="margin"?f+=parseFloat(d.css(a,"margin"+this))||0:f-=parseFloat(d.css(a,"border"+this+"Width"))||0});return f}function bc(a,b){b.src?d.ajax({url:b.src,async:!1,dataType:"script"}):d.globalEval(b.text||b.textContent||b.innerHTML||""),b.parentNode&&b.parentNode.removeChild(b)}function bb(a){return"getElementsByTagName"in a?a.getElementsByTagName("*"):"querySelectorAll"in a?a.querySelectorAll("*"):[]}function ba(a,b){if(b.nodeType===1){var c=b.nodeName.toLowerCase();b.clearAttributes(),b.mergeAttributes(a);if(c==="object")b.outerHTML=a.outerHTML;else if(c!=="input"||a.type!=="checkbox"&&a.type!=="radio"){if(c==="option")b.selected=a.defaultSelected;else if(c==="input"||c==="textarea")b.defaultValue=a.defaultValue}else a.checked&&(b.defaultChecked=b.checked=a.checked),b.value!==a.value&&(b.value=a.value);b.removeAttribute(d.expando)}}function _(a,b){if(b.nodeType===1&&d.hasData(a)){var c=d.expando,e=d.data(a),f=d.data(b,e);if(e=e[c]){var g=e.events;f=f[c]=d.extend({},e);if(g){delete f.handle,f.events={};for(var h in g)for(var i=0,j=g[h].length;i<j;i++)d.event.add(b,h+(g[h][i].namespace?".":"")+g[h][i].namespace,g[h][i],g[h][i].data)}}}}function $(a,b){return d.nodeName(a,"table")?a.getElementsByTagName("tbody")[0]||a.appendChild(a.ownerDocument.createElement("tbody")):a}function Q(a,b,c){if(d.isFunction(b))return d.grep(a,function(a,d){var e=!!b.call(a,d,a);return e===c});if(b.nodeType)return d.grep(a,function(a,d){return a===b===c});if(typeof b==="string"){var e=d.grep(a,function(a){return a.nodeType===1});if(L.test(b))return d.filter(b,e,!c);b=d.filter(b,e)}return d.grep(a,function(a,e){return d.inArray(a,b)>=0===c})}function P(a){return!a||!a.parentNode||a.parentNode.nodeType===11}function H(a,b){return(a&&a!=="*"?a+".":"")+b.replace(t,"`").replace(u,"&")}function G(a){var b,c,e,f,g,h,i,j,k,l,m,n,o,p=[],q=[],s=d._data(this,"events");if(a.liveFired!==this&&s&&s.live&&!a.target.disabled&&(!a.button||a.type!=="click")){a.namespace&&(n=new RegExp("(^|\\.)"+a.namespace.split(".").join("\\.(?:.*\\.)?")+"(\\.|$)")),a.liveFired=this;var t=s.live.slice(0);for(i=0;i<t.length;i++)g=t[i],g.origType.replace(r,"")===a.type?q.push(g.selector):t.splice(i--,1);f=d(a.target).closest(q,a.currentTarget);for(j=0,k=f.length;j<k;j++){m=f[j];for(i=0;i<t.length;i++){g=t[i];if(m.selector===g.selector&&(!n||n.test(g.namespace))&&!m.elem.disabled){h=m.elem,e=null;if(g.preType==="mouseenter"||g.preType==="mouseleave")a.type=g.preType,e=d(a.relatedTarget).closest(g.selector)[0];(!e||e!==h)&&p.push({elem:h,handleObj:g,level:m.leveLine truncated
|
|
||||||
-105
@@ -1,105 +0,0 @@
|
|||||||
<!doctype html>
|
|
||||||
<html lang=en>
|
|
||||||
<head>
|
|
||||||
<meta charset=utf-8>
|
|
||||||
<meta name=viewport content="width=device-width, initial-scale=1">
|
|
||||||
<title>system output</title>
|
|
||||||
<style>
|
|
||||||
h1 { font-family: helvetica, sans-serif; margin: 0; }
|
|
||||||
h1+p { margin: 0; }
|
|
||||||
li { font-family: Courier; list-style-type: '>';}
|
|
||||||
pre { margin-top:0; margin-bottom:0;}
|
|
||||||
.term { background-color:black; color:white; font-weight:bold;padding-top:10px; padding-bottom:10px; max-height:400px; overflow: scroll;}
|
|
||||||
span.timestamp { font-family: monospace; white-space: pre;width: 50px;}
|
|
||||||
span.value_z { background-color: darkblue;}
|
|
||||||
span.value_1 { background-color: green;}
|
|
||||||
span.value_0 { background-color: yellow;}
|
|
||||||
span.value_x { background-color: red;}
|
|
||||||
</style>
|
|
||||||
</head>
|
|
||||||
<body>
|
|
||||||
<h1>system output</h1>
|
|
||||||
<div id="top">
|
|
||||||
</div>
|
|
||||||
<script>
|
|
||||||
String.format = function() {
|
|
||||||
// The string containing the format items (e.g. "{0}")
|
|
||||||
// will and always has to be the first argument.
|
|
||||||
var theString = arguments[0];
|
|
||||||
// start with the second argument (i = 1)
|
|
||||||
for (var i = 1; i < arguments.length; i++) {
|
|
||||||
// "gm" = RegEx options for Global search (more than one instance)
|
|
||||||
// and for Multiline search
|
|
||||||
var regEx = new RegExp("\\{" + (i - 1) + "\\}", "gm");
|
|
||||||
theString = theString.replace(regEx, arguments[i]);
|
|
||||||
}
|
|
||||||
|
|
||||||
return theString;
|
|
||||||
}
|
|
||||||
String.prototype.paddingLeft = function (paddingValue) {
|
|
||||||
return String(paddingValue + this).slice(-paddingValue.length);
|
|
||||||
};
|
|
||||||
var log = function (n, m) {
|
|
||||||
console.log(m);
|
|
||||||
var data = JSON.parse(m);
|
|
||||||
if( data.hasOwnProperty("message") ) {
|
|
||||||
var ul = document.getElementById(n);
|
|
||||||
var li = document.createElement('li');
|
|
||||||
var p = document.createElement('pre');
|
|
||||||
// i.innerText = new Date().toISOString()+': '+m;
|
|
||||||
p.innerText = '['+data.time.paddingLeft(' ')+'] '+ data.message;
|
|
||||||
li.appendChild(p);
|
|
||||||
ul.appendChild(li);
|
|
||||||
var objDiv = document.getElementById(n + '_container');
|
|
||||||
objDiv.scrollTop = objDiv.scrollHeight;
|
|
||||||
} else if(data.hasOwnProperty("data")){
|
|
||||||
var ul = document.getElementById(n);
|
|
||||||
var li = document.createElement('li');
|
|
||||||
var span = document.createElement('span');
|
|
||||||
span.className="timestamp";
|
|
||||||
span.innerText='['+data.time.paddingLeft(' ')+']'
|
|
||||||
li.appendChild(span);
|
|
||||||
var s = data.data;
|
|
||||||
for ( var i = 0; i < s.length; i++ ){
|
|
||||||
var spani = document.createElement('span');
|
|
||||||
if(s.charAt(i) == 'Z')
|
|
||||||
spani.className="value_z";
|
|
||||||
else if(s.charAt(i) == '1')
|
|
||||||
spani.className="value_1";
|
|
||||||
else if(s.charAt(i) == '0')
|
|
||||||
spani.className="value_0";
|
|
||||||
else if(s.charAt(i) == 'X')
|
|
||||||
spani.className="value_x";
|
|
||||||
spani.appendChild(document.createTextNode('\u00A0'));
|
|
||||||
li.appendChild(spani);
|
|
||||||
}
|
|
||||||
ul.appendChild(li);
|
|
||||||
var objDiv = document.getElementById(n + '_container');
|
|
||||||
objDiv.scrollTop = objDiv.scrollHeight;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
var open_connection = function(name){
|
|
||||||
var s = new WebSocket('ws://'+window.location.host+'/ws/i_system.i_hifive1.i_'+name);
|
|
||||||
s.addEventListener('error', function (m) { log(name, new Date().toISOString()+': ===connection error ==='); });
|
|
||||||
s.addEventListener('open', function (m) { log(name, new Date().toISOString()+': ===connection opened==='); });
|
|
||||||
s.addEventListener('message', function (m) { log(name, m.data); });
|
|
||||||
s.addEventListener('close', function (m) { log(name, new Date().toISOString()+': ===connection closed==='); });
|
|
||||||
}
|
|
||||||
var createElem = function(n){
|
|
||||||
var top = document.getElementById('top');
|
|
||||||
var p = document.createElement('p');
|
|
||||||
p.innerText="Component " + n;
|
|
||||||
var div = document.createElement('div');
|
|
||||||
div.className = "term";
|
|
||||||
div.id= n + '_container';
|
|
||||||
var ul = document.createElement('ul');
|
|
||||||
ul.id= n;
|
|
||||||
div.appendChild(ul);
|
|
||||||
top.appendChild(p);
|
|
||||||
top.appendChild(div);
|
|
||||||
open_connection(n);
|
|
||||||
}
|
|
||||||
createElem("terminal");
|
|
||||||
</script>
|
|
||||||
</body>
|
|
||||||
</html>
|
|
||||||
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
@@ -1,57 +0,0 @@
|
|||||||
cmake_minimum_required(VERSION 3.3)
|
|
||||||
set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/../cmake) # main (top) cmake dir
|
|
||||||
set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/cmake) # project specific cmake dir
|
|
||||||
|
|
||||||
# CMake useful variables
|
|
||||||
set(CMAKE_RUNTIME_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/bin")
|
|
||||||
set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/lib")
|
|
||||||
set(CMAKE_LIBRARY_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/lib")
|
|
||||||
|
|
||||||
# Set the name of your project here
|
|
||||||
project("platform")
|
|
||||||
|
|
||||||
include(Common)
|
|
||||||
# check that we have averything we need
|
|
||||||
if(!SystemC_FOUND)
|
|
||||||
message( FATAL_ERROR "SystemC library not found." )
|
|
||||||
endif()
|
|
||||||
|
|
||||||
if(!CCI_FOUND)
|
|
||||||
message( FATAL_ERROR "SystemC CCI library not found." )
|
|
||||||
endif()
|
|
||||||
|
|
||||||
# This sets the include directory for the reference project. This is the -I flag in gcc.
|
|
||||||
|
|
||||||
add_dependent_subproject(dbt-core)
|
|
||||||
add_dependent_subproject(sc-components)
|
|
||||||
add_dependent_subproject(riscv)
|
|
||||||
|
|
||||||
include_directories(
|
|
||||||
${PROJECT_SOURCE_DIR}/../external/elfio
|
|
||||||
${PROJECT_SOURCE_DIR}/../external/libGIS
|
|
||||||
${Boost_INCLUDE_DIRS}
|
|
||||||
)
|
|
||||||
|
|
||||||
# Mac needed variables (adapt for your needs - http://www.cmake.org/Wiki/CMake_RPATH_handling#Mac_OS_X_and_the_RPATH)
|
|
||||||
set(CMAKE_MACOSX_RPATH ON)
|
|
||||||
set(CMAKE_SKIP_BUILD_RPATH FALSE)
|
|
||||||
set(CMAKE_BUILD_WITH_INSTALL_RPATH FALSE)
|
|
||||||
set(CMAKE_INSTALL_RPATH "${CMAKE_INSTALL_PREFIX}/lib")
|
|
||||||
set(CMAKE_INSTALL_RPATH_USE_LINK_PATH TRUE)
|
|
||||||
|
|
||||||
## the following setting needs to be consistent with the library
|
|
||||||
#add_definitions(-DSC_DEFAULT_WRITER_POLICY=SC_MANY_WRITERS)
|
|
||||||
|
|
||||||
add_subdirectory(src)
|
|
||||||
|
|
||||||
#
|
|
||||||
# SYSTEM PACKAGING (RPM, TGZ, ...)
|
|
||||||
# _____________________________________________________________________________
|
|
||||||
|
|
||||||
#include(CPackConfig)
|
|
||||||
|
|
||||||
#
|
|
||||||
# CMAKE PACKAGING (for other CMake projects to use this one easily)
|
|
||||||
# _____________________________________________________________________________
|
|
||||||
|
|
||||||
#include(PackageConfigurator)
|
|
||||||
@@ -1,158 +0,0 @@
|
|||||||
regfile aon_regs {
|
|
||||||
// Watchdog Timer Registers
|
|
||||||
reg {
|
|
||||||
name = "wdogcfg";
|
|
||||||
desc = "Watchdog Timer Config Register";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} wdogcfg @0x00;
|
|
||||||
reg {
|
|
||||||
name ="wdogcount";
|
|
||||||
desc = "Watchdog Timer Count Registers";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} wdogcount @0x08;
|
|
||||||
reg {
|
|
||||||
name ="wdogs";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} wdogs @0x10;
|
|
||||||
reg {
|
|
||||||
name ="wdogfeed";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} wdogfeed @0x18;
|
|
||||||
reg {
|
|
||||||
name ="wdogkey";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} wdogkey @0x1C;
|
|
||||||
reg {
|
|
||||||
name ="wdogcmp";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} wdogcmp @0x20;
|
|
||||||
// Real-Time Clock Registers
|
|
||||||
reg {
|
|
||||||
name ="rtccfg";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} rtccfg @0x40;
|
|
||||||
reg {
|
|
||||||
name ="rtclo";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} rtclo @0x48;
|
|
||||||
reg {
|
|
||||||
name ="rtchi";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} rtchi @0x4C;
|
|
||||||
reg {
|
|
||||||
name ="rtcs";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} rtcs @0x50;
|
|
||||||
reg {
|
|
||||||
name ="rtccmp";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} rtccmp @0x60;
|
|
||||||
// AON Clock Configuration Registers
|
|
||||||
reg {
|
|
||||||
name ="lfrosccfg";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} lfrosccfg @0x70;
|
|
||||||
// Backup Registers
|
|
||||||
reg {
|
|
||||||
name ="lfrosccfg";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} backup[32] @0x80;
|
|
||||||
// Power Management Unit
|
|
||||||
reg {
|
|
||||||
name ="pmuwakeupi";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="delay";
|
|
||||||
} delay[3:0];
|
|
||||||
field {
|
|
||||||
name="vddpaden";
|
|
||||||
} vddpaden[5:5];
|
|
||||||
field {
|
|
||||||
name="corerst";
|
|
||||||
} corerst[7:7];
|
|
||||||
field {
|
|
||||||
name="hfclkrst";
|
|
||||||
} hfclkrst[8:8];
|
|
||||||
} pmuwakeupi[8] @0x0100;
|
|
||||||
reg {
|
|
||||||
name ="pmusleepi";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="delay";
|
|
||||||
} delay[3:0];
|
|
||||||
field {
|
|
||||||
name="vddpaden";
|
|
||||||
} vddpaden[5:5];
|
|
||||||
field {
|
|
||||||
name="corerst";
|
|
||||||
} corerst[7:7];
|
|
||||||
field {
|
|
||||||
name="hfclkrst";
|
|
||||||
} hfclkrst[8:8];
|
|
||||||
} pmusleepi[8] @0x0120;
|
|
||||||
reg {
|
|
||||||
name ="pmuie";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} pmuie @0x0140;
|
|
||||||
reg {
|
|
||||||
name ="pmucause";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} pmucause @0x0144;
|
|
||||||
reg {
|
|
||||||
name ="pmusleep";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} pmusleep @0x0148;
|
|
||||||
reg {
|
|
||||||
name ="pmukey";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} pmukey @0x014C;
|
|
||||||
};
|
|
||||||
@@ -1,27 +0,0 @@
|
|||||||
regfile clint_regs {
|
|
||||||
reg {
|
|
||||||
name = "msip";
|
|
||||||
desc = "Hart 0 software interrupt register";
|
|
||||||
field {
|
|
||||||
name="msip";
|
|
||||||
} msip[0:0];
|
|
||||||
} msip @0;
|
|
||||||
reg {
|
|
||||||
name = "mtimecmp";
|
|
||||||
desc = "Hart 0 time comparator register";
|
|
||||||
regwidth=64;
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
fieldwidth=64;
|
|
||||||
} data = 64'h7FFFFFFFFFFFFFFF;
|
|
||||||
} mtimecmp @0x4000;
|
|
||||||
reg {
|
|
||||||
name = "mtime";
|
|
||||||
desc = "Timer register";
|
|
||||||
regwidth=64;
|
|
||||||
field {
|
|
||||||
fieldwidth=64;
|
|
||||||
name="data";
|
|
||||||
} data[63:0];
|
|
||||||
} mtime @0xBFF8;
|
|
||||||
};
|
|
||||||
@@ -1,25 +0,0 @@
|
|||||||
`include "gpio.rdl"
|
|
||||||
`include "uart.rdl"
|
|
||||||
`include "spi.rdl"
|
|
||||||
`include "pwm.rdl"
|
|
||||||
`include "plic.rdl"
|
|
||||||
`include "aon.rdl"
|
|
||||||
`include "prci.rdl"
|
|
||||||
`include "clint.rdl"
|
|
||||||
|
|
||||||
addrmap e300_plat_t {
|
|
||||||
lsb0;
|
|
||||||
clint_regs clint @0x02000000;
|
|
||||||
plic_regs plic @0x0C000000;
|
|
||||||
aon_regs aon @0x10000000;
|
|
||||||
prci_regs prci @0x10008000;
|
|
||||||
gpio_regs gpio0 @0x10012000;
|
|
||||||
uart_regs uart0 @0x10013000;
|
|
||||||
spi_regs qspi0 @0x10014000;
|
|
||||||
pwm_regs pwm0 @0x10015000;
|
|
||||||
uart_regs uart1 @0x10023000;
|
|
||||||
spi_regs qspi1 @0x10024000;
|
|
||||||
pwm_regs pwm1 @0x10025000;
|
|
||||||
spi_regs qspi2 @0x10034000;
|
|
||||||
pwm_regs pwm2 @0x10035000;
|
|
||||||
} e300_plat;
|
|
||||||
@@ -1,121 +0,0 @@
|
|||||||
regfile gpio_regs {
|
|
||||||
reg {
|
|
||||||
name="value";
|
|
||||||
desc="pin value";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} value @0x000;
|
|
||||||
reg {
|
|
||||||
name="input_en";
|
|
||||||
desc="* pin input enable";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} input_en @0x004;
|
|
||||||
reg {
|
|
||||||
name="output_en";
|
|
||||||
desc="pin output enable";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} output_en @0x008;
|
|
||||||
reg {
|
|
||||||
name="port";
|
|
||||||
desc="output port value";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} port @0x00C;
|
|
||||||
reg {
|
|
||||||
name="pue";
|
|
||||||
desc="internal pull-up enable";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} pue @0x010;
|
|
||||||
reg {
|
|
||||||
name="ds";
|
|
||||||
desc="Pin Drive Strength";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} ds @0x014;
|
|
||||||
reg {
|
|
||||||
name="rise_ie";
|
|
||||||
desc="rise interrupt enable";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} rise_ie @0x018;
|
|
||||||
reg {
|
|
||||||
name="rise_ip";
|
|
||||||
desc="rise interrupt pending";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} rise_ip @0x01C;
|
|
||||||
reg {
|
|
||||||
name="fall_ie";
|
|
||||||
desc="fall interrupt enable";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} fall_ie @0x020;
|
|
||||||
reg {
|
|
||||||
name="fall_ip";
|
|
||||||
desc="fall interrupt pending";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} fall_ip @0x024;
|
|
||||||
reg {
|
|
||||||
name="high_ie";
|
|
||||||
desc="high interrupt enable";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} high_ie @0x028;
|
|
||||||
reg {
|
|
||||||
name="high_ip";
|
|
||||||
desc="high interrupt pending";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} high_ip @0x02C;
|
|
||||||
reg {
|
|
||||||
name="low_ie";
|
|
||||||
desc="low interrupt enable";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} low_ie @0x030;
|
|
||||||
reg {
|
|
||||||
name="low_ip";
|
|
||||||
desc="low interrupt pending";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} low_ip @0x034;
|
|
||||||
reg {
|
|
||||||
name="iof_en";
|
|
||||||
desc="HW I/O Function enable";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} iof_en @0x038;
|
|
||||||
reg {
|
|
||||||
name="iof_sel";
|
|
||||||
desc="HW I/O Function select";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} iof_sel @0x03C;
|
|
||||||
reg {
|
|
||||||
name="out_xor";
|
|
||||||
desc="Output XOR (invert)";
|
|
||||||
field {
|
|
||||||
name = "data";
|
|
||||||
} data[31:0];
|
|
||||||
} out_xor @0x040;
|
|
||||||
};
|
|
||||||
@@ -1,27 +0,0 @@
|
|||||||
regfile plic_regs {
|
|
||||||
reg {
|
|
||||||
name="priority";
|
|
||||||
desc="interrupt source priority";
|
|
||||||
field {} priority[2:0];
|
|
||||||
} priority[256] @0x000;
|
|
||||||
reg {
|
|
||||||
name="pending";
|
|
||||||
desc="pending irq";
|
|
||||||
field {} pending[31:0];
|
|
||||||
} pending[8] @0x1000;
|
|
||||||
reg {
|
|
||||||
name="enabled";
|
|
||||||
desc="enabled interrupts";
|
|
||||||
field {} enabled[31:0];
|
|
||||||
} enabled[8] @0x2000;
|
|
||||||
reg {
|
|
||||||
name="threshold";
|
|
||||||
desc="interrupt priority threshold";
|
|
||||||
field {} \threshold[2:0];
|
|
||||||
} \threshold @0x200000;
|
|
||||||
reg {
|
|
||||||
name="claim/complete";
|
|
||||||
desc="interrupt handling completed";
|
|
||||||
field {} interrupt_claimed[31:0];
|
|
||||||
} claim_complete @0x200004;
|
|
||||||
};
|
|
||||||
@@ -1,41 +0,0 @@
|
|||||||
regfile prci_regs {
|
|
||||||
reg {
|
|
||||||
name ="hfrosccfg";
|
|
||||||
desc = "";
|
|
||||||
field {} hfroscdiv[5:0];
|
|
||||||
field {} hfrosctrim[20:16];
|
|
||||||
field {} hfroscen[30:30];
|
|
||||||
field {} hfroscrdy[31:31];
|
|
||||||
} hfrosccfg @0x00;
|
|
||||||
reg {
|
|
||||||
name ="hfxosccfg";
|
|
||||||
desc = "";
|
|
||||||
field {} hfxoscrdy[31:31];
|
|
||||||
field {} hfxoscen[30:30];
|
|
||||||
} hfxosccfg @0x04;
|
|
||||||
reg {
|
|
||||||
name ="pllcfg";
|
|
||||||
desc = "";
|
|
||||||
field {} pllr[2:0];
|
|
||||||
field {} pllf[9:4];
|
|
||||||
field {} pllq[11:10];
|
|
||||||
field {} pllsel[16:16];
|
|
||||||
field {} pllrefsel[17:17];
|
|
||||||
field {} pllbypass[18:18];
|
|
||||||
field {} plllock[31:31];
|
|
||||||
} pllcfg @0x08;
|
|
||||||
reg {
|
|
||||||
name ="plloutdiv";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} plloutdiv @0x0c;
|
|
||||||
reg {
|
|
||||||
name ="coreclkcfg";
|
|
||||||
desc = "";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[31:0];
|
|
||||||
} coreclkcfg @0x10;
|
|
||||||
};
|
|
||||||
@@ -1,96 +0,0 @@
|
|||||||
regfile pwm_regs {
|
|
||||||
reg {
|
|
||||||
name="pwmcfg";
|
|
||||||
desc="pin value";
|
|
||||||
field {
|
|
||||||
name = "pwmscale";
|
|
||||||
} pwmscale[3:0];
|
|
||||||
field {
|
|
||||||
name = "pwmsticky";
|
|
||||||
} pwmsticky[8:8];
|
|
||||||
field {
|
|
||||||
name = "pwmzerocmp";
|
|
||||||
} pwmsticky[9:9];
|
|
||||||
field {
|
|
||||||
name = "pwmdeglitch";
|
|
||||||
} pwmsticky[10:10];
|
|
||||||
field {
|
|
||||||
name = "pwmenalways";
|
|
||||||
} pwmenalways[12:12];
|
|
||||||
field {
|
|
||||||
name = "pwmenoneshot";
|
|
||||||
} pwmenalways[13:13];
|
|
||||||
field {
|
|
||||||
name = "pwmcmp0center";
|
|
||||||
} pwmcmp0center[16:16];
|
|
||||||
field {
|
|
||||||
name = "pwmcmp1center";
|
|
||||||
} pwmcmp1center[17:17];
|
|
||||||
field {
|
|
||||||
name = "pwmcmp2center";
|
|
||||||
} pwmcmp2center[18:18];
|
|
||||||
field {
|
|
||||||
name = "pwmcmp3center";
|
|
||||||
} pwmcmp3center[19:19];
|
|
||||||
field {
|
|
||||||
name = "pwmcmp0gang";
|
|
||||||
} pwmcmp0gang[24:24];
|
|
||||||
field {
|
|
||||||
name = "pwmcmp1gang";
|
|
||||||
} pwmcmp1gang[25:25];
|
|
||||||
field {
|
|
||||||
name = "pwmcmp2gang";
|
|
||||||
} pwmcmp2gang[26:26];
|
|
||||||
field {
|
|
||||||
name = "pwmcmp3gang";
|
|
||||||
} pwmcmp3gang[27:27];
|
|
||||||
field {
|
|
||||||
name = "pwmcmp0ip";
|
|
||||||
} pwmcmp0ip[28:28];
|
|
||||||
field {
|
|
||||||
name = "pwmcmp1ip";
|
|
||||||
} pwmcmp1ip[29:29];
|
|
||||||
field {
|
|
||||||
name = "pwmcmp2ip";
|
|
||||||
} pwmcmp2ip[30:30];
|
|
||||||
field {
|
|
||||||
name = "pwmcmp3ip";
|
|
||||||
} pwmcmp3ip[31:31];
|
|
||||||
} pwmcfg @0x000;
|
|
||||||
reg {
|
|
||||||
name="pwmcount";
|
|
||||||
field {
|
|
||||||
name = "pwmcount";
|
|
||||||
} pwmcount[31:0];
|
|
||||||
} pwmcount @0x008;
|
|
||||||
reg {
|
|
||||||
name="pwms";
|
|
||||||
field {
|
|
||||||
name = "pwms";
|
|
||||||
}pwms[15:0];
|
|
||||||
} pwms @0x010;
|
|
||||||
reg {
|
|
||||||
name="pwmcmp0";
|
|
||||||
field {
|
|
||||||
name = "pwmcmp0";
|
|
||||||
} pwmcmp0[15:0];
|
|
||||||
} pwmcmp0 @0x020;
|
|
||||||
reg {
|
|
||||||
name="pwmcmp1";
|
|
||||||
field {
|
|
||||||
name = "pwmcmp0";
|
|
||||||
} pwmcmp0[15:0];
|
|
||||||
} pwmcmp1 @0x024;
|
|
||||||
reg {
|
|
||||||
name="pwmcmp2";
|
|
||||||
field {
|
|
||||||
name = "pwmcmp0";
|
|
||||||
} pwmcmp0[15:0];
|
|
||||||
} pwmcmp2 @0x028;
|
|
||||||
reg {
|
|
||||||
name="pwmcmp3";
|
|
||||||
field {
|
|
||||||
name = "pwmcmp0";
|
|
||||||
} pwmcmp0[15:0];
|
|
||||||
} pwmcmp3 @0x02C;
|
|
||||||
};
|
|
||||||
@@ -1,173 +0,0 @@
|
|||||||
regfile spi_regs {
|
|
||||||
reg {
|
|
||||||
name="sckdiv";
|
|
||||||
desc="Serial clock divisor";
|
|
||||||
field {
|
|
||||||
name ="div";
|
|
||||||
} div[12];
|
|
||||||
} sckdiv @0x000;
|
|
||||||
reg {
|
|
||||||
name="sckmode";
|
|
||||||
desc="Serial clock mode";
|
|
||||||
field {
|
|
||||||
name="pha";
|
|
||||||
} pha[1];
|
|
||||||
field {
|
|
||||||
name="pol";
|
|
||||||
} pol[1];
|
|
||||||
} sckmode @0x004;
|
|
||||||
reg {
|
|
||||||
name="csid";
|
|
||||||
desc="Chip select ID";
|
|
||||||
field {
|
|
||||||
name="csid";
|
|
||||||
} csid[32];
|
|
||||||
} csid @0x010;
|
|
||||||
reg {
|
|
||||||
name="csdef";
|
|
||||||
desc="Chip select default";
|
|
||||||
field {
|
|
||||||
name="csdef";
|
|
||||||
} csdef[32];
|
|
||||||
} csdef @0x014;
|
|
||||||
reg {
|
|
||||||
name="csmode";
|
|
||||||
desc="Chip select mode";
|
|
||||||
field {
|
|
||||||
name="mode";
|
|
||||||
} mode[2];
|
|
||||||
} csmode @0x018;
|
|
||||||
reg {
|
|
||||||
name="delay0";
|
|
||||||
desc="Delay control 0";
|
|
||||||
field {
|
|
||||||
name="cssck";
|
|
||||||
} cssck[7:0];
|
|
||||||
field {
|
|
||||||
name ="sckcs";
|
|
||||||
} sckcs[23:16];
|
|
||||||
} delay0 @0x028;
|
|
||||||
reg {
|
|
||||||
name="delay1";
|
|
||||||
desc="Delay control 1";
|
|
||||||
field {
|
|
||||||
name="intercs";
|
|
||||||
}intercs[15:0];
|
|
||||||
field {
|
|
||||||
name="interxfr";
|
|
||||||
} interxfr[23:16];
|
|
||||||
} delay1 @0x02C;
|
|
||||||
reg {
|
|
||||||
name="fmt";
|
|
||||||
desc="Frame format";
|
|
||||||
field{
|
|
||||||
name ="proto";
|
|
||||||
}proto[2];
|
|
||||||
field {
|
|
||||||
name="endian";
|
|
||||||
} endian[1];
|
|
||||||
field {
|
|
||||||
name="dir";
|
|
||||||
} dir[1];
|
|
||||||
field {
|
|
||||||
name="len";
|
|
||||||
} len[19:16];
|
|
||||||
} fmt @0x040;
|
|
||||||
reg {
|
|
||||||
name="txdata";
|
|
||||||
desc="Tx FIFO data";
|
|
||||||
field {
|
|
||||||
name="data";
|
|
||||||
} data[8];
|
|
||||||
field {
|
|
||||||
name="full";
|
|
||||||
} full[31:31];
|
|
||||||
} txdata @0x048;
|
|
||||||
reg {
|
|
||||||
name="rxdata";
|
|
||||||
desc="Rx FIFO data";
|
|
||||||
field{
|
|
||||||
name="data";
|
|
||||||
} data[8];
|
|
||||||
field{
|
|
||||||
name="empty";
|
|
||||||
} empty[31:31];
|
|
||||||
} rxdata @0x04C;
|
|
||||||
reg {
|
|
||||||
name="txmark";
|
|
||||||
desc="Tx FIFO watermark";
|
|
||||||
field {
|
|
||||||
name="txmark";
|
|
||||||
} txmark[3];
|
|
||||||
} txmark @0x050;
|
|
||||||
reg {
|
|
||||||
name="rxmark";
|
|
||||||
desc="Rx FIFO watermark";
|
|
||||||
field {
|
|
||||||
name="rxmark";
|
|
||||||
} rxmark[3];
|
|
||||||
} rxmark @0x054;
|
|
||||||
reg {
|
|
||||||
name="fctrl";
|
|
||||||
desc="SPI flash interface control";
|
|
||||||
field {
|
|
||||||
name="en";
|
|
||||||
} en[1];
|
|
||||||
} fctrl @0x060;
|
|
||||||
reg {
|
|
||||||
name="ffmt";
|
|
||||||
desc="SPI flash instruction format";
|
|
||||||
field {
|
|
||||||
name="cmd_en";
|
|
||||||
reset=0x1;
|
|
||||||
} cmd_en[1];
|
|
||||||
field {
|
|
||||||
name="addr_len";
|
|
||||||
reset=0x3;
|
|
||||||
} addr_len[2];
|
|
||||||
field {
|
|
||||||
name="pad_cnt";
|
|
||||||
reset=0x0;
|
|
||||||
} pad_cnt[4];
|
|
||||||
field {
|
|
||||||
name="cmd_proto";
|
|
||||||
reset=0x0;
|
|
||||||
} cmd_proto[2];
|
|
||||||
field {
|
|
||||||
name="addr_proto";
|
|
||||||
reset=0x0;
|
|
||||||
} addr_proto[2];
|
|
||||||
field {
|
|
||||||
name="data_proto";
|
|
||||||
reset=0x0;
|
|
||||||
} data_proto[2];
|
|
||||||
field {
|
|
||||||
name="cmd_code";
|
|
||||||
reset=0x3;
|
|
||||||
} cmd_code[23:16];
|
|
||||||
field {
|
|
||||||
name="pad_code";
|
|
||||||
reset=0x0;
|
|
||||||
} pad_code[8];
|
|
||||||
} ffmt @0x064;
|
|
||||||
reg {
|
|
||||||
name="ie";
|
|
||||||
desc="SPI interrupt enable";
|
|
||||||
field{
|
|
||||||
name="txwm";
|
|
||||||
} txwm[1];
|
|
||||||
field{
|
|
||||||
name="rxwm";
|
|
||||||
} rxwm[1];
|
|
||||||
} ie @0x070;
|
|
||||||
reg {
|
|
||||||
name="ip";
|
|
||||||
desc="SPI interrupt pending";
|
|
||||||
field{
|
|
||||||
name="txwm";
|
|
||||||
} txwm[1];
|
|
||||||
field{
|
|
||||||
name="rxwm";
|
|
||||||
} rxwm[1];
|
|
||||||
} ip @0x074;
|
|
||||||
};
|
|
||||||
@@ -1,46 +0,0 @@
|
|||||||
regfile uart_regs {
|
|
||||||
reg {
|
|
||||||
name="txdata";
|
|
||||||
desc="Transmit data register";
|
|
||||||
field {} data[7:0];
|
|
||||||
field {} full[31:31];
|
|
||||||
} txdata @0x00;
|
|
||||||
reg {
|
|
||||||
name="rxdata";
|
|
||||||
desc="Receive data register";
|
|
||||||
field {} data[7:0];
|
|
||||||
field {} empty[31:31];
|
|
||||||
}rxdata @0x04;
|
|
||||||
reg {
|
|
||||||
name="txctrl";
|
|
||||||
desc="Transmit control register";
|
|
||||||
field {} txen[1];
|
|
||||||
field {} nstop[1];
|
|
||||||
field {} txcnt[18:16];
|
|
||||||
}txctrl @0x08;
|
|
||||||
reg {
|
|
||||||
name="rxctrl";
|
|
||||||
desc="Receive control register";
|
|
||||||
field {} rxen[1];
|
|
||||||
field {} rxcnt[18:16];
|
|
||||||
}rxctrl @0x0C;
|
|
||||||
reg {
|
|
||||||
name="ie";
|
|
||||||
desc="UART interrupt enable";
|
|
||||||
field{} txwm[1];
|
|
||||||
field{} rxwm[1];
|
|
||||||
}ie @0x10;
|
|
||||||
reg {
|
|
||||||
name="ip";
|
|
||||||
desc="UART Interrupt pending";
|
|
||||||
field{} txwm[1];
|
|
||||||
field{} rxwm[1];
|
|
||||||
} ip @0x14;
|
|
||||||
reg {
|
|
||||||
name="div";
|
|
||||||
desc="Baud rate divisor";
|
|
||||||
field{} div[16];
|
|
||||||
} div @0x18;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
@@ -1,63 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _AON_H_
|
|
||||||
#define _AON_H_
|
|
||||||
|
|
||||||
#include "scc/tlm_target.h"
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class aon_regs;
|
|
||||||
|
|
||||||
class aon : public sc_core::sc_module, public scc::tlm_target<> {
|
|
||||||
public:
|
|
||||||
SC_HAS_PROCESS(aon);// NOLINT
|
|
||||||
sc_core::sc_in<sc_core::sc_time> clk_i;
|
|
||||||
sc_core::sc_in<bool> erst_n_i;
|
|
||||||
sc_core::sc_out<sc_core::sc_time> lfclkc_o;
|
|
||||||
sc_core::sc_out<bool> rst_o;
|
|
||||||
aon(sc_core::sc_module_name nm);
|
|
||||||
virtual ~aon() override; // need to keep it in source file because of fwd declaration of aon_regs
|
|
||||||
|
|
||||||
protected:
|
|
||||||
void start_of_simulation() override;
|
|
||||||
void clock_cb();
|
|
||||||
void reset_cb();
|
|
||||||
void reset_internal_cb();
|
|
||||||
sc_core::sc_time clk;
|
|
||||||
std::unique_ptr<aon_regs> regs;
|
|
||||||
};
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
|
|
||||||
#endif /* _GPIO_H_ */
|
|
||||||
@@ -1,74 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _CLINT_H_
|
|
||||||
#define _CLINT_H_
|
|
||||||
|
|
||||||
#include "scc/tlm_target.h"
|
|
||||||
|
|
||||||
namespace iss {
|
|
||||||
namespace arch {
|
|
||||||
template <typename BASE> class riscv_hart_msu_vp;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class clint_regs;
|
|
||||||
namespace SiFive {
|
|
||||||
class core_complex;
|
|
||||||
}
|
|
||||||
|
|
||||||
class clint : public sc_core::sc_module, public scc::tlm_target<> {
|
|
||||||
public:
|
|
||||||
SC_HAS_PROCESS(clint);// NOLINT
|
|
||||||
sc_core::sc_in<sc_core::sc_time> tlclk_i;
|
|
||||||
sc_core::sc_in<sc_core::sc_time> lfclk_i;
|
|
||||||
sc_core::sc_in<bool> rst_i;
|
|
||||||
sc_core::sc_out<bool> mtime_int_o;
|
|
||||||
sc_core::sc_out<bool> msip_int_o;
|
|
||||||
clint(sc_core::sc_module_name nm);
|
|
||||||
virtual ~clint() override; // NOLINT // need to keep it in source file because of fwd declaration of clint_regs
|
|
||||||
|
|
||||||
protected:
|
|
||||||
void clock_cb();
|
|
||||||
void reset_cb();
|
|
||||||
void update_mtime();
|
|
||||||
sc_core::sc_time clk, last_updt;
|
|
||||||
unsigned cnt_fraction;
|
|
||||||
std::unique_ptr<clint_regs> regs;
|
|
||||||
sc_core::sc_event mtime_evt;
|
|
||||||
};
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
|
|
||||||
#endif /* _CLINT_H_ */
|
|
||||||
@@ -1,106 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _PLATFORM_H_
|
|
||||||
#define _PLATFORM_H_
|
|
||||||
|
|
||||||
#include "aon.h"
|
|
||||||
#include "clint.h"
|
|
||||||
#include "gpio.h"
|
|
||||||
#include "plic.h"
|
|
||||||
#include "prci.h"
|
|
||||||
#include "pwm.h"
|
|
||||||
#include "spi.h"
|
|
||||||
#include "sysc/core_complex.h"
|
|
||||||
#include "uart.h"
|
|
||||||
|
|
||||||
#include "cci_configuration"
|
|
||||||
#include "scc/memory.h"
|
|
||||||
#include "scc/router.h"
|
|
||||||
#include "scc/utilities.h"
|
|
||||||
#include "tlm/tlm_signal_sockets.h"
|
|
||||||
#include <array>
|
|
||||||
#include <memory>
|
|
||||||
#include <sysc/kernel/sc_module.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class fe310 : public sc_core::sc_module {
|
|
||||||
public:
|
|
||||||
SC_HAS_PROCESS(fe310);// NOLINT
|
|
||||||
|
|
||||||
sc_core::sc_vector<tlm::tlm_signal_initiator_socket<sc_dt::sc_logic>> pins_o;
|
|
||||||
sc_core::sc_vector<tlm::tlm_signal_target_socket<sc_dt::sc_logic>> pins_i;
|
|
||||||
|
|
||||||
sc_core::sc_in<bool> erst_n;
|
|
||||||
|
|
||||||
fe310(sc_core::sc_module_name nm);
|
|
||||||
|
|
||||||
cci::cci_param<bool> use_rtl;
|
|
||||||
|
|
||||||
private:
|
|
||||||
std::unique_ptr<SiFive::core_complex> i_core_complex;
|
|
||||||
std::unique_ptr<scc::router<>> i_router;
|
|
||||||
std::unique_ptr<uart> i_uart0, i_uart1;
|
|
||||||
std::unique_ptr<spi> i_qspi0, i_qspi1, i_qspi2;
|
|
||||||
std::unique_ptr<pwm> i_pwm0, i_pwm1, i_pwm2;
|
|
||||||
std::unique_ptr<gpio> i_gpio0;
|
|
||||||
std::unique_ptr<plic> i_plic;
|
|
||||||
std::unique_ptr<aon> i_aon;
|
|
||||||
std::unique_ptr<prci> i_prci;
|
|
||||||
std::unique_ptr<clint> i_clint;
|
|
||||||
|
|
||||||
using mem_qspi_t = scc::memory<512_MB, 32>;
|
|
||||||
std::unique_ptr<mem_qspi_t> i_mem_qspi;
|
|
||||||
using mem_ram_t = scc::memory<128_kB, 32>;
|
|
||||||
std::unique_ptr<mem_ram_t> i_mem_ram;
|
|
||||||
|
|
||||||
sc_core::sc_signal<sc_core::sc_time, sc_core::SC_MANY_WRITERS> s_tlclk;
|
|
||||||
sc_core::sc_signal<sc_core::sc_time, sc_core::SC_MANY_WRITERS> s_lfclk;
|
|
||||||
|
|
||||||
sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> s_rst, s_mtime_int, s_msie_int;
|
|
||||||
|
|
||||||
sc_core::sc_vector<sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS>> s_global_int, s_local_int;
|
|
||||||
sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> s_core_int;
|
|
||||||
|
|
||||||
sc_core::sc_vector<scc::tlm_signal_bool_opt_in> s_dummy_sck_i;
|
|
||||||
sc_core::sc_vector<scc::tlm_signal_bool_opt_out> s_dummy_sck_o;
|
|
||||||
|
|
||||||
protected:
|
|
||||||
void gen_reset();
|
|
||||||
|
|
||||||
#include "gen/e300_plat_t.h"
|
|
||||||
};
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
|
|
||||||
#endif /* _PLATFORM_H_ */
|
|
||||||
@@ -1,170 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _AON_REGS_H_
|
|
||||||
#define _AON_REGS_H_
|
|
||||||
|
|
||||||
#include <scc/register.h>
|
|
||||||
#include <scc/tlm_target.h>
|
|
||||||
#include <scc/utilities.h>
|
|
||||||
#include <util/bit_field.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class aon_regs : public sc_core::sc_module, public scc::resetable {
|
|
||||||
public:
|
|
||||||
// storage declarations
|
|
||||||
uint32_t r_wdogcfg;
|
|
||||||
|
|
||||||
uint32_t r_wdogcount;
|
|
||||||
|
|
||||||
uint32_t r_wdogs;
|
|
||||||
|
|
||||||
uint32_t r_wdogfeed;
|
|
||||||
|
|
||||||
uint32_t r_wdogkey;
|
|
||||||
|
|
||||||
uint32_t r_wdogcmp;
|
|
||||||
|
|
||||||
uint32_t r_rtccfg;
|
|
||||||
|
|
||||||
uint32_t r_rtclo;
|
|
||||||
|
|
||||||
uint32_t r_rtchi;
|
|
||||||
|
|
||||||
uint32_t r_rtcs;
|
|
||||||
|
|
||||||
uint32_t r_rtccmp;
|
|
||||||
|
|
||||||
uint32_t r_lfrosccfg;
|
|
||||||
|
|
||||||
std::array<uint32_t, 32> r_backup;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(pmuwakeupi_t, uint32_t);
|
|
||||||
BF_FIELD(delay, 0, 4);
|
|
||||||
BF_FIELD(vddpaden, 5, 1);
|
|
||||||
BF_FIELD(corerst, 7, 1);
|
|
||||||
BF_FIELD(hfclkrst, 8, 1);
|
|
||||||
END_BF_DECL();
|
|
||||||
std::array<pmuwakeupi_t, 8> r_pmuwakeupi;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(pmusleepi_t, uint32_t);
|
|
||||||
BF_FIELD(delay, 0, 4);
|
|
||||||
BF_FIELD(vddpaden, 5, 1);
|
|
||||||
BF_FIELD(corerst, 7, 1);
|
|
||||||
BF_FIELD(hfclkrst, 8, 1);
|
|
||||||
END_BF_DECL();
|
|
||||||
std::array<pmusleepi_t, 8> r_pmusleepi;
|
|
||||||
|
|
||||||
uint32_t r_pmuie;
|
|
||||||
|
|
||||||
uint32_t r_pmucause;
|
|
||||||
|
|
||||||
uint32_t r_pmusleep;
|
|
||||||
|
|
||||||
uint32_t r_pmukey;
|
|
||||||
|
|
||||||
// register declarations
|
|
||||||
scc::sc_register<uint32_t> wdogcfg;
|
|
||||||
scc::sc_register<uint32_t> wdogcount;
|
|
||||||
scc::sc_register<uint32_t> wdogs;
|
|
||||||
scc::sc_register<uint32_t> wdogfeed;
|
|
||||||
scc::sc_register<uint32_t> wdogkey;
|
|
||||||
scc::sc_register<uint32_t> wdogcmp;
|
|
||||||
scc::sc_register<uint32_t> rtccfg;
|
|
||||||
scc::sc_register<uint32_t> rtclo;
|
|
||||||
scc::sc_register<uint32_t> rtchi;
|
|
||||||
scc::sc_register<uint32_t> rtcs;
|
|
||||||
scc::sc_register<uint32_t> rtccmp;
|
|
||||||
scc::sc_register<uint32_t> lfrosccfg;
|
|
||||||
scc::sc_register_indexed<uint32_t, 32> backup;
|
|
||||||
scc::sc_register_indexed<pmuwakeupi_t, 8> pmuwakeupi;
|
|
||||||
scc::sc_register_indexed<pmusleepi_t, 8> pmusleepi;
|
|
||||||
scc::sc_register<uint32_t> pmuie;
|
|
||||||
scc::sc_register<uint32_t> pmucause;
|
|
||||||
scc::sc_register<uint32_t> pmusleep;
|
|
||||||
scc::sc_register<uint32_t> pmukey;
|
|
||||||
|
|
||||||
aon_regs(sc_core::sc_module_name nm);
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
|
|
||||||
};
|
|
||||||
}
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
// member functions
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
|
|
||||||
inline sysc::aon_regs::aon_regs(sc_core::sc_module_name nm)
|
|
||||||
: sc_core::sc_module(nm)
|
|
||||||
, NAMED(wdogcfg, r_wdogcfg, 0, *this)
|
|
||||||
, NAMED(wdogcount, r_wdogcount, 0, *this)
|
|
||||||
, NAMED(wdogs, r_wdogs, 0, *this)
|
|
||||||
, NAMED(wdogfeed, r_wdogfeed, 0, *this)
|
|
||||||
, NAMED(wdogkey, r_wdogkey, 0, *this)
|
|
||||||
, NAMED(wdogcmp, r_wdogcmp, 0, *this)
|
|
||||||
, NAMED(rtccfg, r_rtccfg, 0, *this)
|
|
||||||
, NAMED(rtclo, r_rtclo, 0, *this)
|
|
||||||
, NAMED(rtchi, r_rtchi, 0, *this)
|
|
||||||
, NAMED(rtcs, r_rtcs, 0, *this)
|
|
||||||
, NAMED(rtccmp, r_rtccmp, 0, *this)
|
|
||||||
, NAMED(lfrosccfg, r_lfrosccfg, 0, *this)
|
|
||||||
, NAMED(backup, r_backup, 0, *this)
|
|
||||||
, NAMED(pmuwakeupi, r_pmuwakeupi, 0, *this)
|
|
||||||
, NAMED(pmusleepi, r_pmusleepi, 0, *this)
|
|
||||||
, NAMED(pmuie, r_pmuie, 0, *this)
|
|
||||||
, NAMED(pmucause, r_pmucause, 0, *this)
|
|
||||||
, NAMED(pmusleep, r_pmusleep, 0, *this)
|
|
||||||
, NAMED(pmukey, r_pmukey, 0, *this) {}
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH> inline void sysc::aon_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
|
|
||||||
target.addResource(wdogcfg, 0x0UL);
|
|
||||||
target.addResource(wdogcount, 0x8UL);
|
|
||||||
target.addResource(wdogs, 0x10UL);
|
|
||||||
target.addResource(wdogfeed, 0x18UL);
|
|
||||||
target.addResource(wdogkey, 0x1cUL);
|
|
||||||
target.addResource(wdogcmp, 0x20UL);
|
|
||||||
target.addResource(rtccfg, 0x40UL);
|
|
||||||
target.addResource(rtclo, 0x48UL);
|
|
||||||
target.addResource(rtchi, 0x4cUL);
|
|
||||||
target.addResource(rtcs, 0x50UL);
|
|
||||||
target.addResource(rtccmp, 0x60UL);
|
|
||||||
target.addResource(lfrosccfg, 0x70UL);
|
|
||||||
target.addResource(backup, 0x80UL);
|
|
||||||
target.addResource(pmuwakeupi, 0x100UL);
|
|
||||||
target.addResource(pmusleepi, 0x120UL);
|
|
||||||
target.addResource(pmuie, 0x140UL);
|
|
||||||
target.addResource(pmucause, 0x144UL);
|
|
||||||
target.addResource(pmusleep, 0x148UL);
|
|
||||||
target.addResource(pmukey, 0x14cUL);
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif // _AON_REGS_H_
|
|
||||||
@@ -1,80 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _CLINT_REGS_H_
|
|
||||||
#define _CLINT_REGS_H_
|
|
||||||
|
|
||||||
#include <scc/register.h>
|
|
||||||
#include <scc/tlm_target.h>
|
|
||||||
#include <scc/utilities.h>
|
|
||||||
#include <util/bit_field.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class clint_regs : public sc_core::sc_module, public scc::resetable {
|
|
||||||
public:
|
|
||||||
// storage declarations
|
|
||||||
BEGIN_BF_DECL(msip_t, uint32_t);
|
|
||||||
BF_FIELD(msip, 0, 1);
|
|
||||||
END_BF_DECL() r_msip;
|
|
||||||
|
|
||||||
uint64_t r_mtimecmp;
|
|
||||||
|
|
||||||
uint64_t r_mtime;
|
|
||||||
|
|
||||||
// register declarations
|
|
||||||
scc::sc_register<msip_t> msip;
|
|
||||||
scc::sc_register<uint64_t> mtimecmp;
|
|
||||||
scc::sc_register<uint64_t> mtime;
|
|
||||||
|
|
||||||
clint_regs(sc_core::sc_module_name nm);
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
|
|
||||||
};
|
|
||||||
}
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
// member functions
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
|
|
||||||
inline sysc::clint_regs::clint_regs(sc_core::sc_module_name nm)
|
|
||||||
: sc_core::sc_module(nm)
|
|
||||||
, NAMED(msip, r_msip, 0, *this)
|
|
||||||
, NAMED(mtimecmp, r_mtimecmp, 0, *this)
|
|
||||||
, NAMED(mtime, r_mtime, 0, *this) {}
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH> inline void sysc::clint_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
|
|
||||||
target.addResource(msip, 0x0UL);
|
|
||||||
target.addResource(mtimecmp, 0x4000UL);
|
|
||||||
target.addResource(mtime, 0xbff8UL);
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif // _CLINT_REGS_H_
|
|
||||||
@@ -1,21 +0,0 @@
|
|||||||
#ifndef _E300_PLAT_T_MAP_H_
|
|
||||||
#define _E300_PLAT_T_MAP_H_
|
|
||||||
// need double braces, see
|
|
||||||
// https://stackoverflow.com/questions/6893700/how-to-construct-stdarray-object-with-initializer-list#6894191
|
|
||||||
const std::array<scc::target_memory_map_entry<32>, 13> e300_plat_t_map = {{
|
|
||||||
{i_clint->socket, 0x2000000, 0xc000},
|
|
||||||
{i_plic->socket, 0xc000000, 0x200008},
|
|
||||||
{i_aon->socket, 0x10000000, 0x150},
|
|
||||||
{i_prci->socket, 0x10008000, 0x14},
|
|
||||||
{i_gpio0->socket, 0x10012000, 0x44},
|
|
||||||
{i_uart0->socket, 0x10013000, 0x1c},
|
|
||||||
{i_qspi0->socket, 0x10014000, 0x78},
|
|
||||||
{i_pwm0->socket, 0x10015000, 0x30},
|
|
||||||
{i_uart1->socket, 0x10023000, 0x1c},
|
|
||||||
{i_qspi1->socket, 0x10024000, 0x78},
|
|
||||||
{i_pwm1->socket, 0x10025000, 0x30},
|
|
||||||
{i_qspi2->socket, 0x10034000, 0x78},
|
|
||||||
{i_pwm2->socket, 0x10035000, 0x30},
|
|
||||||
}};
|
|
||||||
|
|
||||||
#endif /* _E300_PLAT_T_MAP_H_ */
|
|
||||||
@@ -1,169 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _GPIO_REGS_H_
|
|
||||||
#define _GPIO_REGS_H_
|
|
||||||
|
|
||||||
#include <scc/register.h>
|
|
||||||
#include <scc/tlm_target.h>
|
|
||||||
#include <scc/utilities.h>
|
|
||||||
#include <util/bit_field.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class gpio_regs : public sc_core::sc_module, public scc::resetable {
|
|
||||||
public:
|
|
||||||
// storage declarations
|
|
||||||
uint32_t r_value;
|
|
||||||
|
|
||||||
uint32_t r_input_en;
|
|
||||||
|
|
||||||
uint32_t r_output_en;
|
|
||||||
|
|
||||||
uint32_t r_port;
|
|
||||||
|
|
||||||
uint32_t r_pue;
|
|
||||||
|
|
||||||
uint32_t r_ds;
|
|
||||||
|
|
||||||
uint32_t r_rise_ie;
|
|
||||||
|
|
||||||
uint32_t r_rise_ip;
|
|
||||||
|
|
||||||
uint32_t r_fall_ie;
|
|
||||||
|
|
||||||
uint32_t r_fall_ip;
|
|
||||||
|
|
||||||
uint32_t r_high_ie;
|
|
||||||
|
|
||||||
uint32_t r_high_ip;
|
|
||||||
|
|
||||||
uint32_t r_low_ie;
|
|
||||||
|
|
||||||
uint32_t r_low_ip;
|
|
||||||
|
|
||||||
uint32_t r_iof_en;
|
|
||||||
|
|
||||||
uint32_t r_iof_sel;
|
|
||||||
|
|
||||||
uint32_t r_out_xor;
|
|
||||||
|
|
||||||
// register declarations
|
|
||||||
scc::sc_register<uint32_t> value;
|
|
||||||
scc::sc_register<uint32_t> input_en;
|
|
||||||
scc::sc_register<uint32_t> output_en;
|
|
||||||
scc::sc_register<uint32_t> port;
|
|
||||||
scc::sc_register<uint32_t> pue;
|
|
||||||
scc::sc_register<uint32_t> ds;
|
|
||||||
scc::sc_register<uint32_t> rise_ie;
|
|
||||||
scc::sc_register<uint32_t> rise_ip;
|
|
||||||
scc::sc_register<uint32_t> fall_ie;
|
|
||||||
scc::sc_register<uint32_t> fall_ip;
|
|
||||||
scc::sc_register<uint32_t> high_ie;
|
|
||||||
scc::sc_register<uint32_t> high_ip;
|
|
||||||
scc::sc_register<uint32_t> low_ie;
|
|
||||||
scc::sc_register<uint32_t> low_ip;
|
|
||||||
scc::sc_register<uint32_t> iof_en;
|
|
||||||
scc::sc_register<uint32_t> iof_sel;
|
|
||||||
scc::sc_register<uint32_t> out_xor;
|
|
||||||
|
|
||||||
gpio_regs(sc_core::sc_module_name nm);
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
|
|
||||||
void trace(sc_core::sc_trace_file *tf) const override;
|
|
||||||
};
|
|
||||||
}
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
// member functions
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
|
|
||||||
inline sysc::gpio_regs::gpio_regs(sc_core::sc_module_name nm)
|
|
||||||
: sc_core::sc_module(nm)
|
|
||||||
, NAMED(value, r_value, 0, *this)
|
|
||||||
, NAMED(input_en, r_input_en, 0, *this)
|
|
||||||
, NAMED(output_en, r_output_en, 0, *this)
|
|
||||||
, NAMED(port, r_port, 0, *this)
|
|
||||||
, NAMED(pue, r_pue, 0, *this)
|
|
||||||
, NAMED(ds, r_ds, 0, *this)
|
|
||||||
, NAMED(rise_ie, r_rise_ie, 0, *this)
|
|
||||||
, NAMED(rise_ip, r_rise_ip, 0, *this)
|
|
||||||
, NAMED(fall_ie, r_fall_ie, 0, *this)
|
|
||||||
, NAMED(fall_ip, r_fall_ip, 0, *this)
|
|
||||||
, NAMED(high_ie, r_high_ie, 0, *this)
|
|
||||||
, NAMED(high_ip, r_high_ip, 0, *this)
|
|
||||||
, NAMED(low_ie, r_low_ie, 0, *this)
|
|
||||||
, NAMED(low_ip, r_low_ip, 0, *this)
|
|
||||||
, NAMED(iof_en, r_iof_en, 0, *this)
|
|
||||||
, NAMED(iof_sel, r_iof_sel, 0, *this)
|
|
||||||
, NAMED(out_xor, r_out_xor, 0, *this) {}
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH> inline void sysc::gpio_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
|
|
||||||
target.addResource(value, 0x0UL);
|
|
||||||
target.addResource(input_en, 0x4UL);
|
|
||||||
target.addResource(output_en, 0x8UL);
|
|
||||||
target.addResource(port, 0xcUL);
|
|
||||||
target.addResource(pue, 0x10UL);
|
|
||||||
target.addResource(ds, 0x14UL);
|
|
||||||
target.addResource(rise_ie, 0x18UL);
|
|
||||||
target.addResource(rise_ip, 0x1cUL);
|
|
||||||
target.addResource(fall_ie, 0x20UL);
|
|
||||||
target.addResource(fall_ip, 0x24UL);
|
|
||||||
target.addResource(high_ie, 0x28UL);
|
|
||||||
target.addResource(high_ip, 0x2cUL);
|
|
||||||
target.addResource(low_ie, 0x30UL);
|
|
||||||
target.addResource(low_ip, 0x34UL);
|
|
||||||
target.addResource(iof_en, 0x38UL);
|
|
||||||
target.addResource(iof_sel, 0x3cUL);
|
|
||||||
target.addResource(out_xor, 0x40UL);
|
|
||||||
}
|
|
||||||
|
|
||||||
inline void sysc::gpio_regs::trace(sc_core::sc_trace_file *tf) const {
|
|
||||||
value.trace(tf);
|
|
||||||
input_en.trace(tf);
|
|
||||||
output_en.trace(tf);
|
|
||||||
port.trace(tf);
|
|
||||||
pue.trace(tf);
|
|
||||||
ds.trace(tf);
|
|
||||||
rise_ie.trace(tf);
|
|
||||||
rise_ip.trace(tf);
|
|
||||||
fall_ie.trace(tf);
|
|
||||||
fall_ip.trace(tf);
|
|
||||||
high_ie.trace(tf);
|
|
||||||
high_ip.trace(tf);
|
|
||||||
low_ie.trace(tf);
|
|
||||||
low_ip.trace(tf);
|
|
||||||
iof_en.trace(tf);
|
|
||||||
iof_sel.trace(tf);
|
|
||||||
out_xor.trace(tf);
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif // _GPIO_REGS_H_
|
|
||||||
@@ -1,93 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _PLIC_REGS_H_
|
|
||||||
#define _PLIC_REGS_H_
|
|
||||||
|
|
||||||
#include <scc/register.h>
|
|
||||||
#include <scc/tlm_target.h>
|
|
||||||
#include <scc/utilities.h>
|
|
||||||
#include <util/bit_field.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class plic_regs : public sc_core::sc_module, public scc::resetable {
|
|
||||||
public:
|
|
||||||
// storage declarations
|
|
||||||
BEGIN_BF_DECL(priority_t, uint32_t);
|
|
||||||
BF_FIELD(priority, 0, 3);
|
|
||||||
END_BF_DECL();
|
|
||||||
std::array<priority_t, 256> r_priority;
|
|
||||||
|
|
||||||
std::array<uint32_t, 8> r_pending;
|
|
||||||
|
|
||||||
std::array<uint32_t, 8> r_enabled;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(threshold_t, uint32_t);
|
|
||||||
BF_FIELD(threshold, 0, 3);
|
|
||||||
END_BF_DECL() r_threshold;
|
|
||||||
|
|
||||||
uint32_t r_claim_complete;
|
|
||||||
|
|
||||||
// register declarations
|
|
||||||
scc::sc_register_indexed<priority_t, 256> priority;
|
|
||||||
scc::sc_register_indexed<uint32_t, 8> pending;
|
|
||||||
scc::sc_register_indexed<uint32_t, 8> enabled;
|
|
||||||
scc::sc_register<threshold_t> threshold;
|
|
||||||
scc::sc_register<uint32_t> claim_complete;
|
|
||||||
|
|
||||||
plic_regs(sc_core::sc_module_name nm);
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
|
|
||||||
};
|
|
||||||
}
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
// member functions
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
|
|
||||||
inline sysc::plic_regs::plic_regs(sc_core::sc_module_name nm)
|
|
||||||
: sc_core::sc_module(nm)
|
|
||||||
, NAMED(priority, r_priority, 0, *this)
|
|
||||||
, NAMED(pending, r_pending, 0, *this)
|
|
||||||
, NAMED(enabled, r_enabled, 0, *this)
|
|
||||||
, NAMED(threshold, r_threshold, 0, *this)
|
|
||||||
, NAMED(claim_complete, r_claim_complete, 0, *this) {}
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH> inline void sysc::plic_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
|
|
||||||
target.addResource(priority, 0x0UL);
|
|
||||||
target.addResource(pending, 0x1000UL);
|
|
||||||
target.addResource(enabled, 0x2000UL);
|
|
||||||
target.addResource(threshold, 0x200000UL);
|
|
||||||
target.addResource(claim_complete, 0x200004UL);
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif // _PLIC_REGS_H_
|
|
||||||
@@ -1,104 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _PRCI_REGS_H_
|
|
||||||
#define _PRCI_REGS_H_
|
|
||||||
|
|
||||||
#include <scc/register.h>
|
|
||||||
#include <scc/tlm_target.h>
|
|
||||||
#include <scc/utilities.h>
|
|
||||||
#include <util/bit_field.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class prci_regs : public sc_core::sc_module, public scc::resetable {
|
|
||||||
public:
|
|
||||||
// storage declarations
|
|
||||||
BEGIN_BF_DECL(hfrosccfg_t, uint32_t);
|
|
||||||
BF_FIELD(hfroscdiv, 0, 6);
|
|
||||||
BF_FIELD(hfrosctrim, 16, 5);
|
|
||||||
BF_FIELD(hfroscen, 30, 1);
|
|
||||||
BF_FIELD(hfroscrdy, 31, 1);
|
|
||||||
END_BF_DECL() r_hfrosccfg;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(hfxosccfg_t, uint32_t);
|
|
||||||
BF_FIELD(hfxoscrdy, 31, 1);
|
|
||||||
BF_FIELD(hfxoscen, 30, 1);
|
|
||||||
END_BF_DECL() r_hfxosccfg;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(pllcfg_t, uint32_t);
|
|
||||||
BF_FIELD(pllr, 0, 3);
|
|
||||||
BF_FIELD(pllf, 4, 6);
|
|
||||||
BF_FIELD(pllq, 10, 2);
|
|
||||||
BF_FIELD(pllsel, 16, 1);
|
|
||||||
BF_FIELD(pllrefsel, 17, 1);
|
|
||||||
BF_FIELD(pllbypass, 18, 1);
|
|
||||||
BF_FIELD(plllock, 31, 1);
|
|
||||||
END_BF_DECL() r_pllcfg;
|
|
||||||
|
|
||||||
uint32_t r_plloutdiv;
|
|
||||||
|
|
||||||
uint32_t r_coreclkcfg;
|
|
||||||
|
|
||||||
// register declarations
|
|
||||||
scc::sc_register<hfrosccfg_t> hfrosccfg;
|
|
||||||
scc::sc_register<hfxosccfg_t> hfxosccfg;
|
|
||||||
scc::sc_register<pllcfg_t> pllcfg;
|
|
||||||
scc::sc_register<uint32_t> plloutdiv;
|
|
||||||
scc::sc_register<uint32_t> coreclkcfg;
|
|
||||||
|
|
||||||
prci_regs(sc_core::sc_module_name nm);
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
|
|
||||||
};
|
|
||||||
}
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
// member functions
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
|
|
||||||
inline sysc::prci_regs::prci_regs(sc_core::sc_module_name nm)
|
|
||||||
: sc_core::sc_module(nm)
|
|
||||||
, NAMED(hfrosccfg, r_hfrosccfg, 0, *this)
|
|
||||||
, NAMED(hfxosccfg, r_hfxosccfg, 0x40000000, *this)
|
|
||||||
, NAMED(pllcfg, r_pllcfg, 0, *this)
|
|
||||||
, NAMED(plloutdiv, r_plloutdiv, 0, *this)
|
|
||||||
, NAMED(coreclkcfg, r_coreclkcfg, 0, *this) {}
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH> inline void sysc::prci_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
|
|
||||||
target.addResource(hfrosccfg, 0x0UL);
|
|
||||||
target.addResource(hfxosccfg, 0x4UL);
|
|
||||||
target.addResource(pllcfg, 0x8UL);
|
|
||||||
target.addResource(plloutdiv, 0xcUL);
|
|
||||||
target.addResource(coreclkcfg, 0x10UL);
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif // _PRCI_REGS_H_
|
|
||||||
@@ -1,129 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _PWM_REGS_H_
|
|
||||||
#define _PWM_REGS_H_
|
|
||||||
|
|
||||||
#include <scc/register.h>
|
|
||||||
#include <scc/tlm_target.h>
|
|
||||||
#include <scc/utilities.h>
|
|
||||||
#include <util/bit_field.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class pwm_regs : public sc_core::sc_module, public scc::resetable {
|
|
||||||
public:
|
|
||||||
// storage declarations
|
|
||||||
BEGIN_BF_DECL(pwmcfg_t, uint32_t);
|
|
||||||
BF_FIELD(pwmscale, 0, 4);
|
|
||||||
BF_FIELD(pwmsticky, 8, 1);
|
|
||||||
BF_FIELD(pwmzerocmp, 9, 1);
|
|
||||||
BF_FIELD(pwmdeglitch, 10, 1);
|
|
||||||
BF_FIELD(pwmenalways, 12, 1);
|
|
||||||
BF_FIELD(pwmenoneshot, 13, 1);
|
|
||||||
BF_FIELD(pwmcmp0center, 16, 1);
|
|
||||||
BF_FIELD(pwmcmp1center, 17, 1);
|
|
||||||
BF_FIELD(pwmcmp2center, 18, 1);
|
|
||||||
BF_FIELD(pwmcmp3center, 19, 1);
|
|
||||||
BF_FIELD(pwmcmp0gang, 24, 1);
|
|
||||||
BF_FIELD(pwmcmp1gang, 25, 1);
|
|
||||||
BF_FIELD(pwmcmp2gang, 26, 1);
|
|
||||||
BF_FIELD(pwmcmp3gang, 27, 1);
|
|
||||||
BF_FIELD(pwmcmp0ip, 28, 1);
|
|
||||||
BF_FIELD(pwmcmp1ip, 29, 1);
|
|
||||||
BF_FIELD(pwmcmp2ip, 30, 1);
|
|
||||||
BF_FIELD(pwmcmp3ip, 31, 1);
|
|
||||||
END_BF_DECL() r_pwmcfg;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(pwmcount_t, uint32_t);
|
|
||||||
BF_FIELD(pwmcount, 0, 31);
|
|
||||||
END_BF_DECL() r_pwmcount;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(pwms_t, uint32_t);
|
|
||||||
BF_FIELD(pwms, 0, 16);
|
|
||||||
END_BF_DECL() r_pwms;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(pwmcmp0_t, uint32_t);
|
|
||||||
BF_FIELD(pwmcmp0, 0, 16);
|
|
||||||
END_BF_DECL() r_pwmcmp0;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(pwmcmp1_t, uint32_t);
|
|
||||||
BF_FIELD(pwmcmp0, 0, 16);
|
|
||||||
END_BF_DECL() r_pwmcmp1;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(pwmcmp2_t, uint32_t);
|
|
||||||
BF_FIELD(pwmcmp0, 0, 16);
|
|
||||||
END_BF_DECL() r_pwmcmp2;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(pwmcmp3_t, uint32_t);
|
|
||||||
BF_FIELD(pwmcmp0, 0, 16);
|
|
||||||
END_BF_DECL() r_pwmcmp3;
|
|
||||||
|
|
||||||
// register declarations
|
|
||||||
scc::sc_register<pwmcfg_t> pwmcfg;
|
|
||||||
scc::sc_register<pwmcount_t> pwmcount;
|
|
||||||
scc::sc_register<pwms_t> pwms;
|
|
||||||
scc::sc_register<pwmcmp0_t> pwmcmp0;
|
|
||||||
scc::sc_register<pwmcmp1_t> pwmcmp1;
|
|
||||||
scc::sc_register<pwmcmp2_t> pwmcmp2;
|
|
||||||
scc::sc_register<pwmcmp3_t> pwmcmp3;
|
|
||||||
|
|
||||||
pwm_regs(sc_core::sc_module_name nm);
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
|
|
||||||
};
|
|
||||||
}
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
// member functions
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
|
|
||||||
inline sysc::pwm_regs::pwm_regs(sc_core::sc_module_name nm)
|
|
||||||
: sc_core::sc_module(nm)
|
|
||||||
, NAMED(pwmcfg, r_pwmcfg, 0, *this)
|
|
||||||
, NAMED(pwmcount, r_pwmcount, 0, *this)
|
|
||||||
, NAMED(pwms, r_pwms, 0, *this)
|
|
||||||
, NAMED(pwmcmp0, r_pwmcmp0, 0, *this)
|
|
||||||
, NAMED(pwmcmp1, r_pwmcmp1, 0, *this)
|
|
||||||
, NAMED(pwmcmp2, r_pwmcmp2, 0, *this)
|
|
||||||
, NAMED(pwmcmp3, r_pwmcmp3, 0, *this) {}
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH> inline void sysc::pwm_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
|
|
||||||
target.addResource(pwmcfg, 0x0UL);
|
|
||||||
target.addResource(pwmcount, 0x8UL);
|
|
||||||
target.addResource(pwms, 0x10UL);
|
|
||||||
target.addResource(pwmcmp0, 0x20UL);
|
|
||||||
target.addResource(pwmcmp1, 0x24UL);
|
|
||||||
target.addResource(pwmcmp2, 0x28UL);
|
|
||||||
target.addResource(pwmcmp3, 0x2cUL);
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif // _PWM_REGS_H_
|
|
||||||
@@ -1,188 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _SPI_REGS_H_
|
|
||||||
#define _SPI_REGS_H_
|
|
||||||
|
|
||||||
#include <scc/register.h>
|
|
||||||
#include <scc/tlm_target.h>
|
|
||||||
#include <scc/utilities.h>
|
|
||||||
#include <util/bit_field.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class spi_regs : public sc_core::sc_module, public scc::resetable {
|
|
||||||
public:
|
|
||||||
// storage declarations
|
|
||||||
BEGIN_BF_DECL(sckdiv_t, uint32_t);
|
|
||||||
BF_FIELD(div, 0, 12);
|
|
||||||
END_BF_DECL() r_sckdiv;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(sckmode_t, uint32_t);
|
|
||||||
BF_FIELD(pha, 0, 1);
|
|
||||||
BF_FIELD(pol, 1, 1);
|
|
||||||
END_BF_DECL() r_sckmode;
|
|
||||||
|
|
||||||
uint32_t r_csid;
|
|
||||||
|
|
||||||
uint32_t r_csdef;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(csmode_t, uint32_t);
|
|
||||||
BF_FIELD(mode, 0, 2);
|
|
||||||
END_BF_DECL() r_csmode;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(delay0_t, uint32_t);
|
|
||||||
BF_FIELD(cssck, 0, 8);
|
|
||||||
BF_FIELD(sckcs, 16, 8);
|
|
||||||
END_BF_DECL() r_delay0;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(delay1_t, uint32_t);
|
|
||||||
BF_FIELD(intercs, 0, 16);
|
|
||||||
BF_FIELD(interxfr, 16, 8);
|
|
||||||
END_BF_DECL() r_delay1;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(fmt_t, uint32_t);
|
|
||||||
BF_FIELD(proto, 0, 2);
|
|
||||||
BF_FIELD(endian, 2, 1);
|
|
||||||
BF_FIELD(dir, 3, 1);
|
|
||||||
BF_FIELD(len, 16, 4);
|
|
||||||
END_BF_DECL() r_fmt;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(txdata_t, uint32_t);
|
|
||||||
BF_FIELD(data, 0, 8);
|
|
||||||
BF_FIELD(full, 31, 1);
|
|
||||||
END_BF_DECL() r_txdata;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(rxdata_t, uint32_t);
|
|
||||||
BF_FIELD(data, 0, 8);
|
|
||||||
BF_FIELD(empty, 31, 1);
|
|
||||||
END_BF_DECL() r_rxdata;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(txmark_t, uint32_t);
|
|
||||||
BF_FIELD(txmark, 0, 3);
|
|
||||||
END_BF_DECL() r_txmark;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(rxmark_t, uint32_t);
|
|
||||||
BF_FIELD(rxmark, 0, 3);
|
|
||||||
END_BF_DECL() r_rxmark;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(fctrl_t, uint32_t);
|
|
||||||
BF_FIELD(en, 0, 1);
|
|
||||||
END_BF_DECL() r_fctrl;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(ffmt_t, uint32_t);
|
|
||||||
BF_FIELD(cmd_en, 0, 1);
|
|
||||||
BF_FIELD(addr_len, 1, 2);
|
|
||||||
BF_FIELD(pad_cnt, 3, 4);
|
|
||||||
BF_FIELD(cmd_proto, 7, 2);
|
|
||||||
BF_FIELD(addr_proto, 9, 2);
|
|
||||||
BF_FIELD(data_proto, 11, 2);
|
|
||||||
BF_FIELD(cmd_code, 16, 8);
|
|
||||||
BF_FIELD(pad_code, 24, 8);
|
|
||||||
END_BF_DECL() r_ffmt;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(ie_t, uint32_t);
|
|
||||||
BF_FIELD(txwm, 0, 1);
|
|
||||||
BF_FIELD(rxwm, 1, 1);
|
|
||||||
END_BF_DECL() r_ie;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(ip_t, uint32_t);
|
|
||||||
BF_FIELD(txwm, 0, 1);
|
|
||||||
BF_FIELD(rxwm, 1, 1);
|
|
||||||
END_BF_DECL() r_ip;
|
|
||||||
|
|
||||||
// register declarations
|
|
||||||
scc::sc_register<sckdiv_t> sckdiv;
|
|
||||||
scc::sc_register<sckmode_t> sckmode;
|
|
||||||
scc::sc_register<uint32_t> csid;
|
|
||||||
scc::sc_register<uint32_t> csdef;
|
|
||||||
scc::sc_register<csmode_t> csmode;
|
|
||||||
scc::sc_register<delay0_t> delay0;
|
|
||||||
scc::sc_register<delay1_t> delay1;
|
|
||||||
scc::sc_register<fmt_t> fmt;
|
|
||||||
scc::sc_register<txdata_t> txdata;
|
|
||||||
scc::sc_register<rxdata_t> rxdata;
|
|
||||||
scc::sc_register<txmark_t> txmark;
|
|
||||||
scc::sc_register<rxmark_t> rxmark;
|
|
||||||
scc::sc_register<fctrl_t> fctrl;
|
|
||||||
scc::sc_register<ffmt_t> ffmt;
|
|
||||||
scc::sc_register<ie_t> ie;
|
|
||||||
scc::sc_register<ip_t> ip;
|
|
||||||
|
|
||||||
spi_regs(sc_core::sc_module_name nm);
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
|
|
||||||
};
|
|
||||||
}
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
// member functions
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
|
|
||||||
inline sysc::spi_regs::spi_regs(sc_core::sc_module_name nm)
|
|
||||||
: sc_core::sc_module(nm)
|
|
||||||
, NAMED(sckdiv, r_sckdiv, 0, *this)
|
|
||||||
, NAMED(sckmode, r_sckmode, 0, *this)
|
|
||||||
, NAMED(csid, r_csid, 0, *this)
|
|
||||||
, NAMED(csdef, r_csdef, 0, *this)
|
|
||||||
, NAMED(csmode, r_csmode, 0, *this)
|
|
||||||
, NAMED(delay0, r_delay0, 0, *this)
|
|
||||||
, NAMED(delay1, r_delay1, 0, *this)
|
|
||||||
, NAMED(fmt, r_fmt, 0, *this)
|
|
||||||
, NAMED(txdata, r_txdata, 0, *this)
|
|
||||||
, NAMED(rxdata, r_rxdata, 0, *this)
|
|
||||||
, NAMED(txmark, r_txmark, 0, *this)
|
|
||||||
, NAMED(rxmark, r_rxmark, 0, *this)
|
|
||||||
, NAMED(fctrl, r_fctrl, 0, *this)
|
|
||||||
, NAMED(ffmt, r_ffmt, 0, *this)
|
|
||||||
, NAMED(ie, r_ie, 0, *this)
|
|
||||||
, NAMED(ip, r_ip, 0, *this) {}
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH> inline void sysc::spi_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
|
|
||||||
target.addResource(sckdiv, 0x0UL);
|
|
||||||
target.addResource(sckmode, 0x4UL);
|
|
||||||
target.addResource(csid, 0x10UL);
|
|
||||||
target.addResource(csdef, 0x14UL);
|
|
||||||
target.addResource(csmode, 0x18UL);
|
|
||||||
target.addResource(delay0, 0x28UL);
|
|
||||||
target.addResource(delay1, 0x2cUL);
|
|
||||||
target.addResource(fmt, 0x40UL);
|
|
||||||
target.addResource(txdata, 0x48UL);
|
|
||||||
target.addResource(rxdata, 0x4cUL);
|
|
||||||
target.addResource(txmark, 0x50UL);
|
|
||||||
target.addResource(rxmark, 0x54UL);
|
|
||||||
target.addResource(fctrl, 0x60UL);
|
|
||||||
target.addResource(ffmt, 0x64UL);
|
|
||||||
target.addResource(ie, 0x70UL);
|
|
||||||
target.addResource(ip, 0x74UL);
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif // _SPI_REGS_H_
|
|
||||||
@@ -1,119 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _UART_REGS_H_
|
|
||||||
#define _UART_REGS_H_
|
|
||||||
|
|
||||||
#include <scc/register.h>
|
|
||||||
#include <scc/tlm_target.h>
|
|
||||||
#include <scc/utilities.h>
|
|
||||||
#include <util/bit_field.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class uart_regs : public sc_core::sc_module, public scc::resetable {
|
|
||||||
public:
|
|
||||||
// storage declarations
|
|
||||||
BEGIN_BF_DECL(txdata_t, uint32_t);
|
|
||||||
BF_FIELD(data, 0, 8);
|
|
||||||
BF_FIELD(full, 31, 1);
|
|
||||||
END_BF_DECL() r_txdata;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(rxdata_t, uint32_t);
|
|
||||||
BF_FIELD(data, 0, 8);
|
|
||||||
BF_FIELD(empty, 31, 1);
|
|
||||||
END_BF_DECL() r_rxdata;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(txctrl_t, uint32_t);
|
|
||||||
BF_FIELD(txen, 0, 1);
|
|
||||||
BF_FIELD(nstop, 1, 1);
|
|
||||||
BF_FIELD(txcnt, 16, 3);
|
|
||||||
END_BF_DECL() r_txctrl;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(rxctrl_t, uint32_t);
|
|
||||||
BF_FIELD(rxen, 0, 1);
|
|
||||||
BF_FIELD(rxcnt, 16, 3);
|
|
||||||
END_BF_DECL() r_rxctrl;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(ie_t, uint32_t);
|
|
||||||
BF_FIELD(txwm, 0, 1);
|
|
||||||
BF_FIELD(rxwm, 1, 1);
|
|
||||||
END_BF_DECL() r_ie;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(ip_t, uint32_t);
|
|
||||||
BF_FIELD(txwm, 0, 1);
|
|
||||||
BF_FIELD(rxwm, 1, 1);
|
|
||||||
END_BF_DECL() r_ip;
|
|
||||||
|
|
||||||
BEGIN_BF_DECL(div_t, uint32_t);
|
|
||||||
BF_FIELD(div, 0, 16);
|
|
||||||
END_BF_DECL() r_div;
|
|
||||||
|
|
||||||
// register declarations
|
|
||||||
scc::sc_register<txdata_t> txdata;
|
|
||||||
scc::sc_register<rxdata_t> rxdata;
|
|
||||||
scc::sc_register<txctrl_t> txctrl;
|
|
||||||
scc::sc_register<rxctrl_t> rxctrl;
|
|
||||||
scc::sc_register<ie_t> ie;
|
|
||||||
scc::sc_register<ip_t> ip;
|
|
||||||
scc::sc_register<div_t> div;
|
|
||||||
|
|
||||||
uart_regs(sc_core::sc_module_name nm);
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
|
|
||||||
};
|
|
||||||
}
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
// member functions
|
|
||||||
//////////////////////////////////////////////////////////////////////////////
|
|
||||||
|
|
||||||
inline sysc::uart_regs::uart_regs(sc_core::sc_module_name nm)
|
|
||||||
: sc_core::sc_module(nm)
|
|
||||||
, NAMED(txdata, r_txdata, 0, *this)
|
|
||||||
, NAMED(rxdata, r_rxdata, 0, *this)
|
|
||||||
, NAMED(txctrl, r_txctrl, 0, *this)
|
|
||||||
, NAMED(rxctrl, r_rxctrl, 0, *this)
|
|
||||||
, NAMED(ie, r_ie, 0, *this)
|
|
||||||
, NAMED(ip, r_ip, 0, *this)
|
|
||||||
, NAMED(div, r_div, 0, *this) {}
|
|
||||||
|
|
||||||
template <unsigned BUSWIDTH> inline void sysc::uart_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
|
|
||||||
target.addResource(txdata, 0x0UL);
|
|
||||||
target.addResource(rxdata, 0x4UL);
|
|
||||||
target.addResource(txctrl, 0x8UL);
|
|
||||||
target.addResource(rxctrl, 0xcUL);
|
|
||||||
target.addResource(ie, 0x10UL);
|
|
||||||
target.addResource(ip, 0x14UL);
|
|
||||||
target.addResource(div, 0x18UL);
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif // _UART_REGS_H_
|
|
||||||
@@ -1,87 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _GPIO_H_
|
|
||||||
#define _GPIO_H_
|
|
||||||
|
|
||||||
#include "cci_configuration"
|
|
||||||
#include "scc/signal_initiator_mixin.h"
|
|
||||||
#include "scc/signal_target_mixin.h"
|
|
||||||
#include "scc/tlm_target.h"
|
|
||||||
#include <memory>
|
|
||||||
#include <tlm/tlm_signal.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class gpio_regs;
|
|
||||||
class WsHandler;
|
|
||||||
|
|
||||||
class gpio : public sc_core::sc_module, public scc::tlm_target<> {
|
|
||||||
public:
|
|
||||||
SC_HAS_PROCESS(gpio);// NOLINT
|
|
||||||
sc_core::sc_in<sc_core::sc_time> clk_i;
|
|
||||||
sc_core::sc_in<bool> rst_i;
|
|
||||||
// sc_core::sc_inout_rv<32> pins_io;
|
|
||||||
|
|
||||||
sc_core::sc_vector<scc::tlm_signal_logic_out> pins_o;
|
|
||||||
sc_core::sc_vector<scc::tlm_signal_logic_in> pins_i;
|
|
||||||
|
|
||||||
sc_core::sc_vector<scc::tlm_signal_bool_opt_out> iof0_o;
|
|
||||||
sc_core::sc_vector<scc::tlm_signal_bool_opt_out> iof1_o;
|
|
||||||
sc_core::sc_vector<scc::tlm_signal_bool_opt_in> iof0_i;
|
|
||||||
sc_core::sc_vector<scc::tlm_signal_bool_opt_in> iof1_i;
|
|
||||||
|
|
||||||
gpio(sc_core::sc_module_name nm);
|
|
||||||
virtual ~gpio() override; // need to keep it in source file because of fwd declaration of gpio_regs
|
|
||||||
|
|
||||||
cci::cci_param<bool> write_to_ws;
|
|
||||||
|
|
||||||
protected:
|
|
||||||
void clock_cb();
|
|
||||||
void reset_cb();
|
|
||||||
void update_pins(uint32_t changed_bits);
|
|
||||||
void before_end_of_elaboration();
|
|
||||||
void pin_input(unsigned int tag, tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, sc_core::sc_time &delay);
|
|
||||||
void forward_pin_input(unsigned int tag, tlm::tlm_signal_gp<sc_dt::sc_logic> &gp);
|
|
||||||
void iof_input(unsigned int tag, unsigned iof_idx, tlm::tlm_signal_gp<> &gp, sc_core::sc_time &delay);
|
|
||||||
sc_core::sc_time clk;
|
|
||||||
std::array<bool, 32> last_iof0, last_iof1;
|
|
||||||
std::unique_ptr<gpio_regs> regs;
|
|
||||||
std::shared_ptr<sysc::WsHandler> handler;
|
|
||||||
|
|
||||||
private:
|
|
||||||
tlm::tlm_phase write_output(tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, size_t i, sc_dt::sc_logic val);
|
|
||||||
};
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
|
|
||||||
#endif /* _GPIO_H_ */
|
|
||||||
@@ -1,72 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _PLIC_H_
|
|
||||||
#define _PLIC_H_
|
|
||||||
|
|
||||||
#include <scc/register.h>
|
|
||||||
#include <scc/tlm_target.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class plic_regs;
|
|
||||||
|
|
||||||
class plic : public sc_core::sc_module, public scc::tlm_target<> {
|
|
||||||
public:
|
|
||||||
SC_HAS_PROCESS(plic);// NOLINT
|
|
||||||
sc_core::sc_in<sc_core::sc_time> clk_i;
|
|
||||||
sc_core::sc_in<bool> rst_i;
|
|
||||||
sc_core::sc_vector<sc_core::sc_in<bool>> global_interrupts_i;
|
|
||||||
sc_core::sc_out<bool> core_interrupt_o;
|
|
||||||
sc_core::sc_event raise_int_ev;
|
|
||||||
sc_core::sc_event clear_int_ev;
|
|
||||||
plic(sc_core::sc_module_name nm);
|
|
||||||
~plic() override;
|
|
||||||
|
|
||||||
protected:
|
|
||||||
void clock_cb();
|
|
||||||
void reset_cb();
|
|
||||||
|
|
||||||
void global_int_port_cb();
|
|
||||||
void handle_pending_int();
|
|
||||||
void reset_pending_int(uint32_t irq);
|
|
||||||
|
|
||||||
void raise_core_interrupt();
|
|
||||||
void clear_core_interrupt();
|
|
||||||
sc_core::sc_time clk;
|
|
||||||
std::unique_ptr<plic_regs> regs;
|
|
||||||
std::function<bool(scc::sc_register<uint32_t>, uint32_t)> m_claim_complete_write_cb;
|
|
||||||
};
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
|
|
||||||
#endif /* _PLIC_H_ */
|
|
||||||
@@ -1,64 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _PRCI_H_
|
|
||||||
#define _PRCI_H_
|
|
||||||
|
|
||||||
#include "scc/tlm_target.h"
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class prci_regs;
|
|
||||||
|
|
||||||
class prci : public sc_core::sc_module, public scc::tlm_target<> {
|
|
||||||
public:
|
|
||||||
SC_HAS_PROCESS(prci);// NOLINT
|
|
||||||
sc_core::sc_port<sc_core::sc_signal_in_if<sc_core::sc_time>, 1, sc_core::SC_ZERO_OR_MORE_BOUND> hfxosc_i;
|
|
||||||
sc_core::sc_in<bool> rst_i;
|
|
||||||
sc_core::sc_out<sc_core::sc_time> hfclk_o;
|
|
||||||
prci(sc_core::sc_module_name nm);
|
|
||||||
virtual ~prci() override; // need to keep it in source file because of fwd declaration of prci_regs
|
|
||||||
|
|
||||||
protected:
|
|
||||||
void hfxosc_cb();
|
|
||||||
void reset_cb();
|
|
||||||
void hfrosc_en_cb();
|
|
||||||
void hfxosc_en_cb();
|
|
||||||
void update_hfclk();
|
|
||||||
sc_core::sc_time hfxosc_clk, hfrosc_clk, pll_clk, hfclk;
|
|
||||||
std::unique_ptr<prci_regs> regs;
|
|
||||||
sc_core::sc_event hfrosc_en_evt, hfxosc_en_evt;
|
|
||||||
};
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
|
|
||||||
#endif /* _GPIO_H_ */
|
|
||||||
@@ -1,79 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017,2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _PWM_H_
|
|
||||||
#define _PWM_H_
|
|
||||||
|
|
||||||
#include "cci_configuration"
|
|
||||||
#include "scc/signal_initiator_mixin.h"
|
|
||||||
#include "scc/signal_target_mixin.h"
|
|
||||||
#include "scc/tlm_target.h"
|
|
||||||
#include <tlm/tlm_signal.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class pwm_regs;
|
|
||||||
|
|
||||||
class pwm : public sc_core::sc_module, public scc::tlm_target<> {
|
|
||||||
public:
|
|
||||||
SC_HAS_PROCESS(pwm);// NOLINT
|
|
||||||
sc_core::sc_in<sc_core::sc_time> clk_i;
|
|
||||||
sc_core::sc_in<bool> rst_i;
|
|
||||||
|
|
||||||
sc_core::sc_vector<scc::tlm_signal_bool_opt_out> cmpgpio_o;
|
|
||||||
sc_core::sc_vector<sc_core::sc_out<bool>> cmpip_o;
|
|
||||||
|
|
||||||
pwm(sc_core::sc_module_name nm);
|
|
||||||
virtual ~pwm() override; // need to keep it in source file because of fwd declaration of gpio_regs
|
|
||||||
|
|
||||||
protected:
|
|
||||||
sc_core::sc_time clk, last_clk;
|
|
||||||
void clock_cb();
|
|
||||||
void reset_cb();
|
|
||||||
inline double get_pulses(sc_core::sc_time d) {
|
|
||||||
auto t = sc_core::sc_time_stamp() + d;
|
|
||||||
return last_clk > sc_core::SC_ZERO_TIME ? (t - last_cnt_update) / last_clk : 0.;
|
|
||||||
}
|
|
||||||
void update_counter();
|
|
||||||
void write_cmpgpio(size_t, bool);
|
|
||||||
std::unique_ptr<pwm_regs> regs;
|
|
||||||
uint64_t current_cnt;
|
|
||||||
sc_core::sc_time last_cnt_update;
|
|
||||||
double clk_remainder = 0.0;
|
|
||||||
bool last_enable = false, reset_cnt = false;
|
|
||||||
sc_core::sc_event update_counter_evt;
|
|
||||||
std::array<bool, 4> pwmcmp_ip;
|
|
||||||
};
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
|
|
||||||
#endif /* _GPIO_H_ */
|
|
||||||
@@ -1,88 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _SPI_H_
|
|
||||||
#define _SPI_H_
|
|
||||||
|
|
||||||
#include <sysc/utils/sc_vector.h>
|
|
||||||
#include <tlm/tlm_signal.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
namespace spi_impl {
|
|
||||||
class beh;
|
|
||||||
class rtl;
|
|
||||||
}
|
|
||||||
|
|
||||||
class spi : public sc_core::sc_module {
|
|
||||||
public:
|
|
||||||
template <typename TYPE>
|
|
||||||
static std::unique_ptr<spi> create(sc_core::sc_module_name nm);
|
|
||||||
|
|
||||||
template <typename T> using tlm_in = tlm::tlm_signal_opt_target_socket<T>;
|
|
||||||
template <typename T> using tlm_out = tlm::tlm_signal_opt_initiator_socket<T>;
|
|
||||||
|
|
||||||
tlm::tlm_target_socket<> socket;
|
|
||||||
sc_core::sc_in<sc_core::sc_time> clk_i;
|
|
||||||
sc_core::sc_in<bool> rst_i;
|
|
||||||
tlm_out<bool> sck_o;
|
|
||||||
tlm_out<bool> mosi_o;
|
|
||||||
tlm_in<bool> miso_i;
|
|
||||||
sc_core::sc_vector<tlm_out<bool>> scs_o;
|
|
||||||
|
|
||||||
sc_core::sc_out<bool> irq_o;
|
|
||||||
|
|
||||||
spi(spi &other) = delete;
|
|
||||||
|
|
||||||
spi(spi &&other) = delete;
|
|
||||||
|
|
||||||
spi &operator=(spi &other) = delete;
|
|
||||||
|
|
||||||
spi &operator=(spi &&other) = delete;
|
|
||||||
|
|
||||||
~spi() override = default;
|
|
||||||
|
|
||||||
protected:
|
|
||||||
spi(sc_core::sc_module_name nm)
|
|
||||||
: sc_core::sc_module(nm)
|
|
||||||
, NAMED(clk_i)
|
|
||||||
, NAMED(rst_i)
|
|
||||||
, NAMED(sck_o)
|
|
||||||
, NAMED(mosi_o)
|
|
||||||
, NAMED(miso_i)
|
|
||||||
, NAMED(scs_o, 4)
|
|
||||||
, NAMED(irq_o){};
|
|
||||||
};
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
|
|
||||||
#endif /* _SPI_H_ */
|
|
||||||
@@ -1,75 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _UART_H_
|
|
||||||
#define _UART_H_
|
|
||||||
|
|
||||||
#include "cci_configuration"
|
|
||||||
#include "scc/signal_initiator_mixin.h"
|
|
||||||
#include "scc/signal_target_mixin.h"
|
|
||||||
#include "scc/tlm_target.h"
|
|
||||||
#include <tlm/tlm_signal.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
class tlm_signal_uart_extension;
|
|
||||||
class uart_regs;
|
|
||||||
class WsHandler;
|
|
||||||
|
|
||||||
class uart : public sc_core::sc_module, public scc::tlm_target<> {
|
|
||||||
public:
|
|
||||||
SC_HAS_PROCESS(uart);// NOLINT
|
|
||||||
sc_core::sc_in<sc_core::sc_time> clk_i;
|
|
||||||
sc_core::sc_in<bool> rst_i;
|
|
||||||
scc::tlm_signal_bool_out tx_o;
|
|
||||||
scc::tlm_signal_bool_in rx_i;
|
|
||||||
|
|
||||||
sc_core::sc_out<bool> irq_o;
|
|
||||||
|
|
||||||
cci::cci_param<bool> bit_true_transfer;
|
|
||||||
|
|
||||||
uart(sc_core::sc_module_name nm);
|
|
||||||
virtual ~uart() override;
|
|
||||||
|
|
||||||
protected:
|
|
||||||
void clock_cb();
|
|
||||||
void reset_cb();
|
|
||||||
void transmit_data();
|
|
||||||
void receive_data(tlm::tlm_signal_gp<> &gp, sc_core::sc_time &delay);
|
|
||||||
void update_irq();
|
|
||||||
sc_core::sc_time clk{sc_core::SC_ZERO_TIME}, rx_last_start{sc_core::SC_ZERO_TIME};
|
|
||||||
std::unique_ptr<uart_regs> regs;
|
|
||||||
sc_core::sc_fifo<uint8_t> rx_fifo, tx_fifo;
|
|
||||||
};
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
|
|
||||||
#endif /* _UART_H_ */
|
|
||||||
@@ -1,114 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _SYSC_SC_COMM_SINGLETON_H_
|
|
||||||
#define _SYSC_SC_COMM_SINGLETON_H_
|
|
||||||
|
|
||||||
#include "seasocks/WebSocket.h"
|
|
||||||
#include <seasocks/PageHandler.h>
|
|
||||||
#include <sysc/kernel/sc_module.h>
|
|
||||||
|
|
||||||
#include <cstring>
|
|
||||||
#include <functional>
|
|
||||||
#include <memory>
|
|
||||||
#include <thread>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class WsHandler : public seasocks::WebSocket::Handler {
|
|
||||||
public:
|
|
||||||
explicit WsHandler() {}
|
|
||||||
|
|
||||||
void onConnect(seasocks::WebSocket *connection) override;
|
|
||||||
|
|
||||||
void onData(seasocks::WebSocket *connection, const char *data) override;
|
|
||||||
|
|
||||||
void onDisconnect(seasocks::WebSocket *connection) override;
|
|
||||||
|
|
||||||
void send(std::string msg) {
|
|
||||||
for (auto *con : _connections) con->send(msg);
|
|
||||||
}
|
|
||||||
|
|
||||||
void set_receive_callback(std::function<void(const char *data)> cb) { callback = cb; }
|
|
||||||
|
|
||||||
private:
|
|
||||||
std::set<seasocks::WebSocket *> _connections;
|
|
||||||
std::function<void(const char *data)> callback;
|
|
||||||
};
|
|
||||||
|
|
||||||
class sc_comm_singleton : public sc_core::sc_module {
|
|
||||||
struct DefaultPageHandler : public seasocks::PageHandler {
|
|
||||||
DefaultPageHandler(sc_comm_singleton &o)
|
|
||||||
: owner(o) {}
|
|
||||||
virtual std::shared_ptr<seasocks::Response> handle(const seasocks::Request &request);
|
|
||||||
sc_comm_singleton &owner;
|
|
||||||
};
|
|
||||||
|
|
||||||
public:
|
|
||||||
sc_comm_singleton() = delete;
|
|
||||||
|
|
||||||
sc_comm_singleton(const sc_comm_singleton &) = delete;
|
|
||||||
|
|
||||||
sc_comm_singleton &operator=(sc_comm_singleton &o) = delete;
|
|
||||||
|
|
||||||
virtual ~sc_comm_singleton();
|
|
||||||
|
|
||||||
static sc_comm_singleton &inst() {
|
|
||||||
static sc_comm_singleton i("__sc_singleton");
|
|
||||||
return i;
|
|
||||||
}
|
|
||||||
|
|
||||||
seasocks::Server &get_server();
|
|
||||||
|
|
||||||
void registerWebSocketHandler(const char *endpoint, std::shared_ptr<seasocks::WebSocket::Handler> handler,
|
|
||||||
bool allowCrossOriginRequests = false);
|
|
||||||
|
|
||||||
void execute(std::function<void()> f);
|
|
||||||
|
|
||||||
void start_client();
|
|
||||||
|
|
||||||
protected:
|
|
||||||
void start_of_simulation() override;
|
|
||||||
void end_of_simulation() override;
|
|
||||||
|
|
||||||
private:
|
|
||||||
sc_comm_singleton(sc_core::sc_module_name nm);
|
|
||||||
std::unique_ptr<seasocks::Server> m_serv;
|
|
||||||
std::thread t;
|
|
||||||
void thread_func();
|
|
||||||
bool needs_client, client_started;
|
|
||||||
std::vector<std::string> endpoints;
|
|
||||||
};
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
|
|
||||||
#endif /* _SYSC_SC_COMM_SINGLETON_H_ */
|
|
||||||
@@ -1,70 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _SYSC_TLM_EXTENSIONS_H_
|
|
||||||
#define _SYSC_TLM_EXTENSIONS_H_
|
|
||||||
|
|
||||||
#include "tlm/tlm_extensions.h"
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
struct tlm_signal_uart_extension : public tlm::tlm_unmanaged_extension<tlm_signal_uart_extension> {
|
|
||||||
|
|
||||||
struct uart_tx {
|
|
||||||
unsigned data_bits : 4;
|
|
||||||
unsigned stop_bits : 2;
|
|
||||||
bool parity : 1;
|
|
||||||
unsigned baud_rate : 24;
|
|
||||||
unsigned data;
|
|
||||||
} tx;
|
|
||||||
sc_core::sc_time start_time;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct tlm_signal_spi_extension : public tlm::tlm_unmanaged_extension<tlm_signal_spi_extension> {
|
|
||||||
|
|
||||||
struct spi_tx {
|
|
||||||
unsigned data_bits : 5;
|
|
||||||
bool msb_first : 1;
|
|
||||||
bool m2s_data_valid : 1;
|
|
||||||
bool s2m_data_valid : 1;
|
|
||||||
unsigned m2s_data, s2m_data;
|
|
||||||
} tx;
|
|
||||||
sc_core::sc_time start_time;
|
|
||||||
|
|
||||||
void copy_from(tlm_extension_base const &other) override {
|
|
||||||
auto &o = static_cast<const type &>(other);
|
|
||||||
this->tx = o.tx;
|
|
||||||
this->start_time = o.start_time;
|
|
||||||
}
|
|
||||||
};
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /* _SYSC_TLM_EXTENSIONS_H_ */
|
|
||||||
@@ -1,131 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef BLDC_H_
|
|
||||||
#define BLDC_H_
|
|
||||||
|
|
||||||
#include <boost/numeric/odeint.hpp>
|
|
||||||
namespace odeint = boost::numeric::odeint;
|
|
||||||
|
|
||||||
inline double norm_angle(double alpha) {
|
|
||||||
double alpha_n = fmod(alpha, M_PI * 2);
|
|
||||||
while (alpha_n < 0.) alpha_n += (M_PI * 2);
|
|
||||||
return alpha_n;
|
|
||||||
}
|
|
||||||
|
|
||||||
class BLDC {
|
|
||||||
public:
|
|
||||||
struct Config {
|
|
||||||
double inertia = 0.0005; /* aka 'J' in kg/(m^2) */
|
|
||||||
double damping = 0.000089; /* aka 'B' in Nm/(rad/s) */
|
|
||||||
double static_friction = 0.0; /* in Nm */
|
|
||||||
// double Kv = 0.0042; /* motor constant in RPM/V */
|
|
||||||
double Ke = 0.0042; /* back emf constant in V/rad/s*/
|
|
||||||
double L = 0.0027; /* Coil inductance in H */
|
|
||||||
double M = -0.000069; /* Mutual coil inductance in H */
|
|
||||||
double R = 2.875; /* Coil resistence in Ohm */
|
|
||||||
int NbPoles =
|
|
||||||
2; /* NbPoles / 2 = Number of pole pairs (you count the permanent magnets on the rotor to get NbPoles) */
|
|
||||||
};
|
|
||||||
|
|
||||||
using StateVector = std::array<double, 5>;
|
|
||||||
|
|
||||||
struct State {
|
|
||||||
double θ /* angle of the rotor */
|
|
||||||
double ω /* angular speed of the rotor */
|
|
||||||
double &ia; /* phase a current */
|
|
||||||
double &ib; /* phase b current */
|
|
||||||
double ⁣ /* phase c current */
|
|
||||||
explicit State(StateVector &v)
|
|
||||||
: theta(v[0])
|
|
||||||
, omega(v[1])
|
|
||||||
, ia(v[2])
|
|
||||||
, ib(v[3])
|
|
||||||
, ic(v[4]) {}
|
|
||||||
State(State &&) = delete;
|
|
||||||
State(const State &) = delete;
|
|
||||||
State &operator=(const State &) = delete; // Copy assignment operator
|
|
||||||
State &operator=(const State &&) = delete; // Move assignment operator
|
|
||||||
~State() {}
|
|
||||||
void init() {
|
|
||||||
theta = ia = ib = ic = 0;
|
|
||||||
omega = 0.;
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
explicit BLDC(const Config config);
|
|
||||||
|
|
||||||
virtual ~BLDC();
|
|
||||||
|
|
||||||
void set_input(std::array<double, 3> vin) { this->vin = vin; }
|
|
||||||
|
|
||||||
void run(double dt);
|
|
||||||
|
|
||||||
void printToStream(std::ostream &) const;
|
|
||||||
|
|
||||||
double get_current_time() { return current_time; }
|
|
||||||
|
|
||||||
std::array<double, 7> get_voltages() {
|
|
||||||
return std::array<double, 7>{voltages[VA], voltages[VB], voltages[VC], voltages[VCENTER],
|
|
||||||
voltages[EA], voltages[EB], voltages[EC]};
|
|
||||||
}
|
|
||||||
const State &getState() { return state; }
|
|
||||||
|
|
||||||
void setLoad(double torque) { torque_load = torque; }
|
|
||||||
|
|
||||||
const double dt = 0.00000001;
|
|
||||||
|
|
||||||
protected:
|
|
||||||
Config config;
|
|
||||||
StateVector stateVector;
|
|
||||||
State state;
|
|
||||||
std::array<double, 3> vin;
|
|
||||||
double current_time = 0.0;
|
|
||||||
double torque_load = 0.0001;
|
|
||||||
double etorque = 0.0, mtorque = 0.0;
|
|
||||||
std::array<double, 7> voltages;
|
|
||||||
enum VoltageNames { EA = 0, EB = 1, EC = 2, VA = 3, VB = 4, VC = 5, VCENTER = 6 };
|
|
||||||
double calc_bemf_factor(const State &state, double theta);
|
|
||||||
void calc_back_emf(const State &state, double theta_e);
|
|
||||||
void calc_voltages();
|
|
||||||
// ODE part
|
|
||||||
// boost::numeric::odeint::runge_kutta4< StateVector > stepper;
|
|
||||||
// boost::numeric::odeint::runge_kutta_cash_karp54<StateVector > stepper;
|
|
||||||
// using stepper_type = odeint::runge_kutta_dopri5<StateVector>;
|
|
||||||
// using stepper_type = odeint::runge_kutta_cash_karp54< StateVector>;
|
|
||||||
using stepper_type = odeint::runge_kutta_fehlberg78<StateVector>;
|
|
||||||
void rotor_dyn(const StateVector &x, StateVector &dxdt, const double t);
|
|
||||||
};
|
|
||||||
|
|
||||||
std::ostream &operator<<(std::ostream &os, const BLDC &bldc);
|
|
||||||
|
|
||||||
#endif /* BLDC_H_ */
|
|
||||||
@@ -1,68 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _SYSC_TOP_DCMOTOR_H_
|
|
||||||
#define _SYSC_TOP_DCMOTOR_H_
|
|
||||||
|
|
||||||
#include "BLDC.h"
|
|
||||||
#include "cci_configuration"
|
|
||||||
#include "scc/traceable.h"
|
|
||||||
#include <systemc>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class dc_motor : public sc_core::sc_module, public scc::traceable {
|
|
||||||
public:
|
|
||||||
SC_HAS_PROCESS(dc_motor);// NOLINT
|
|
||||||
|
|
||||||
sc_core::sc_in<double> va_i, vb_i, vc_i;
|
|
||||||
sc_core::sc_out<double> va_o, vb_o, vc_o, vcenter_o;
|
|
||||||
|
|
||||||
dc_motor(const sc_core::sc_module_name &nm);
|
|
||||||
|
|
||||||
virtual ~dc_motor();
|
|
||||||
|
|
||||||
void trace(sc_core::sc_trace_file *trf) const override;
|
|
||||||
|
|
||||||
cci::cci_param<sc_core::sc_time> max_integ_step;
|
|
||||||
cci::cci_param<double> load;
|
|
||||||
|
|
||||||
private:
|
|
||||||
void thread(void);
|
|
||||||
BLDC bldc_model;
|
|
||||||
const BLDC::State &bldc_state;
|
|
||||||
std::array<double, 7> vout;
|
|
||||||
};
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
|
|
||||||
#endif /* RISCV_SC_INCL_SYSC_TOP_DCMOTOR_H_ */
|
|
||||||
@@ -1,66 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef RISCV_SC_INCL_SYSC_TOP_H_BRIDGE_H_
|
|
||||||
#define RISCV_SC_INCL_SYSC_TOP_H_BRIDGE_H_
|
|
||||||
|
|
||||||
#include "cci_configuration"
|
|
||||||
#include <sysc/kernel/sc_module.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class h_bridge : public sc_core::sc_module {
|
|
||||||
public:
|
|
||||||
SC_HAS_PROCESS(h_bridge);// NOLINT
|
|
||||||
|
|
||||||
sc_core::sc_in<sc_dt::sc_logic> ha_i, la_i;
|
|
||||||
sc_core::sc_in<sc_dt::sc_logic> hb_i, lb_i;
|
|
||||||
sc_core::sc_in<sc_dt::sc_logic> hc_i, lc_i;
|
|
||||||
|
|
||||||
sc_core::sc_out<double> va_o, vb_o, vc_o;
|
|
||||||
|
|
||||||
cci::cci_param<double> vcc;
|
|
||||||
|
|
||||||
h_bridge(const sc_core::sc_module_name &nm);
|
|
||||||
|
|
||||||
virtual ~h_bridge();
|
|
||||||
|
|
||||||
private:
|
|
||||||
void ain_cb();
|
|
||||||
void bin_cb();
|
|
||||||
void cin_cb();
|
|
||||||
void write_output(sc_dt::sc_logic h_i, sc_dt::sc_logic l_i, sc_core::sc_out<double> &v_o);
|
|
||||||
};
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
|
|
||||||
#endif /* RISCV_SC_INCL_SYSC_TOP_H_BRIDGE_H_ */
|
|
||||||
@@ -1,68 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _SIFIVE_HIFIVE1_H_
|
|
||||||
#define _SIFIVE_HIFIVE1_H_
|
|
||||||
|
|
||||||
#include <sysc/top/terminal.h>
|
|
||||||
#include <sysc/top/mcp_adc.h>
|
|
||||||
#include "tlm/tlm_signal_sockets.h"
|
|
||||||
#include <boost/preprocessor.hpp>
|
|
||||||
#include <systemc>
|
|
||||||
#include <sysc/SiFive/fe310.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
struct hifive1 : public sc_core::sc_module {
|
|
||||||
|
|
||||||
SC_HAS_PROCESS(hifive1);
|
|
||||||
|
|
||||||
sc_core::sc_in<bool> erst_n;
|
|
||||||
sc_core::sc_in<double> vref_i;
|
|
||||||
#define PORT_DECL(z, n, _) sc_core::sc_in<double> adc_ch##n##_i;
|
|
||||||
BOOST_PP_REPEAT(8, PORT_DECL, _);
|
|
||||||
#undef PORT_DECL
|
|
||||||
sc_core::sc_out<sc_dt::sc_logic> ha_o, la_o, hb_o, lb_o,hc_o, lc_o;
|
|
||||||
|
|
||||||
hifive1(sc_core::sc_module_name nm);
|
|
||||||
|
|
||||||
protected:
|
|
||||||
sc_core::sc_vector<tlm::tlm_signal<sc_dt::sc_logic>> s_gpio;
|
|
||||||
sc_core::sc_vector<scc::tlm_signal_logic_in> h_bridge;
|
|
||||||
fe310 i_fe310;
|
|
||||||
terminal i_terminal;
|
|
||||||
mcp_3208 i_adc;
|
|
||||||
};
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /* _SYSC_SIFIVE_HIFIVE1_H_ */
|
|
||||||
@@ -1,120 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _SYSC_TOP_MCP3008_H_
|
|
||||||
#define _SYSC_TOP_MCP3008_H_
|
|
||||||
|
|
||||||
#include "cci_configuration"
|
|
||||||
#include "scc/signal_initiator_mixin.h"
|
|
||||||
#include "scc/signal_target_mixin.h"
|
|
||||||
#include "sysc/tlm_extensions.h"
|
|
||||||
#include <sysc/kernel/sc_module.h>
|
|
||||||
#include <sysc/utils/sc_vector.h>
|
|
||||||
#include <tlm/tlm_signal.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class mcp_adc : public sc_core::sc_module {
|
|
||||||
public:
|
|
||||||
|
|
||||||
template <typename TYPE>
|
|
||||||
static std::unique_ptr<mcp_adc> create(sc_core::sc_module_name nm);
|
|
||||||
|
|
||||||
scc::tlm_signal_logic_in sck_i;
|
|
||||||
scc::tlm_signal_logic_out miso_o;
|
|
||||||
scc::tlm_signal_logic_in mosi_i;
|
|
||||||
scc::tlm_signal_logic_in cs_i;
|
|
||||||
|
|
||||||
sc_core::sc_in<double> vref_i;
|
|
||||||
sc_core::sc_vector<sc_core::sc_in<double>> ch_i;
|
|
||||||
|
|
||||||
mcp_adc(mcp_adc &other) = delete;
|
|
||||||
|
|
||||||
mcp_adc(mcp_adc &&other) = delete;
|
|
||||||
|
|
||||||
mcp_adc &operator=(mcp_adc &other) = delete;
|
|
||||||
|
|
||||||
mcp_adc &operator=(mcp_adc &&other) = delete;
|
|
||||||
|
|
||||||
~mcp_adc() override = default;
|
|
||||||
|
|
||||||
protected:
|
|
||||||
mcp_adc(sc_core::sc_module_name nm, size_t channel_no)
|
|
||||||
: sc_core::sc_module(nm)
|
|
||||||
, NAMED(sck_i)
|
|
||||||
, NAMED(miso_o)
|
|
||||||
, NAMED(mosi_i)
|
|
||||||
, NAMED(cs_i)
|
|
||||||
, NAMED(vref_i)
|
|
||||||
, NAMED(ch_i, channel_no) {}
|
|
||||||
};
|
|
||||||
|
|
||||||
class mcp_3008 : public mcp_adc {
|
|
||||||
public:
|
|
||||||
SC_HAS_PROCESS(mcp_3008);// NOLINT
|
|
||||||
|
|
||||||
mcp_3008(sc_core::sc_module_name nm);
|
|
||||||
~mcp_3008() override = default;
|
|
||||||
|
|
||||||
private:
|
|
||||||
tlm::tlm_sync_enum receive(tlm::tlm_signal_gp<sc_dt::sc_logic> &, tlm::tlm_phase &, sc_core::sc_time &);
|
|
||||||
void do_conversion();
|
|
||||||
unsigned idx, rx_bits;
|
|
||||||
std::array<uint8_t, 3> rx_bytes, tx_bytes;
|
|
||||||
sc_dt::sc_logic mosi_v, miso_v, cs_v;
|
|
||||||
sysc::tlm_signal_spi_extension *ext, tx_ext;
|
|
||||||
sc_core::sc_time last_tx_start;
|
|
||||||
};
|
|
||||||
|
|
||||||
class mcp_3208 : public mcp_adc {
|
|
||||||
public:
|
|
||||||
SC_HAS_PROCESS(mcp_3208);// NOLINT
|
|
||||||
|
|
||||||
mcp_3208(sc_core::sc_module_name nm);
|
|
||||||
~mcp_3208() override = default;
|
|
||||||
|
|
||||||
private:
|
|
||||||
tlm::tlm_sync_enum receive(tlm::tlm_signal_gp<sc_dt::sc_logic> &, tlm::tlm_phase &, sc_core::sc_time &);
|
|
||||||
void sample_inputs();
|
|
||||||
void do_conversion();
|
|
||||||
unsigned idx, rx_bits, byte_offs, bit_offs;
|
|
||||||
std::array<uint8_t, 3> rx_bytes, tx_bytes;
|
|
||||||
sc_dt::sc_logic mosi_v, sck_v, cs_v;
|
|
||||||
sysc::tlm_signal_spi_extension *ext, tx_ext;
|
|
||||||
sc_core::sc_time last_tx_start;
|
|
||||||
sc_core::sc_event clk_sample_evt;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
|
|
||||||
#endif /* _SYSC_TOP_MCP3008_H_ */
|
|
||||||
@@ -1,62 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef __SYSC_GENERAL_SYSTEM_H_
|
|
||||||
#define __SYSC_GENERAL_SYSTEM_H_
|
|
||||||
|
|
||||||
#include "dcmotor.h"
|
|
||||||
#include "h_bridge.h"
|
|
||||||
#include <memory>
|
|
||||||
#include <systemc>
|
|
||||||
#include "hifive1.h"
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
class system : sc_core::sc_module {
|
|
||||||
public:
|
|
||||||
SC_HAS_PROCESS(system);// NOLINT
|
|
||||||
|
|
||||||
system(sc_core::sc_module_name nm);
|
|
||||||
virtual ~system();
|
|
||||||
|
|
||||||
private:
|
|
||||||
sc_core::sc_signal<sc_dt::sc_logic> s_ha, s_la, s_hb, s_lb, s_hc, s_lc;
|
|
||||||
sc_core::sc_signal<bool> s_rst_n;
|
|
||||||
sc_core::sc_signal<double> s_vref, s_va, s_vb, s_vc, s_vasens, s_vbsens, s_vcsens, s_vcentersens;
|
|
||||||
sc_core::sc_vector<sc_core::sc_signal<double>> s_ana;
|
|
||||||
sysc::hifive1 i_hifive1;
|
|
||||||
sysc::h_bridge i_h_bridge;
|
|
||||||
sysc::dc_motor i_motor;
|
|
||||||
void gen_por();
|
|
||||||
};
|
|
||||||
}
|
|
||||||
#endif /* __SYSC_GENERAL_SYSTEM_H_ */
|
|
||||||
@@ -1,69 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef _SYSC_TOP_TERMINAL_H_
|
|
||||||
#define _SYSC_TOP_TERMINAL_H_
|
|
||||||
|
|
||||||
#include "cci_configuration"
|
|
||||||
#include "scc/signal_initiator_mixin.h"
|
|
||||||
#include "scc/signal_target_mixin.h"
|
|
||||||
#include "tlm/tlm_signal.h"
|
|
||||||
#include <memory>
|
|
||||||
#include <sysc/kernel/sc_module.h>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
class WsHandler;
|
|
||||||
|
|
||||||
class terminal : public sc_core::sc_module {
|
|
||||||
public:
|
|
||||||
scc::tlm_signal_logic_out tx_o;
|
|
||||||
scc::tlm_signal_logic_in rx_i;
|
|
||||||
|
|
||||||
terminal();
|
|
||||||
|
|
||||||
terminal(const sc_core::sc_module_name &nm);
|
|
||||||
|
|
||||||
virtual ~terminal();
|
|
||||||
|
|
||||||
cci::cci_param<bool> write_to_ws;
|
|
||||||
|
|
||||||
protected:
|
|
||||||
void before_end_of_elaboration();
|
|
||||||
void receive(tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, sc_core::sc_time &delay);
|
|
||||||
|
|
||||||
std::vector<uint8_t> queue;
|
|
||||||
std::shared_ptr<sysc::WsHandler> handler;
|
|
||||||
sc_core::sc_time last_tx_start = sc_core::SC_ZERO_TIME;
|
|
||||||
};
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /* _SYSC_TOP_TERMINAL_H_ */
|
|
||||||
@@ -1,112 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#include "CLIParser.h"
|
|
||||||
#include <scc/report.h>
|
|
||||||
#include <iostream>
|
|
||||||
#include <iss/log_categories.h>
|
|
||||||
#include <stdexcept>
|
|
||||||
|
|
||||||
namespace po = boost::program_options;
|
|
||||||
using namespace sc_core;
|
|
||||||
|
|
||||||
CLIParser::CLIParser(int argc, char *argv[])
|
|
||||||
: desc("Options")
|
|
||||||
, valid(false) {
|
|
||||||
scc::init_logging();
|
|
||||||
LOGGER(DEFAULT)::reporting_level() = logging::WARNING;
|
|
||||||
LOGGER(connection)::reporting_level() = logging::WARNING;
|
|
||||||
LOGGER(SystemC)::reporting_level() = logging::WARNING;
|
|
||||||
|
|
||||||
build();
|
|
||||||
try {
|
|
||||||
po::store(po::parse_command_line(argc, argv, desc), vm_); // can throw
|
|
||||||
// --help option
|
|
||||||
if (vm_.count("help")) {
|
|
||||||
std::cout << "DBT-RISE-RiscV simulator for RISC-V" << std::endl << desc << std::endl;
|
|
||||||
}
|
|
||||||
po::notify(vm_); // throws on error, so do after help in case there are any problems
|
|
||||||
valid = true;
|
|
||||||
} catch (po::error &e) {
|
|
||||||
std::cerr << "ERROR: " << e.what() << std::endl << std::endl;
|
|
||||||
std::cerr << desc << std::endl;
|
|
||||||
}
|
|
||||||
if (vm_.count("verbose")) { // NONE, FATAL, ERROR, WARNING, INFO, DEBUG, TRACE
|
|
||||||
const std::array<int, 8> verbosity = {SC_NONE, // Logging::NONE
|
|
||||||
SC_LOW, // Logging::FATAL
|
|
||||||
SC_LOW, // Logging::ERROR
|
|
||||||
SC_LOW, // Logging::WARNING
|
|
||||||
SC_MEDIUM, // Logging::INFO
|
|
||||||
SC_HIGH, // logging::DEBUG
|
|
||||||
SC_FULL, // logging::TRACE
|
|
||||||
SC_DEBUG}; // logging::TRACE+1
|
|
||||||
auto log_level = vm_["verbose"].as<int>();
|
|
||||||
auto l = logging::as_log_level(log_level > 6 ? 6 : log_level);
|
|
||||||
LOGGER(DEFAULT)::reporting_level() = l;
|
|
||||||
LOGGER(DEFAULT)::print_time() = false;
|
|
||||||
LOGGER(connection)::reporting_level() = l;
|
|
||||||
LOGGER(connection)::print_time() = false;
|
|
||||||
LOGGER(SystemC)::reporting_level() = l;
|
|
||||||
LOGGER(SystemC)::print_time() = false;
|
|
||||||
sc_report_handler::set_verbosity_level(verbosity[log_level]);
|
|
||||||
}
|
|
||||||
if (vm_.count("log-file")) {
|
|
||||||
// configure the connection logger
|
|
||||||
auto f = fopen(vm_["log-file"].as<std::string>().c_str(), "w");
|
|
||||||
LOG_OUTPUT(DEFAULT)::stream() = f;
|
|
||||||
LOG_OUTPUT(connection)::stream() = f;
|
|
||||||
LOG_OUTPUT(SystemC)::stream() = f;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void CLIParser::build() {
|
|
||||||
// clang-format off
|
|
||||||
desc.add_options()
|
|
||||||
("help,h", "Print help message")
|
|
||||||
("verbose,v", po::value<int>()->implicit_value(3), "Sets logging verbosity")
|
|
||||||
("log-file", po::value<std::string>(), "Sets default log file.")
|
|
||||||
("disass,d", po::value<std::string>()->implicit_value(""), "Enables disassembly")
|
|
||||||
("elf,l", po::value<std::string>(), "ELF file to load")
|
|
||||||
("gdb-port,g", po::value<unsigned short>()->default_value(0), "enable gdb server and specify port to use")
|
|
||||||
("dump-ir", "dump the intermediate representation")
|
|
||||||
("quantum", po::value<unsigned>(), "SystemC quantum time in ns")
|
|
||||||
("reset,r", po::value<std::string>(), "reset address")
|
|
||||||
("trace-level,t", po::value<unsigned>()->default_value(0), "enable tracing, or combination of 1=signals and 2=TX text, 4=TX compressed text, 6=TX in SQLite")
|
|
||||||
("trace-default-on", "enables tracing for all unspecified modules")
|
|
||||||
("trace-file", po::value<std::string>()->default_value("system"), "set th ename of the trace file")
|
|
||||||
("max_time,m", po::value<std::string>(), "maximum time to run")
|
|
||||||
("config-file,c", po::value<std::string>()->default_value(""), "read configuration from file")
|
|
||||||
("dump-config,dc", po::value<std::string>()->default_value(""), "dump configuration to file file");
|
|
||||||
// clang-format on
|
|
||||||
}
|
|
||||||
|
|
||||||
CLIParser::~CLIParser() = default;
|
|
||||||
@@ -1,60 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef PLATFORM_SRC_CLIPARSER_H_
|
|
||||||
#define PLATFORM_SRC_CLIPARSER_H_
|
|
||||||
|
|
||||||
#include <boost/program_options.hpp>
|
|
||||||
#include <memory>
|
|
||||||
|
|
||||||
class CLIParser {
|
|
||||||
public:
|
|
||||||
CLIParser(int argc, char *argv[]);
|
|
||||||
|
|
||||||
virtual ~CLIParser();
|
|
||||||
|
|
||||||
bool is_valid() { return valid; }
|
|
||||||
|
|
||||||
const boost::program_options::variables_map &vm() { return vm_; }
|
|
||||||
|
|
||||||
bool is_set(const char *option) { return vm_.count(option) != 0; }
|
|
||||||
|
|
||||||
template <typename T> const T &get(const char *option) { return vm_[option].as<T>(); }
|
|
||||||
|
|
||||||
private:
|
|
||||||
void build();
|
|
||||||
bool valid;
|
|
||||||
boost::program_options::variables_map vm_;
|
|
||||||
boost::program_options::options_description desc;
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif /* PLATFORM_SRC_CLIPARSER_H_ */
|
|
||||||
@@ -1,106 +0,0 @@
|
|||||||
# library files
|
|
||||||
FILE(GLOB RiscVSCHeaders ${PROJECT_SOURCE_DIR}/incl/sysc/*.h ${PROJECT_SOURCE_DIR}/incl/sysc/*/*.h)
|
|
||||||
set(LIB_HEADERS ${RiscVSCHeaders} )
|
|
||||||
set(LIB_SOURCES
|
|
||||||
sysc/aon.cpp
|
|
||||||
sysc/BLDC.cpp
|
|
||||||
sysc/clint.cpp
|
|
||||||
sysc/dcmotor.cpp
|
|
||||||
sysc/gpio.cpp
|
|
||||||
sysc/h_bridge.cpp
|
|
||||||
sysc/hifive1.cpp
|
|
||||||
sysc/fe310.cpp
|
|
||||||
sysc/mcp_adc.cpp
|
|
||||||
sysc/plic.cpp
|
|
||||||
sysc/prci.cpp
|
|
||||||
sysc/pwm.cpp
|
|
||||||
sysc/sc_comm_singleton.cpp
|
|
||||||
sysc/spi.cpp
|
|
||||||
sysc/system.cpp
|
|
||||||
sysc/terminal.cpp
|
|
||||||
sysc/uart.cpp
|
|
||||||
CLIParser.cpp )
|
|
||||||
|
|
||||||
set(APP_SOURCES sc_main.cpp)
|
|
||||||
|
|
||||||
# Define two variables in order not to repeat ourselves.
|
|
||||||
set(LIBRARY_NAME platform)
|
|
||||||
|
|
||||||
## the following setting needs to be consistent with the library
|
|
||||||
#add_definitions(-DSC_DEFAULT_WRITER_POLICY=SC_MANY_WRITERS)
|
|
||||||
|
|
||||||
# Define the library
|
|
||||||
add_library(${LIBRARY_NAME} SHARED ${LIB_SOURCES})
|
|
||||||
|
|
||||||
# Links the target exe against the libraries
|
|
||||||
target_link_libraries(${LIBRARY_NAME} riscv_sc)
|
|
||||||
target_link_libraries(${LIBRARY_NAME} dbt-core)
|
|
||||||
target_link_libraries(${LIBRARY_NAME} softfloat)
|
|
||||||
target_link_libraries(${LIBRARY_NAME} sc-components)
|
|
||||||
target_link_libraries(${LIBRARY_NAME} ${CONAN_LIBS_SEASOCKS})
|
|
||||||
target_link_libraries(${LIBRARY_NAME} external)
|
|
||||||
target_link_libraries(${LIBRARY_NAME} ${llvm_libs})
|
|
||||||
target_link_libraries(${LIBRARY_NAME} ${Boost_LIBRARIES} )
|
|
||||||
|
|
||||||
set_target_properties(${LIBRARY_NAME} PROPERTIES
|
|
||||||
VERSION ${VERSION} # ${VERSION} was defined in the main CMakeLists.
|
|
||||||
FRAMEWORK FALSE
|
|
||||||
PUBLIC_HEADER "${LIB_HEADERS}" # specify the public headers
|
|
||||||
)
|
|
||||||
|
|
||||||
# This is a make target, so you can do a "make riscv-sc"
|
|
||||||
set(APPLICATION_NAME riscv.vp)
|
|
||||||
|
|
||||||
include_directories(${PROJECT_SOURCE_DIR}/incl)
|
|
||||||
include_directories(${CONAN_INCLUDE_DIRS_SEASOCKS})
|
|
||||||
add_definitions(-DWITH_SYSTEMC) # or -DSC_NO_WRITE_CHECK
|
|
||||||
include_directories(${SystemC_INCLUDE_DIRS})
|
|
||||||
include_directories(${CCI_INCLUDE_DIRS})
|
|
||||||
if(SCV_FOUND)
|
|
||||||
add_definitions(-DWITH_SCV)
|
|
||||||
include_directories(${SCV_INCLUDE_DIRS})
|
|
||||||
endif()
|
|
||||||
|
|
||||||
|
|
||||||
link_directories(${SystemC_LIBRARY_DIRS})
|
|
||||||
link_directories(${CCI_LIBRARY_DIRS})
|
|
||||||
link_directories(${CONAN_LIB_DIRS_SEASOCKS})
|
|
||||||
|
|
||||||
add_executable(${APPLICATION_NAME} ${APP_SOURCES})
|
|
||||||
# include files for this application
|
|
||||||
target_include_directories(${APPLICATION_NAME} SYSTEM PRIVATE ${LLVM_INCLUDE_DIRS})
|
|
||||||
# Links the target exe against the libraries
|
|
||||||
target_link_libraries(${APPLICATION_NAME} ${LIBRARY_NAME})
|
|
||||||
target_link_libraries(${APPLICATION_NAME} riscv_sc)
|
|
||||||
target_link_libraries(${APPLICATION_NAME} dbt-core)
|
|
||||||
target_link_libraries(${APPLICATION_NAME} softfloat)
|
|
||||||
target_link_libraries(${APPLICATION_NAME} sc-components)
|
|
||||||
target_link_libraries(${APPLICATION_NAME} ${CONAN_LIBS_SEASOCKS})
|
|
||||||
target_link_libraries(${APPLICATION_NAME} external)
|
|
||||||
target_link_libraries(${APPLICATION_NAME} ${llvm_libs})
|
|
||||||
target_link_libraries(${APPLICATION_NAME} ${CCI_LIBRARIES} )
|
|
||||||
target_link_libraries(${APPLICATION_NAME} ${SystemC_LIBRARIES} )
|
|
||||||
if(SCV_FOUND)
|
|
||||||
link_directories(${SCV_LIBRARY_DIRS})
|
|
||||||
target_link_libraries (${APPLICATION_NAME} ${SCV_LIBRARIES})
|
|
||||||
endif()
|
|
||||||
target_link_libraries(${APPLICATION_NAME} ${Boost_LIBRARIES} )
|
|
||||||
if (Tcmalloc_FOUND)
|
|
||||||
target_link_libraries(${APPLICATION_NAME} ${Tcmalloc_LIBRARIES})
|
|
||||||
endif(Tcmalloc_FOUND)
|
|
||||||
|
|
||||||
# Says how and where to install software
|
|
||||||
# Targets:
|
|
||||||
# * <prefix>/lib/<libraries>
|
|
||||||
# * header location after install: <prefix>/include/<project>/*.h
|
|
||||||
# * headers can be included by C++ code `#<project>/Bar.hpp>`
|
|
||||||
install(TARGETS ${LIBRARY_NAME} ${APPLICATION_NAME}
|
|
||||||
EXPORT ${PROJECT_NAME}Targets # for downstream dependencies
|
|
||||||
ARCHIVE DESTINATION lib COMPONENT libs # static lib
|
|
||||||
RUNTIME DESTINATION bin COMPONENT libs # binaries
|
|
||||||
LIBRARY DESTINATION lib COMPONENT libs # shared lib
|
|
||||||
FRAMEWORK DESTINATION bin COMPONENT libs # for mac
|
|
||||||
PUBLIC_HEADER DESTINATION incl/${PROJECT_NAME} COMPONENT devel # headers for mac (note the different component -> different package)
|
|
||||||
INCLUDES DESTINATION incl # headers
|
|
||||||
)
|
|
||||||
|
|
||||||
@@ -1,142 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#include "CLIParser.h"
|
|
||||||
#include <sysc/top/system.h>
|
|
||||||
#include <iss/log_categories.h>
|
|
||||||
|
|
||||||
#include <scc/configurable_tracer.h>
|
|
||||||
#include <scc/configurer.h>
|
|
||||||
#include <scc/report.h>
|
|
||||||
#include <scc/scv_tr_db.h>
|
|
||||||
#include <scc/tracer.h>
|
|
||||||
#include <scc/perf_estimator.h>
|
|
||||||
|
|
||||||
#include <cci_utils/broker.h>
|
|
||||||
|
|
||||||
#include <boost/program_options.hpp>
|
|
||||||
#include <iss/llvm/jit_helper.h>
|
|
||||||
#include <fstream>
|
|
||||||
#include <sstream>
|
|
||||||
|
|
||||||
using namespace sysc;
|
|
||||||
namespace po = boost::program_options;
|
|
||||||
|
|
||||||
namespace {
|
|
||||||
const size_t ERROR_IN_COMMAND_LINE = 1;
|
|
||||||
const size_t SUCCESS = 0;
|
|
||||||
const size_t ERROR_UNHANDLED_EXCEPTION = 2;
|
|
||||||
} // namespace
|
|
||||||
|
|
||||||
int sc_main(int argc, char *argv[]) {
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
// SystemC >=2.2 got picky about multiple drivers so disable check
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
sc_report_handler::set_actions(SC_ID_MORE_THAN_ONE_SIGNAL_DRIVER_, SC_DO_NOTHING);
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
// create global CCI broker
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
cci::cci_register_broker(new cci_utils::broker("Global Broker"));
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
// CLI argument parsing & logging setup
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
CLIParser parser(argc, argv);
|
|
||||||
if (!parser.is_valid()) return ERROR_IN_COMMAND_LINE;
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
// set up infrastructure
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
iss::init_jit(argc, argv);
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
// set up configuration
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
scc::configurer cfg(parser.get<std::string>("config-file"));
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
// set up tracing & transaction recording
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
auto trace_level = parser.get<unsigned>("trace-level");
|
|
||||||
scc::configurable_tracer trace(parser.get<std::string>("trace-file"),
|
|
||||||
static_cast<scc::tracer::file_type>(trace_level >> 1), // bit3-bit1 define the kind of transaction trace
|
|
||||||
(trace_level&0x1) != 0, // bit0 enables vcd
|
|
||||||
parser.is_set("trace-default-on"));
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
// instantiate top level
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
auto i_system = std::make_unique<sysc::system>("i_system");
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
// add non-implemented 'enableTracing' properties
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
trace.add_control();
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
// dump configuration if requested
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
if (parser.get<std::string>("dump-config").size() > 0) {
|
|
||||||
std::ofstream of{parser.get<std::string>("dump-config")};
|
|
||||||
if (of.is_open()) cfg.dump_configuration(of);
|
|
||||||
}
|
|
||||||
cfg.configure();
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
// overwrite config with command line settings
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
cfg.set_value("i_system.i_hifive1.i_fe310.i_core_complex.gdb_server_port", parser.get<unsigned short>("gdb-port"));
|
|
||||||
cfg.set_value("i_system.i_hifive1.i_fe310.i_core_complex.dump_ir", parser.is_set("dump-ir"));
|
|
||||||
if (parser.is_set("elf")) cfg.set_value("i_system.i_hifive1.i_fe310.i_core_complex.elf_file", parser.get<std::string>("elf"));
|
|
||||||
if (parser.is_set("quantum"))
|
|
||||||
tlm::tlm_global_quantum::instance().set(sc_core::sc_time(parser.get<unsigned>("quantum"), sc_core::SC_NS));
|
|
||||||
if (parser.is_set("reset")) {
|
|
||||||
auto str = parser.get<std::string>("reset");
|
|
||||||
uint64_t start_address = str.find("0x") == 0 ? std::stoull(str.substr(2), nullptr, 16) : std::stoull(str, nullptr, 10);
|
|
||||||
cfg.set_value("i_system.i_hifive1.i_fe310.i_core_complex.reset_address", start_address);
|
|
||||||
}
|
|
||||||
if (parser.is_set("disass")) {
|
|
||||||
cfg.set_value("i_system.i_hifive1.i_fe310.i_core_complex.enable_disass", true);
|
|
||||||
LOGGER(disass)::reporting_level() = logging::INFO;
|
|
||||||
auto file_name = parser.get<std::string>("disass");
|
|
||||||
if (file_name.length() > 0) {
|
|
||||||
LOG_OUTPUT(disass)::stream() = fopen(file_name.c_str(), "w");
|
|
||||||
LOGGER(disass)::print_time() = false;
|
|
||||||
LOGGER(disass)::print_severity() = false;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
// run simulation
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
|
||||||
try {
|
|
||||||
if (parser.is_set("max_time")) {
|
|
||||||
sc_core::sc_start(scc::parse_from_string(parser.get<std::string>("max_time")));
|
|
||||||
} else
|
|
||||||
sc_core::sc_start();
|
|
||||||
if (!sc_core::sc_end_of_simulation_invoked()) sc_core::sc_stop();
|
|
||||||
} catch (sc_core::sc_report &rep) {
|
|
||||||
sc_core::sc_report_handler::get_handler()(rep, sc_core::SC_DISPLAY | sc_core::SC_STOP);
|
|
||||||
}
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
@@ -1,188 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#include "sysc/top/BLDC.h"
|
|
||||||
|
|
||||||
// implementation according to Modeling of BLDC Motor with Ideal Back-EMF for Automotive Applications
|
|
||||||
// Proceedings of the World Congress on Engineering 2011 Vol II WCE 2011, July 6 - 8, 2011, London, U.K.
|
|
||||||
BLDC::BLDC(const Config config)
|
|
||||||
: config(config)
|
|
||||||
, stateVector({{0.0, 0.0, 0.0, 0.0, 0.0}})
|
|
||||||
, state(stateVector)
|
|
||||||
, vin({{0.0, 0.0, 0.0}})
|
|
||||||
, voltages({{0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0}}) {
|
|
||||||
state.init();
|
|
||||||
}
|
|
||||||
|
|
||||||
BLDC::~BLDC() = default;
|
|
||||||
|
|
||||||
double BLDC::calc_bemf_factor(const State &x, double theta) {
|
|
||||||
if (theta >= 0 && theta < 2. / 3. * M_PI) {
|
|
||||||
return 1;
|
|
||||||
} else if (theta >= 2. / 3. * M_PI && theta < M_PI) {
|
|
||||||
return 1 - 6 / M_PI * (theta - 2. / 3. * M_PI);
|
|
||||||
} else if (theta >= M_PI && theta < 5. / 3. * M_PI) {
|
|
||||||
return -1;
|
|
||||||
} else if (theta >= 5. / 3. * M_PI && theta <= 2. * M_PI) {
|
|
||||||
return -1 + 6 / M_PI * (theta - 5. / 3. * M_PI);
|
|
||||||
} else {
|
|
||||||
fprintf(stderr, "ERROR: angle out of bounds can not calculate bemf %f\n", theta);
|
|
||||||
throw std::runtime_error("angle out of bounds can not calculate bemf");
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void BLDC::calc_back_emf(const State &state, double theta_e) {
|
|
||||||
double max_bemf = config.Ke * state.omega;
|
|
||||||
theta_e-=M_PI * (1. / 3.);
|
|
||||||
voltages[EA] = max_bemf * calc_bemf_factor(state, norm_angle(theta_e));
|
|
||||||
voltages[EB] = max_bemf * calc_bemf_factor(state, norm_angle(theta_e + M_PI * (2. / 3.)));
|
|
||||||
voltages[EC] = max_bemf * calc_bemf_factor(state, norm_angle(theta_e + M_PI * (4. / 3.)));
|
|
||||||
}
|
|
||||||
|
|
||||||
void BLDC::calc_voltages() {
|
|
||||||
const double NaN = nan("");
|
|
||||||
/* Check which phases are excited. */
|
|
||||||
bool pa = isnan(vin[0]) ? false : true;
|
|
||||||
bool pb = isnan(vin[1]) ? false : true;
|
|
||||||
bool pc = isnan(vin[2]) ? false : true;
|
|
||||||
|
|
||||||
if (pa && pb && pc) {
|
|
||||||
voltages[VA] = vin[0];
|
|
||||||
voltages[VB] = vin[1];
|
|
||||||
voltages[VC] = vin[2];
|
|
||||||
voltages[VCENTER] =
|
|
||||||
(voltages[VA] + voltages[VB] + voltages[VC] - voltages[EA] - voltages[EB] - voltages[EC]) / 3.;
|
|
||||||
} else if (pa && pb) {
|
|
||||||
voltages[VA] = vin[0];
|
|
||||||
voltages[VB] = vin[1];
|
|
||||||
voltages[VCENTER] = (voltages[VA] + voltages[VB] - voltages[EA] - voltages[EB]) / 2.;
|
|
||||||
voltages[VC] = voltages[EC] + voltages[VCENTER];
|
|
||||||
} else if (pa && pc) {
|
|
||||||
voltages[VA] = vin[0];
|
|
||||||
voltages[VC] = vin[2];
|
|
||||||
voltages[VCENTER] = (voltages[VA] + voltages[VC] - voltages[EA] - voltages[EC]) / 2.;
|
|
||||||
voltages[VB] = voltages[EB] + voltages[VCENTER];
|
|
||||||
} else if (pb && pc) {
|
|
||||||
voltages[VB] = vin[1];
|
|
||||||
voltages[VC] = vin[2];
|
|
||||||
voltages[VCENTER] = (voltages[VB] + voltages[VC] - voltages[EB] - voltages[EC]) / 2.;
|
|
||||||
voltages[VA] = voltages[EA] + voltages[VCENTER];
|
|
||||||
} else if (pa) {
|
|
||||||
voltages[VA] = vin[0];
|
|
||||||
voltages[VCENTER] = (voltages[VA] - voltages[EA]);
|
|
||||||
voltages[VB] = voltages[EB] + voltages[VCENTER];
|
|
||||||
voltages[VC] = voltages[EC] + voltages[VCENTER];
|
|
||||||
} else if (pb) {
|
|
||||||
voltages[VB] = vin[1];
|
|
||||||
voltages[VCENTER] = (voltages[VB] - voltages[EB]);
|
|
||||||
voltages[VA] = voltages[EA] + voltages[VCENTER];
|
|
||||||
voltages[VC] = voltages[EC] + voltages[VCENTER];
|
|
||||||
} else if (pc) {
|
|
||||||
voltages[VC] = vin[0];
|
|
||||||
voltages[VCENTER] = (voltages[VC] - voltages[EC]);
|
|
||||||
voltages[VA] = voltages[EA] + voltages[VCENTER];
|
|
||||||
voltages[VB] = voltages[EB] + voltages[VCENTER];
|
|
||||||
} else {
|
|
||||||
voltages[VA] = voltages[EA];
|
|
||||||
voltages[VB] = voltages[EB];
|
|
||||||
voltages[VC] = voltages[EC];
|
|
||||||
voltages[VCENTER] = 0;
|
|
||||||
// return;
|
|
||||||
}
|
|
||||||
auto vmax = std::max({pa ? vin[0] : 0, pb ? vin[1] : 0, pc ? vin[2] : 0});
|
|
||||||
voltages[VCENTER] = vmax / 2;
|
|
||||||
}
|
|
||||||
|
|
||||||
void BLDC::printToStream(std::ostream &os) const {
|
|
||||||
os << state.omega << ";" << state.theta << ";" << state.ia << ";" << state.ib << ";" << state.ic << ";"
|
|
||||||
<< voltages[VA] << ";" << voltages[VB] << ";" << voltages[VC] << ";" << voltages[EA] << ";" << voltages[EB]
|
|
||||||
<< ";" << voltages[EC] << ";" << voltages[VCENTER] << ";" << vin[0] << ";" << vin[1] << ";" << vin[2] << ";"
|
|
||||||
<< etorque;
|
|
||||||
}
|
|
||||||
|
|
||||||
void BLDC::rotor_dyn(const StateVector &x_, StateVector &dxdt_, const double t) {
|
|
||||||
const State x(const_cast<StateVector &>(x_));
|
|
||||||
State dxdt(dxdt_);
|
|
||||||
double theta_e = state.theta * (config.NbPoles / 2.);
|
|
||||||
/* Calculate backemf voltages. */
|
|
||||||
calc_back_emf(x, theta_e);
|
|
||||||
/* Calculate voltages. */
|
|
||||||
calc_voltages();
|
|
||||||
/* Electromagnetic torque. */
|
|
||||||
// if (x.omega == 0) {
|
|
||||||
// printf("ERROR: input state vector omega equals 0!!!\n");
|
|
||||||
// throw std::runtime_error("input state vector omega equals 0");
|
|
||||||
// }
|
|
||||||
/* electrical torque */
|
|
||||||
// etorque = ((voltages[EA] * x.ia) + (voltages[EB] * x.ib) + (voltages[EC] * x.ic)) / x.omega;
|
|
||||||
// which is equivalent to:
|
|
||||||
etorque = config.Ke * (x.ia * (calc_bemf_factor(state, norm_angle(theta_e))) +
|
|
||||||
x.ib * (calc_bemf_factor(state, norm_angle(theta_e + M_PI * (2. / 3.)))) +
|
|
||||||
x.ic * (calc_bemf_factor(state, norm_angle(theta_e + M_PI * (4. / 3.)))));
|
|
||||||
/* Mechanical torque. */
|
|
||||||
mtorque = ((etorque * (config.NbPoles / 2)) - (config.damping * x.omega) - torque_load);
|
|
||||||
|
|
||||||
if ((mtorque > 0) && (mtorque <= config.static_friction)) {
|
|
||||||
mtorque = 0;
|
|
||||||
} else if (mtorque > config.static_friction) {
|
|
||||||
mtorque -= config.static_friction;
|
|
||||||
} else if ((mtorque < 0) && (mtorque >= -(config.static_friction))) {
|
|
||||||
mtorque = 0;
|
|
||||||
} else if (mtorque < -(config.static_friction)) {
|
|
||||||
mtorque += config.static_friction;
|
|
||||||
}
|
|
||||||
/* Position of the rotor */
|
|
||||||
dxdt.theta = x.omega;
|
|
||||||
/* Acceleration of the rotor. (omega_dot) */
|
|
||||||
// a=M/J with M->torque, J->Inertia, a->angular acceleration
|
|
||||||
dxdt.omega = mtorque / config.inertia;
|
|
||||||
/* Calculate dot currents. */
|
|
||||||
dxdt.ia = (voltages[VA] - (config.R * x.ia) - voltages[EA] - voltages[VCENTER]) / (config.L - config.M);
|
|
||||||
dxdt.ib = (voltages[VB] - (config.R * x.ib) - voltages[EB] - voltages[VCENTER]) / (config.L - config.M);
|
|
||||||
dxdt.ic = (voltages[VC] - (config.R * x.ic) - voltages[EC] - voltages[VCENTER]) / (config.L - config.M);
|
|
||||||
}
|
|
||||||
|
|
||||||
void BLDC::run(double incr) {
|
|
||||||
if (dt > incr) throw std::runtime_error("incr needs to be larger than dt");
|
|
||||||
double next_time = current_time + incr;
|
|
||||||
odeint::integrate_adaptive(
|
|
||||||
make_controlled(1.0e-10, 1.0e-6, stepper_type()),
|
|
||||||
[this](const StateVector &x, StateVector &dxdt, double t) { this->rotor_dyn(x, dxdt, t); }, stateVector,
|
|
||||||
current_time, next_time, dt);
|
|
||||||
current_time = next_time;
|
|
||||||
state.theta = norm_angle(state.theta);
|
|
||||||
}
|
|
||||||
|
|
||||||
std::ostream &operator<<(std::ostream &os, const BLDC &bldc) {
|
|
||||||
bldc.printToStream(os);
|
|
||||||
return os;
|
|
||||||
}
|
|
||||||
@@ -1,78 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
* Contributors:
|
|
||||||
* eyck@minres.com - initial implementation
|
|
||||||
*
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#include "sysc/SiFive/aon.h"
|
|
||||||
|
|
||||||
#include "scc/utilities.h"
|
|
||||||
#include "sysc/SiFive/gen/aon_regs.h"
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
aon::aon(sc_core::sc_module_name nm)
|
|
||||||
: sc_core::sc_module(nm)
|
|
||||||
, tlm_target<>(clk)
|
|
||||||
, NAMED(clk_i)
|
|
||||||
, NAMED(erst_n_i)
|
|
||||||
, NAMED(lfclkc_o)
|
|
||||||
, NAMED(rst_o)
|
|
||||||
, NAMEDD(regs, aon_regs) {
|
|
||||||
regs->registerResources(*this);
|
|
||||||
SC_METHOD(clock_cb);
|
|
||||||
sensitive << clk_i;
|
|
||||||
SC_METHOD(reset_cb);
|
|
||||||
sensitive << erst_n_i;
|
|
||||||
}
|
|
||||||
|
|
||||||
void aon::start_of_simulation() { rst_o = true; }
|
|
||||||
|
|
||||||
void aon::clock_cb() { this->clk = clk_i.read(); }
|
|
||||||
|
|
||||||
aon::~aon() {} // NOLINT
|
|
||||||
|
|
||||||
void aon::reset_cb() {
|
|
||||||
if (!erst_n_i.read()) {
|
|
||||||
regs->reset_start();
|
|
||||||
rst_o = true;
|
|
||||||
} else {
|
|
||||||
regs->reset_stop();
|
|
||||||
rst_o = false;
|
|
||||||
}
|
|
||||||
lfclkc_o.write(sc_core::sc_time(1 / 32768., sc_core::SC_SEC));
|
|
||||||
}
|
|
||||||
|
|
||||||
void aon::reset_internal_cb() {}
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
@@ -1,124 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2017, 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#include "sysc/SiFive/clint.h"
|
|
||||||
|
|
||||||
#include "scc/report.h"
|
|
||||||
#include "scc/utilities.h"
|
|
||||||
#include "sysc/SiFive/gen/clint_regs.h"
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
using namespace sc_core;
|
|
||||||
|
|
||||||
const int lfclk_mutiplier = 1 << 12;
|
|
||||||
|
|
||||||
clint::clint(sc_core::sc_module_name nm)
|
|
||||||
: sc_core::sc_module(nm)
|
|
||||||
, tlm_target<>(clk)
|
|
||||||
, NAMED(tlclk_i)
|
|
||||||
, NAMED(lfclk_i)
|
|
||||||
, NAMED(rst_i)
|
|
||||||
, NAMED(mtime_int_o)
|
|
||||||
, NAMED(msip_int_o)
|
|
||||||
, NAMEDD(regs, clint_regs)
|
|
||||||
, cnt_fraction(0) {
|
|
||||||
regs->registerResources(*this);
|
|
||||||
SC_METHOD(clock_cb);
|
|
||||||
sensitive << tlclk_i << lfclk_i;
|
|
||||||
SC_METHOD(reset_cb);
|
|
||||||
sensitive << rst_i;
|
|
||||||
dont_initialize();
|
|
||||||
regs->mtimecmp.set_write_cb([this](scc::sc_register<uint64_t> ®, uint64_t data, sc_core::sc_time d) -> bool {
|
|
||||||
if (!regs->in_reset()) {
|
|
||||||
reg.put(data);
|
|
||||||
this->update_mtime();
|
|
||||||
}
|
|
||||||
return true;
|
|
||||||
});
|
|
||||||
regs->mtime.set_read_cb([this](const scc::sc_register<uint64_t> ®, uint64_t &data, sc_core::sc_time d) -> bool {
|
|
||||||
this->update_mtime();
|
|
||||||
data = reg.get();
|
|
||||||
return true;
|
|
||||||
});
|
|
||||||
regs->mtime.set_write_cb(
|
|
||||||
[this](scc::sc_register<uint64_t> ®, uint64_t data, sc_core::sc_time d) -> bool { return false; });
|
|
||||||
regs->msip.set_write_cb([this](scc::sc_register<uint32_t> ®, uint32_t data, sc_core::sc_time d) -> bool {
|
|
||||||
reg.put(data);
|
|
||||||
msip_int_o.write(regs->r_msip.msip);
|
|
||||||
return true;
|
|
||||||
});
|
|
||||||
SC_METHOD(update_mtime);
|
|
||||||
sensitive << mtime_evt;
|
|
||||||
dont_initialize();
|
|
||||||
}
|
|
||||||
|
|
||||||
void clint::clock_cb() {
|
|
||||||
update_mtime();
|
|
||||||
clk = lfclk_i.read();
|
|
||||||
update_mtime();
|
|
||||||
}
|
|
||||||
|
|
||||||
clint::~clint() = default;
|
|
||||||
|
|
||||||
void clint::reset_cb() {
|
|
||||||
if (rst_i.read()) {
|
|
||||||
regs->reset_start();
|
|
||||||
msip_int_o.write(false);
|
|
||||||
mtime_int_o.write(false);
|
|
||||||
cnt_fraction = 0;
|
|
||||||
} else
|
|
||||||
regs->reset_stop();
|
|
||||||
}
|
|
||||||
|
|
||||||
void clint::update_mtime() {
|
|
||||||
if (clk > SC_ZERO_TIME) {
|
|
||||||
uint64_t elapsed_clks =
|
|
||||||
(sc_time_stamp() - last_updt) / clk; // get the number of clock periods since last invocation
|
|
||||||
last_updt += elapsed_clks * clk; // increment the last_updt timestamp by the number of clocks
|
|
||||||
if (elapsed_clks) { // update mtime reg if we have more than 0 elapsed clk periods
|
|
||||||
regs->r_mtime += elapsed_clks;
|
|
||||||
mtime_evt.cancel();
|
|
||||||
if (regs->r_mtimecmp > 0)
|
|
||||||
if (regs->r_mtimecmp > regs->r_mtime && clk > sc_core::SC_ZERO_TIME) {
|
|
||||||
sc_core::sc_time next_trigger =
|
|
||||||
(clk * lfclk_mutiplier) * (regs->r_mtimecmp - regs->mtime) - cnt_fraction * clk;
|
|
||||||
SCTRACE() << "Timer fires at " << sc_time_stamp() + next_trigger;
|
|
||||||
mtime_evt.notify(next_trigger);
|
|
||||||
mtime_int_o.write(false);
|
|
||||||
} else
|
|
||||||
mtime_int_o.write(true);
|
|
||||||
}
|
|
||||||
} else
|
|
||||||
last_updt = sc_time_stamp();
|
|
||||||
}
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
@@ -1,114 +0,0 @@
|
|||||||
/*******************************************************************************
|
|
||||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
*
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
*
|
|
||||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
*******************************************************************************/
|
|
||||||
|
|
||||||
#include "sysc/top/dcmotor.h"
|
|
||||||
#include "scc/utilities.h"
|
|
||||||
#include <future>
|
|
||||||
|
|
||||||
namespace sysc {
|
|
||||||
|
|
||||||
using namespace sc_core;
|
|
||||||
|
|
||||||
auto get_config = []() -> BLDC::Config {
|
|
||||||
BLDC::Config config{};
|
|
||||||
config.Ke = 1. / 4000., // 0.01; // V/rad/s, = 1/Kv
|
|
||||||
config.R = 0.5; // Ohm
|
|
||||||
config.Ke = 0.01;
|
|
||||||
config.inertia = 0.0005;
|
|
||||||
config.NbPoles = 2;
|
|
||||||
config.damping = 0.00001;
|
|
||||||
return config;
|
|
||||||
};
|
|
||||||
|
|
||||||
dc_motor::dc_motor(const sc_module_name &nm)
|
|
||||||
: sc_module(nm)
|
|
||||||
, NAMED(va_i)
|
|
||||||
, NAMED(vb_i)
|
|
||||||
, NAMED(vc_i)
|
|
||||||
, NAMED(va_o)
|
|
||||||
, NAMED(vb_o)
|
|
||||||
, NAMED(vc_o)
|
|
||||||
, NAMED(vcenter_o)
|
|
||||||
, NAMED(max_integ_step, sc_time(10, SC_US))
|
|
||||||
, NAMED(load, 0.1)
|
|
||||||
, bldc_model(get_config())
|
|
||||||
, bldc_state(bldc_model.getState()) {
|
|
||||||
bldc_model.setLoad(0.0001);
|
|
||||||
SC_THREAD(thread);
|
|
||||||
}
|
|
||||||
|
|
||||||
dc_motor::~dc_motor() = default;
|
|
||||||
|
|
||||||
void dc_motor::trace(sc_trace_file *trf) const {
|
|
||||||
auto &ia = bldc_state.ia;
|
|
||||||
sc_core::sc_trace(trf, bldc_state.ia, std::string(this->name()) +"." "ia");
|
|
||||||
sc_core::sc_trace(trf, bldc_state.ib, std::string(this->name()) +"." "ib");
|
|
||||||
sc_core::sc_trace(trf, bldc_state.ic, std::string(this->name()) +"." "ic");
|
|
||||||
sc_core::sc_trace(trf, bldc_state.theta, std::string(this->name()) +"." "theta");
|
|
||||||
sc_core::sc_trace(trf, bldc_state.omega, std::string(this->name()) +"." "omega");
|
|
||||||
sc_core::sc_trace(trf, vout[0], std::string(this->name()) + "." "va");
|
|
||||||
sc_core::sc_trace(trf, vout[1], std::string(this->name()) + "." "vb");
|
|
||||||
sc_core::sc_trace(trf, vout[2], std::string(this->name()) + "." "vc");
|
|
||||||
sc_core::sc_trace(trf, vout[3], std::string(this->name()) + "." "vcenter");
|
|
||||||
sc_core::sc_trace(trf, vout[4], std::string(this->name()) + "." "ea");
|
|
||||||
sc_core::sc_trace(trf, vout[5], std::string(this->name()) + "." "eb");
|
|
||||||
sc_core::sc_trace(trf, vout[6], std::string(this->name()) + "." "ec");
|
|
||||||
}
|
|
||||||
|
|
||||||
void dc_motor::thread() {
|
|
||||||
const auto divider = 10.0;
|
|
||||||
wait(SC_ZERO_TIME);
|
|
||||||
std::array<double, 3> vin{0., 0., 0.};
|
|
||||||
auto eval_model = [this](std::array<double, 3> vin, const sc_time step) -> std::array<double, 7> {
|
|
||||||
bldc_model.set_input(vin);
|
|
||||||
bldc_model.run(step.to_seconds());
|
|
||||||
return bldc_model.get_voltages();
|
|
||||||
};
|
|
||||||
while (true) {
|
|
||||||
vin[0] = va_i.read();
|
|
||||||
vin[1] = vb_i.read();
|
|
||||||
vin[2] = vc_i.read();
|
|
||||||
// auto sim_res=std::async(std::launch::async, eval_model, vin, step);
|
|
||||||
auto start = sc_time_stamp();
|
|
||||||
wait(max_integ_step, va_i.value_changed_event() | vb_i.value_changed_event() | vc_i.value_changed_event());
|
|
||||||
auto diff = sc_time_stamp() - start;
|
|
||||||
if (diff.to_seconds() >= bldc_model.dt) {
|
|
||||||
vout = eval_model(vin, diff); // sim_res.get();
|
|
||||||
va_o = vout[0] / divider;
|
|
||||||
vb_o = vout[1] / divider;
|
|
||||||
vc_o = vout[2] / divider;
|
|
||||||
vcenter_o = vout[3] / divider;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
} /* namespace sysc */
|
|
||||||
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