DBT-RISE/DBT-RISE-TGC
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updates disass

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This commit is contained in:
Eyck-Alexander Jentzsch
2024-08-07 09:21:07 +02:00
parent 9c51d6eade
commit 62d21e1156
4 changed files with 159 additions and 122 deletions
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40
src/vm/interp/vm_tgc5c.cpp
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@@ -343,7 +343,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
uint32_t inst_index = instr_decoder.decode_instr(instr);
opcode_e inst_id = arch::traits<ARCH>::opcode_e::MAX_OPCODE;;
if(inst_index <instr_descr.size())
inst_id = instr_descr.at(instr_decoder.decode_instr(instr)).op;
inst_id = instr_descr[inst_index].op;
// pre execution stuff
this->core.reg.last_branch = 0;
@@ -1458,7 +1458,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
case arch::traits<ARCH>::opcode_e::ECALL: {
if(this->disass_enabled){
/* generate console output when executing the command */
this->core.disass_output(pc.val, "ecall");
//No disass specified, using instruction name
std::string mnemonic = "ecall";
this->core.disass_output(pc.val, mnemonic);
}
// used registers// calculate next pc value
*NEXT_PC = *PC + 4;
@@ -1471,7 +1473,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
case arch::traits<ARCH>::opcode_e::EBREAK: {
if(this->disass_enabled){
/* generate console output when executing the command */
this->core.disass_output(pc.val, "ebreak");
//No disass specified, using instruction name
std::string mnemonic = "ebreak";
this->core.disass_output(pc.val, mnemonic);
}
// used registers// calculate next pc value
*NEXT_PC = *PC + 4;
@@ -1484,7 +1488,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
case arch::traits<ARCH>::opcode_e::MRET: {
if(this->disass_enabled){
/* generate console output when executing the command */
this->core.disass_output(pc.val, "mret");
//No disass specified, using instruction name
std::string mnemonic = "mret";
this->core.disass_output(pc.val, mnemonic);
}
// used registers// calculate next pc value
*NEXT_PC = *PC + 4;
@@ -1497,7 +1503,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
case arch::traits<ARCH>::opcode_e::WFI: {
if(this->disass_enabled){
/* generate console output when executing the command */
this->core.disass_output(pc.val, "wfi");
//No disass specified, using instruction name
std::string mnemonic = "wfi";
this->core.disass_output(pc.val, mnemonic);
}
// used registers// calculate next pc value
*NEXT_PC = *PC + 4;
@@ -1721,7 +1729,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
if(this->disass_enabled){
/* generate console output when executing the command */
auto mnemonic = fmt::format(
"{mnemonic:10} {rs1}, {rd}, {imm}", fmt::arg("mnemonic", "fence.i"),
"{mnemonic:10} {rs1}, {rd}, {imm}", fmt::arg("mnemonic", "fence_i"),
fmt::arg("rs1", name(rs1)), fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
this->core.disass_output(pc.val, mnemonic);
}
@@ -2095,7 +2103,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
uint8_t nzimm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5));
if(this->disass_enabled){
/* generate console output when executing the command */
this->core.disass_output(pc.val, "c.nop");
//No disass specified, using instruction name
std::string mnemonic = "c.nop";
this->core.disass_output(pc.val, mnemonic);
}
// used registers// calculate next pc value
*NEXT_PC = *PC + 2;
@@ -2201,7 +2211,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
uint8_t rd = ((bit_sub<7,5>(instr)));
if(this->disass_enabled){
/* generate console output when executing the command */
this->core.disass_output(pc.val, ".reserved_clui");
//No disass specified, using instruction name
std::string mnemonic = ".reserved_clui";
this->core.disass_output(pc.val, mnemonic);
}
// used registers// calculate next pc value
*NEXT_PC = *PC + 2;
@@ -2520,7 +2532,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
case arch::traits<ARCH>::opcode_e::__reserved_cmv: {
if(this->disass_enabled){
/* generate console output when executing the command */
this->core.disass_output(pc.val, ".reserved_cmv");
//No disass specified, using instruction name
std::string mnemonic = ".reserved_cmv";
this->core.disass_output(pc.val, mnemonic);
}
// used registers// calculate next pc value
*NEXT_PC = *PC + 2;
@@ -2586,7 +2600,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
case arch::traits<ARCH>::opcode_e::C__EBREAK: {
if(this->disass_enabled){
/* generate console output when executing the command */
this->core.disass_output(pc.val, "c.ebreak");
//No disass specified, using instruction name
std::string mnemonic = "c.ebreak";
this->core.disass_output(pc.val, mnemonic);
}
// used registers// calculate next pc value
*NEXT_PC = *PC + 2;
@@ -2625,7 +2641,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
case arch::traits<ARCH>::opcode_e::DII: {
if(this->disass_enabled){
/* generate console output when executing the command */
this->core.disass_output(pc.val, "dii");
//No disass specified, using instruction name
std::string mnemonic = "dii";
this->core.disass_output(pc.val, mnemonic);
}
// used registers// calculate next pc value
*NEXT_PC = *PC + 2;