remove clutter from core descriptions, added instr alignment setting

gen_input/TGC_D.core_desc

@@ -4,8 +4,7 @@ import "CoreDSL-Instruction-Set-Description/RVC.core_desc"
 
 Core TGC_D provides RV32I, RV32M, RV32IC {
     architectural_state {
-        unsigned XLEN=32;
-        unsigned PCLEN=32;
+        XLEN=32;
         // definitions for the architecture wrapper
         //                    XL    ZYXWVUTSRQPONMLKJIHGFEDCBA
         unsigned MISA_VAL = 0b01000000000000000001000100000100;