generate working ISS from CoreDSL 2.0

gen_input/TGFS.core_desc

@@ -24,4 +24,4 @@ Core TGF_C provides RV32I, RV32M, RV32IC {
         unsigned PGSIZE = 0x1000; //1 << 12;
         unsigned PGMASK = 0xfff; //PGSIZE-1
     }
-}
+}