DBT-RISE
/
DBT-RISE-TGC
11
0
Fork 0
Code Issues 1 Pull Requests 1 Projects Releases Wiki Activity

updates template

This commit is contained in:
Eyck-Alexander Jentzsch 2024-08-08 11:08:28 +02:00
parent 62d21e1156
commit 235a7e6e24
2 changed files with 207 additions and 275 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
gen_input/templates/tcc/CORENAME.cpp.gtl
View File

@ -195,7 +195,7 @@ private:
tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, std::string("illegal_instruction")); tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, std::string("illegal_instruction"));
} }
pc = pc + ((instr & 3) == 3 ? 4 : 2); pc = pc + ((instr & 3) == 3 ? 4 : 2);
gen_raise_trap(tu, 0, 2); // illegal instruction trap gen_raise_trap(tu, 0, static_cast<int32_t>(traits:: RV_CAUSE_ILLEGAL_INSTRUCTION));
this->gen_set_tval(tu, instr); this->gen_set_tval(tu, instr);
vm_impl::gen_sync(tu, iss::POST_SYNC, instr_descr.size()); vm_impl::gen_sync(tu, iss::POST_SYNC, instr_descr.size());
vm_impl::gen_trap_check(tu); vm_impl::gen_trap_check(tu);

480
src/vm/tcc/vm_tgc5c.cpp
View File

File diff suppressed because it is too large Load Diff