DBT-RISE/DBT-RISE-TGC
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[WIP] first working version

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This commit is contained in:
Eyck Jentzsch
2020-01-12 18:19:48 +01:00
parent e483887c43
commit 15f4c059e6
5 changed files with 2505 additions and 71 deletions
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6
gen_input/minres_rv.core_desc
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@ -6,7 +6,7 @@ import "RVC.core_desc"
import "RVF.core_desc"
import "RVD.core_desc"
Core MNRV32 provides RV32I/*, RV32IC */ {
Core MNRV32 provides RV32I, RV32IC {
constants {
XLEN:=32;
PCLEN:=32;
@ -17,7 +17,7 @@ Core MNRV32 provides RV32I/*, RV32IC */ {
PGMASK := 0xfff; //PGSIZE-1
}
}
/*
Core RV32IMAC provides RV32I, RV32M, RV32A, RV32IC {
constants {
XLEN:=32;
@ -67,4 +67,4 @@ Core RV64GC provides RV64I, RV64M, RV64A, RV64F, RV64D, RV64IC, RV32FC, RV32DC {
PGMASK := 0xfff; //PGSIZE-1
}
}
*/