adds functionality, adds working asmjit

src/iss/arch/riscv_hart_mu_p.h

@@ -347,6 +347,8 @@ protected:
 
         unsigned get_reg_num() override { return traits<BASE>::NUM_REGS; }
 
+        unsigned get_reg_size(unsigned num) override { return traits<BASE>::reg_bit_widths[num]; }
+
         riscv_hart_mu_p<BASE, FEAT>& arch;
     };
 
@@ -1005,7 +1007,8 @@ iss::status riscv_hart_mu_p<BASE, FEAT>::write(const address_type type, const ac
                 x |= 0x80; // set pll lock upon writing
                 return iss::Ok;
             } break;
-            default: {}
+            default: {
+            }
             }
         } break;
         case traits<BASE>::CSR: {