DBT-RISE-TGC/platform/gen_input/gpio.rdl

regfile gpio_regs {
	reg {
		name="value";
		desc="pin value";
		field {
			name = "data";
		} data[31:0];
	} value @0x000;
	reg {
		name="input_en";
		desc="* pin input enable";
		field {
			name = "data";
		} data[31:0];
	} input_en @0x004;
	reg {
		name="output_en";
		desc="pin output enable";
		field {
			name = "data";
		} data[31:0];
	} output_en @0x008;
	reg {
		name="port";
		desc="output port value";
		field {
			name = "data";
		} data[31:0];
	} port @0x00C;
	reg {
		name="pue";
		desc="internal pull-up enable";
		field {
			name = "data";
		} data[31:0];
	} pue @0x010;
	reg {
		name="ds";
		desc="Pin Drive Strength";
		field {
			name = "data";
		} data[31:0];
	} ds @0x014;
	reg {
		name="rise_ie";
		desc="rise interrupt enable";
		field {
			name = "data";
		} data[31:0];
	} rise_ie @0x018;
	reg {
		name="rise_ip";
		desc="rise interrupt pending";
		field {
			name = "data";
		} data[31:0];
	} rise_ip @0x01C;
	reg {
		name="fall_ie";
		desc="fall interrupt enable";
		field {
			name = "data";
		} data[31:0];
	} fall_ie @0x020;
	reg {
		name="fall_ip";
		desc="fall interrupt pending";
		field {
			name = "data";
		} data[31:0];
	} fall_ip @0x024;
	reg {
		name="high_ie";
		desc="high interrupt enable";
		field {
			name = "data";
		} data[31:0];
	} high_ie @0x028;
	reg {
		name="high_ip";
		desc="high interrupt pending";
		field {
			name = "data";
		} data[31:0];
	} high_ip @0x02C;
	reg {
		name="low_ie";
		desc="low interrupt enable";
		field {
			name = "data";
		} data[31:0];
	} low_ie @0x030;
	reg {
		name="low_ip";
		desc="low interrupt pending";
		field {
			name = "data";
		} data[31:0];
	} low_ip @0x034;
	reg {
		name="iof_en";
		desc="HW I/O Function enable";
		field {
			name = "data";
		} data[31:0];
	} iof_en @0x038;
	reg {
		name="iof_sel";
		desc="HW I/O Function select";
		field {
			name = "data";
		} data[31:0];
	} iof_sel @0x03C;
	reg {
		name="out_xor";
		desc="Output XOR (invert)";
		field {
			name = "data";
		} data[31:0];
	} out_xor @0x040;
};