DBT-RISE-TGC/src_test/iss/arch/tgc5a.cpp

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2024-05-31 07:27:47 +02:00
/*******************************************************************************
* Copyright (C) 2017 - 2020 MINRES Technologies GmbH
* All rights reserved.
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// clang-format off
#include "tgc5a.h"
#include "util/ities.h"
#include <util/logging.h>
#include <cstdio>
#include <cstring>
#include <fstream>
using namespace iss::arch;
constexpr std::array<const char*, 20> iss::arch::traits<iss::arch::tgc5a>::reg_names;
constexpr std::array<const char*, 20> iss::arch::traits<iss::arch::tgc5a>::reg_aliases;
constexpr std::array<const uint32_t, 27> iss::arch::traits<iss::arch::tgc5a>::reg_bit_widths;
constexpr std::array<const uint32_t, 27> iss::arch::traits<iss::arch::tgc5a>::reg_byte_offsets;
tgc5a::tgc5a() = default;
tgc5a::~tgc5a() = default;
void tgc5a::reset(uint64_t address) {
auto base_ptr = reinterpret_cast<traits<tgc5a>::reg_t*>(get_regs_base_ptr());
for(size_t i=0; i<traits<tgc5a>::NUM_REGS; ++i)
*(base_ptr+i)=0;
reg.PC=address;
reg.NEXT_PC=reg.PC;
reg.PRIV=0x3;
reg.trap_state=0;
reg.icount=0;
}
uint8_t *tgc5a::get_regs_base_ptr() {
return reinterpret_cast<uint8_t*>(&reg);
}
tgc5a::phys_addr_t tgc5a::virt2phys(const iss::addr_t &addr) {
return phys_addr_t(addr.access, addr.space, addr.val&traits<tgc5a>::addr_mask);
}
// clang-format on