Johannes Wirth
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46f197c287
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Add additional registers for input to FW
(number of XSPNs, batch size, iterations)
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2022-03-11 14:21:25 +01:00 |
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Johannes Wirth
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43e2a299db
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fpga_spn: add check if input-/ref-data fits into memory
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2022-03-10 14:17:52 +01:00 |
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Johannes Wirth
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91f28e9f2b
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Add allocate+free functionality for fpga
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2022-01-20 18:22:21 +01:00 |
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Johannes Wirth
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446af340c8
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fpga_spn: use separate reset for DMA
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2021-11-10 09:51:19 +01:00 |
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Johannes Wirth
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89ea594399
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Update FPGA Firmware for bigger batch sizes
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2021-07-13 10:51:28 +02:00 |
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1b09899d2a
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XSPN hybrid simulation passed in MINRES environment
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2021-04-22 14:50:21 +02:00 |
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5ba7d5dd24
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extend spn_checker to comapre the results from 2nd XSPN accelerator
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2021-04-20 20:36:00 +02:00 |
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Johannes Wirth
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9578bcfa45
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Use spn_checker in fpga_spn firmware
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2021-03-31 16:22:08 +02:00 |
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Johannes Wirth
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8c0211f945
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Cleanup SPN firmwares
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2021-03-19 11:56:13 +01:00 |
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3743cbfecd
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enable result check in raven_spn fw
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2021-03-10 12:05:23 +01:00 |
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Johannes Wirth
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6bfe684e73
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Create separate xspn-fpga FW
Add xspn data for different accelerators
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2021-03-04 11:19:35 +01:00 |
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