20 Commits

Author	SHA1	Message	Date
Eyck Jentzsch	2a541997a4	benchmarks/dhrystone/Makefile aktualisiert	2024-06-14 13:50:22 +02:00
Eyck Jentzsch	877672a5a4	fixes iterations count for benchmarks	2024-03-25 10:56:34 +01:00
Eyck Jentzsch	45b6f24dfc	changes coremark build system to use BSP	2024-03-24 21:19:16 +01:00
Eyck Jentzsch	749fab2c01	WIP	2024-03-24 19:16:24 +01:00
Eyck Jentzsch	70ee11ad3d	fixes coremark linker setting	2024-03-21 07:32:20 +01:00
Eyck Jentzsch	a04e6d3c5b	fixes TGCP settings in coremark port	2024-03-20 12:53:35 +01:00
Eyck Jentzsch	06add2e20d	reduces dhrystone iterations to 20000 for reasonable RTL sim times	2024-03-20 12:24:57 +01:00
Eyck Jentzsch	2fb5920348	updates coremark portable part to match BSP	2024-03-20 11:55:48 +01:00
Eyck Jentzsch	6d33d0b066	fixes wrone use of bsp in coremark	2024-03-20 07:46:42 +01:00
Eyck Jentzsch	d5c672c288	updates coremark build system to use BSP definitions	2024-03-20 07:40:21 +01:00
Eyck Jentzsch	3381b01ec1	replaces bare-metal-bsp with submodule	2024-01-13 15:37:10 +01:00
Eyck Jentzsch	51c8a93336	fixes march definitions for dhrystone and coremark	2023-12-09 16:38:45 +01:00
Eyck Jentzsch	6ff0161882	adds some consistency fixes for variable ISA settings	2023-12-02 17:41:14 +01:00
Eyck Jentzsch	63f57b9ba1	extends eclipse build configs	2023-10-26 06:11:12 +02:00
Eyck Jentzsch	af3a154882	adds tgc-vp environment	2023-10-25 20:35:44 +02:00
Eyck Jentzsch	9c0047b3ea	updates linker script for rtl env	2023-08-30 15:07:56 +02:00
Eyck Jentzsch	ca1adccb2b	fixes TGC5L settings	2023-08-28 10:01:06 +02:00
Eyck Jentzsch	3a3cbf38c3	re-adds coremark as submodule	2023-08-20 15:23:05 +02:00
Eyck Jentzsch	822696ae0d	cleanup	2023-08-20 15:20:39 +02:00
Eyck Jentzsch	314ceeb072	rework structure	2023-08-20 15:00:51 +02:00