fixes TGCP settings in coremark port

This commit is contained in:
Eyck Jentzsch 2024-03-20 12:53:35 +01:00
parent 06add2e20d
commit a04e6d3c5b
3 changed files with 2 additions and 4 deletions

@ -1 +1 @@
Subproject commit d5304739fa8db6a3c16e417c9bc15b6fad749136
Subproject commit 4d25972e4dd8f0053cc4fbd88be1b85f4b869cae

View File

@ -42,7 +42,7 @@ AS = $(TRIPLET)-as
# Flag : CFLAGS
# Use this flag to define compiler options. Note, you can add compiler options from the command line using XCFLAGS="other flags"
PORT_CFLAGS = -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI) -O3 -DCLOCKS_PER_SEC=10000000 -nostdlib -nostartfiles -nodefaultlibs \
-funroll-loops -fpeel-loops -fgcse-sm -fgcse-las -flto -g
-funroll-loops -fpeel-loops -fgcse-sm -fgcse-las -flto -g -DBOARD_$(BOARD)
FLAGS_STR = "$(PORT_CFLAGS) $(XCFLAGS) $(XLFLAGS) $(LFLAGS_END)"
CFLAGS = $(PORT_CFLAGS) -I$(PORT_DIR) -I. -DFLAGS_STR=\"$(FLAGS_STR)\" -I$(BSP_BASE)/env/$(BOARD)
#Flag : LFLAGS_END

View File

@ -673,8 +673,6 @@ uart_send_char(char c)
}
#elif defined(BOARD_iss)
*((uint32_t*) 0xFFFF0000) = c;
#elif defined(BOARD_TGCP)
//TODO: implement
#else
while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
UART0_REG(UART_REG_TXFIFO) = c;