updates submodules and adapts to changes there
This commit is contained in:
parent
ac9aa90ff2
commit
e279e8967e
2
scc
2
scc
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@ -1 +1 @@
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Subproject commit 7cf3d94c133b000e9dd5d29b5b7da670a15f0859
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Subproject commit 1e7db7caf1117ec434b2d272a8556c6dded99b21
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@ -14,16 +14,7 @@ using namespace sysc::tgfs;
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system::system(sc_core::sc_module_name nm)
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system::system(sc_core::sc_module_name nm)
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: sc_core::sc_module(nm)
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: sc_core::sc_module(nm)
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, NAMED(router, platfrom_mmap.size() + 2, 2)
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, NAMED(router, platfrom_mmap.size() + 2, 2)
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, NAMEDC(qspi0_ptr, spi, spi_impl::beh)
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, NAMEDC(qspi1_ptr, spi, spi_impl::beh)
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, NAMEDC(qspi2_ptr, spi, spi_impl::beh)
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, qspi0(*qspi0_ptr)
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, qspi1(*qspi1_ptr)
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, qspi2(*qspi2_ptr)
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{
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{
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auto& qspi0 = *qspi0_ptr;
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auto& qspi1 = *qspi1_ptr;
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auto& qspi2 = *qspi2_ptr;
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core_complex.ibus(router.target[0]);
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core_complex.ibus(router.target[0]);
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core_complex.dbus(router.target[1]);
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core_complex.dbus(router.target[1]);
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size_t i = 0;
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size_t i = 0;
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@ -44,7 +44,7 @@ private:
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scc::router<> router;
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scc::router<> router;
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vpvper::sifive::uart_terminal uart0{"uart0"};
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vpvper::sifive::uart_terminal uart0{"uart0"};
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vpvper::sifive::uart uart1{"uart1"};
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vpvper::sifive::uart uart1{"uart1"};
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std::unique_ptr<vpvper::sifive::spi> qspi0_ptr, qspi1_ptr, qspi2_ptr;
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vpvper::sifive::spi qspi0{"qspi0"}, qspi1{"qspi1"}, qspi2{"qspi2"};
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vpvper::sifive::pwm pwm0{"pwm0"}, pwm1{"pwm1"}, pwm2{"pwm2"};
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vpvper::sifive::pwm pwm0{"pwm0"}, pwm1{"pwm1"}, pwm2{"pwm2"};
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vpvper::sifive::gpio gpio0{"gpio0"};
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vpvper::sifive::gpio gpio0{"gpio0"};
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vpvper::sifive::plic plic{"plic"};
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vpvper::sifive::plic plic{"plic"};
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@ -65,11 +65,7 @@ private:
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sc_core::sc_vector<sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS>> global_int_s{"global_int_s", 256}, local_int_s{"local_int_s", 16};
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sc_core::sc_vector<sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS>> global_int_s{"global_int_s", 256}, local_int_s{"local_int_s", 16};
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sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> core_int_s{"core_int_s"};
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sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> core_int_s{"core_int_s"};
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protected:
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void gen_reset();
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void gen_reset();
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vpvper::sifive::spi& qspi0;
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vpvper::sifive::spi& qspi1;
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vpvper::sifive::spi& qspi2;
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#include "tgc_vp/gen/platform_mmap.h"
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#include "tgc_vp/gen/platform_mmap.h"
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};
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};
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@ -1 +1 @@
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Subproject commit bc4ea30815e77651ded4c51d97d7452c7ad005bb
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Subproject commit f4f90c5e65573d3bc979f447e3f78f794499d36e
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2
vpvper
2
vpvper
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@ -1 +1 @@
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Subproject commit 2df18a17549559131f52f9bcc90d3cef44aa4f5d
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Subproject commit 0b2dba5820ac06821306121f1d80b6b077fda4da
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