 Eyck Jentzsch
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a899d30556
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Implemented basic HiFive1-like platform with PLL,tracing etc.
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2018-07-13 20:04:07 +02:00 |
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Eyck Jentzsch
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fede5b2af1
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Changed SystemC model to model a platform in a system. Added dedicated
UART Terminal connected via tlm_signals
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2018-07-12 15:27:36 +02:00 |
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Eyck Jentzsch
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38471b8193
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Added cycle estimator and remove deprecated functions
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2018-03-30 17:59:40 +02:00 |
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Eyck Jentzsch
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3ea9651665
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Added use of CCI and support of LLVM 5.0
changed load_file to adhere to API change in DBT-RISE
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2018-03-27 19:49:11 +02:00 |
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Eyck Jentzsch
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c9fd1303ce
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Fixed license header
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2017-11-27 00:14:41 +01:00 |
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Eyck Jentzsch
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eced81b5ea
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added sc_comm_singleton to coordinate interaction with clients (e.g. web
browser)
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2017-11-10 22:40:24 +01:00 |
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Eyck Jentzsch
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9970303fa4
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Changed handling of disassembler output so that tarcing becomes possible
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2017-10-22 19:29:37 +02:00 |
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Eyck Jentzsch
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b9c910b283
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clean up class vs. struct
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2017-10-12 22:41:37 +02:00 |
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Eyck Jentzsch
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026ad213a8
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Added custom rcmd to use with gdb 'monitor' command. Currently
implemented are 2 commands:
monitor sysc print_time
monitor sysc break 1 us
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2017-10-09 22:52:19 +02:00 |
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Eyck Jentzsch
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ccc3f5d47d
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Adapted namespace changes in sc-components
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2017-10-04 14:30:25 +02:00 |
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Eyck Jentzsch
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4867cca187
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Added SystemC version of HiFive FE310
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2017-10-04 10:31:11 +02:00 |
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Eyck Jentzsch
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4ce4b2562b
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Fixed clang-tidy warnings
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2017-09-22 22:19:25 +02:00 |
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Eyck Jentzsch
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b38319f9c2
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Applied clang-format
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2017-09-22 11:23:23 +02:00 |
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Eyck Jentzsch
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9a617dab57
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Restructured project
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2017-09-21 20:29:23 +02:00 |