add SPI RTL representation
This commit is contained in:
parent
9248b7f246
commit
7a9802f68b
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@ -84,6 +84,14 @@ if(SystemC_FOUND)
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endif()
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endif(SystemC_FOUND)
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#find_package(Verilator)
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if(VERILATOR_FOUND)
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message(STATUS "Verilator found at ${VERILATOR_EXECUTABLE}")
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else()
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message(STATUS "Verilator not found, omitting RTL parts in build")
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endif()
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set(PROJECT_3PARTY_DIRS external)
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include(clang-format)
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set(ENABLE_CLANG_TIDY OFF CACHE BOOL "Add clang-tidy automatically to builds")
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@ -0,0 +1,374 @@
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// Verilated -*- SystemC -*-
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// DESCRIPTION: Verilator output: Primary design header
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//
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// This header should be included by all source files instantiating the design.
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// The class here is then constructed to instantiate the design.
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// See the Verilator manual for examples.
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#ifndef _VTLSPI_H_
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#define _VTLSPI_H_
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#include "systemc.h"
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#include "verilated_heavy.h"
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#include "verilated_sc.h"
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class VTLSPI__Syms;
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//----------
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SC_MODULE(VTLSPI) {
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public:
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// PORTS
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// The application code writes and reads these signals to
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// propagate new values into/out from the Verilated model.
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sc_in<bool> clock;
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sc_in<bool> reset;
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sc_out<bool> auto_int_xing_out_sync_0;
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sc_out<bool> auto_control_xing_in_a_ready;
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sc_in<bool> auto_control_xing_in_a_valid;
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sc_in<uint32_t> auto_control_xing_in_a_bits_opcode;
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sc_in<uint32_t> auto_control_xing_in_a_bits_param;
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sc_in<uint32_t> auto_control_xing_in_a_bits_size;
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sc_in<uint32_t> auto_control_xing_in_a_bits_source;
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sc_in<uint32_t> auto_control_xing_in_a_bits_mask;
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sc_in<bool> auto_control_xing_in_a_bits_corrupt;
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sc_in<bool> auto_control_xing_in_d_ready;
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sc_out<bool> auto_control_xing_in_d_valid;
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sc_out<uint32_t> auto_control_xing_in_d_bits_opcode;
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sc_out<uint32_t> auto_control_xing_in_d_bits_size;
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sc_out<uint32_t> auto_control_xing_in_d_bits_source;
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sc_out<bool> auto_io_out_sck;
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sc_in<bool> auto_io_out_dq_0_i;
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sc_out<bool> auto_io_out_dq_0_o;
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sc_out<bool> auto_io_out_dq_0_oe;
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sc_in<bool> auto_io_out_dq_1_i;
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sc_out<bool> auto_io_out_dq_1_o;
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sc_out<bool> auto_io_out_dq_1_oe;
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sc_in<bool> auto_io_out_dq_2_i;
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sc_in<bool> auto_io_out_dq_3_i;
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sc_out<bool> auto_io_out_cs_0;
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sc_out<bool> auto_io_out_cs_2;
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sc_out<bool> auto_io_out_cs_3;
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sc_in<uint32_t> auto_control_xing_in_a_bits_address;
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sc_in<uint32_t> auto_control_xing_in_a_bits_data;
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sc_out<uint32_t> auto_control_xing_in_d_bits_data;
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// LOCAL SIGNALS
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// Internals; generally not touched by application code
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// Anonymous structures to workaround compiler member-count bugs
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struct {
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VL_SIG8(TLSPI__DOT__fifo_io_tx_valid, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo_io_ip_txwm, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo_io_ip_rxwm, 0, 0);
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VL_SIG8(TLSPI__DOT__mac_io_link_tx_ready, 0, 0);
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VL_SIG8(TLSPI__DOT__ctrl_fmt_proto, 1, 0);
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VL_SIG8(TLSPI__DOT__ctrl_fmt_endian, 0, 0);
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VL_SIG8(TLSPI__DOT__ctrl_fmt_iodir, 0, 0);
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VL_SIG8(TLSPI__DOT__ctrl_fmt_len, 3, 0);
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VL_SIG8(TLSPI__DOT__ctrl_sck_pol, 0, 0);
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VL_SIG8(TLSPI__DOT__ctrl_sck_pha, 0, 0);
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VL_SIG8(TLSPI__DOT__ctrl_cs_id, 1, 0);
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VL_SIG8(TLSPI__DOT__ctrl_cs_dflt_0, 0, 0);
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VL_SIG8(TLSPI__DOT__ctrl_cs_dflt_1, 0, 0);
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VL_SIG8(TLSPI__DOT__ctrl_cs_dflt_2, 0, 0);
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VL_SIG8(TLSPI__DOT__ctrl_cs_dflt_3, 0, 0);
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VL_SIG8(TLSPI__DOT__ctrl_cs_mode, 1, 0);
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VL_SIG8(TLSPI__DOT__ctrl_dla_cssck, 7, 0);
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VL_SIG8(TLSPI__DOT__ctrl_dla_sckcs, 7, 0);
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VL_SIG8(TLSPI__DOT__ctrl_dla_intercs, 7, 0);
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VL_SIG8(TLSPI__DOT__ctrl_dla_interxfr, 7, 0);
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VL_SIG8(TLSPI__DOT__ctrl_wm_tx, 3, 0);
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VL_SIG8(TLSPI__DOT__ctrl_wm_rx, 3, 0);
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VL_SIG8(TLSPI__DOT__ie_txwm, 0, 0);
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VL_SIG8(TLSPI__DOT__ie_rxwm, 0, 0);
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VL_SIG8(TLSPI__DOT___T_426, 7, 0);
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VL_SIG8(TLSPI__DOT___T_1495, 0, 0);
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VL_SIG8(TLSPI__DOT___T_1732, 0, 0);
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VL_SIG8(TLSPI__DOT___T_1766, 0, 0);
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VL_SIG8(TLSPI__DOT___T_1796, 0, 0);
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VL_SIG8(TLSPI__DOT___T_1742, 0, 0);
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VL_SIG8(TLSPI__DOT___T_1904, 0, 0);
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VL_SIG8(TLSPI__DOT___T_1844, 0, 0);
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VL_SIG8(TLSPI__DOT___T_1832, 0, 0);
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VL_SIG8(TLSPI__DOT___T_1802, 0, 0);
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VL_SIG8(TLSPI__DOT___GEN_155, 0, 0);
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VL_SIG8(TLSPI__DOT___GEN_162, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_52, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_55, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_73, 3, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_167, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_245, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_499, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_500, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_509, 2, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_511, 2, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_513, 1, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_515, 5, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_522, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_526, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_530, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_534, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_538, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_541, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_554, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_555, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_564, 2, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_568, 1, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_570, 5, 0);
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};
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struct {
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_579, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_587, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_591, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_602, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_615, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_618, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_619, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_636, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_639, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_640, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_658, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_673, 0, 0);
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VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_687, 0, 0);
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VL_SIG8(TLSPI__DOT__intsource__DOT__AsyncResetRegVec_w1_i0__DOT__reg_0_q, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_52, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_55, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_73, 3, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_97, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_167, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_181, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_245, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_486, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_496, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_499, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_500, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_509, 2, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_511, 2, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_513, 1, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_515, 5, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_522, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_526, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_530, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_534, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_538, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_541, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_542, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_551, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_554, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_555, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_564, 2, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_568, 1, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_570, 5, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_579, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_587, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_591, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_602, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_615, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_618, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_619, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_636, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_639, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_640, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_658, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_673, 0, 0);
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VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_687, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__rxq_io_enq_valid, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__rxen, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT___T_57, 3, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__cs_mode, 1, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data, 7, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT__value, 2, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT__value_1, 2, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_39, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_40, 0, 0);
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};
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struct {
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VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_42, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_43, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_44, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_47, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_52, 2, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_54, 2, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT__value, 2, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT__value_1, 2, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_39, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_40, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_42, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_43, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_44, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_47, 0, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_52, 2, 0);
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VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_54, 2, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy_io_op_valid, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy_io_op_bits_fn, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy_io_op_bits_stb, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy_io_op_bits_cnt, 7, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__cs_id, 1, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__cs_dflt_0, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__cs_dflt_1, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__cs_dflt_2, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__cs_dflt_3, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__cs_set, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT___T_69, 3, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT___T_88, 3, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__clear, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__cs_assert, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__cs_deassert, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT___T_94, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__state, 1, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT___T_97, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT___T_99, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT___T_102, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT___T_107, 3, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pol, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pha, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto, 1, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_endian, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_iodir, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__setup_d, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_42, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_43, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__sample_d, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_44, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_45, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__last_d, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__scnt, 7, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__sched, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__sck, 0, 0);
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VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__cref, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__cinv, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__rxd, 3, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__buffer, 7, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_71, 7, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__shift, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_96, 7, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__txd, 3, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_154, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_155, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__accept, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__txd_in, 3, 0);
|
||||
};
|
||||
struct {
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_102, 1, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__done, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_156, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__xfr, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___GEN_15, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___GEN_22, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_111, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__txen_2, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_128, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_148, 0, 0);
|
||||
VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___GEN_13, 0, 0);
|
||||
VL_SIG16(TLSPI__DOT__ctrl_sck_div, 11, 0);
|
||||
VL_SIG16(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_div, 11, 0);
|
||||
VL_SIG16(TLSPI__DOT__mac__DOT__phy__DOT__tcnt, 11, 0);
|
||||
VL_SIG16(TLSPI__DOT__mac__DOT__phy__DOT___T_47, 11, 0);
|
||||
VL_SIG16(TLSPI__DOT__mac__DOT__phy__DOT___GEN_16, 11, 0);
|
||||
VL_SIG(TLSPI__DOT___T_626, 31, 0);
|
||||
VL_SIG(TLSPI__DOT___GEN_172, 31, 0);
|
||||
VL_SIG(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_517, 28, 0);
|
||||
VL_SIG(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_679, 31, 0);
|
||||
VL_SIG(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_690, 31, 0);
|
||||
VL_SIG(TLSPI__DOT__buffer__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus, 31, 0);
|
||||
VL_SIG(TLSPI__DOT__TLMonitor__DOT___T_517, 28, 0);
|
||||
VL_SIG(TLSPI__DOT__TLMonitor__DOT___T_679, 31, 0);
|
||||
VL_SIG(TLSPI__DOT__TLMonitor__DOT___T_690, 31, 0);
|
||||
VL_SIG(TLSPI__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus, 31, 0);
|
||||
VL_SIG64(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_604, 63, 0);
|
||||
VL_SIG64(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___GEN_15, 63, 0);
|
||||
VL_SIG64(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_677, 63, 0);
|
||||
VL_SIG64(TLSPI__DOT__TLMonitor__DOT___T_604, 63, 0);
|
||||
VL_SIG64(TLSPI__DOT__TLMonitor__DOT___GEN_15, 63, 0);
|
||||
VL_SIG64(TLSPI__DOT__TLMonitor__DOT___T_677, 63, 0);
|
||||
VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_35[8], 7, 0);
|
||||
VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_35[8], 7, 0);
|
||||
};
|
||||
|
||||
// LOCAL VARIABLES
|
||||
// Internals; generally not touched by application code
|
||||
VL_SIG8(__Vcellinp__TLSPI__reset, 0, 0);
|
||||
VL_SIG8(__Vcellinp__TLSPI__clock, 0, 0);
|
||||
VL_SIG8(__Vcellinp__TLSPI__auto_io_out_dq_3_i, 0, 0);
|
||||
VL_SIG8(__Vcellinp__TLSPI__auto_io_out_dq_2_i, 0, 0);
|
||||
VL_SIG8(__Vcellinp__TLSPI__auto_io_out_dq_1_i, 0, 0);
|
||||
VL_SIG8(__Vcellinp__TLSPI__auto_io_out_dq_0_i, 0, 0);
|
||||
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_d_ready, 0, 0);
|
||||
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt, 0, 0);
|
||||
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask, 3, 0);
|
||||
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source, 5, 0);
|
||||
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size, 1, 0);
|
||||
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param, 2, 0);
|
||||
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode, 2, 0);
|
||||
VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_valid, 0, 0);
|
||||
VL_SIG8(__VinpClk__TOP____Vcellinp__TLSPI__reset, 0, 0);
|
||||
VL_SIG8(__Vclklast__TOP____Vcellinp__TLSPI__clock, 0, 0);
|
||||
VL_SIG8(__Vclklast__TOP____VinpClk__TOP____Vcellinp__TLSPI__reset, 0, 0);
|
||||
VL_SIG8(__Vchglast__TOP____Vcellinp__TLSPI__reset, 0, 0);
|
||||
VL_SIG(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data, 31, 0);
|
||||
VL_SIG(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address, 28, 0);
|
||||
|
||||
// INTERNAL VARIABLES
|
||||
// Internals; generally not touched by application code
|
||||
VTLSPI__Syms *__VlSymsp; // Symbol table
|
||||
|
||||
// PARAMETERS
|
||||
// Parameters marked /*verilator public*/ for use by application code
|
||||
|
||||
// CONSTRUCTORS
|
||||
private:
|
||||
VL_UNCOPYABLE(VTLSPI); ///< Copying not allowed
|
||||
public:
|
||||
SC_CTOR(VTLSPI);
|
||||
virtual ~VTLSPI();
|
||||
|
||||
// API METHODS
|
||||
private:
|
||||
void eval();
|
||||
|
||||
public:
|
||||
void final();
|
||||
|
||||
// INTERNAL METHODS
|
||||
private:
|
||||
static void _eval_initial_loop(VTLSPI__Syms * __restrict vlSymsp);
|
||||
|
||||
public:
|
||||
void __Vconfigure(VTLSPI__Syms * symsp, bool first);
|
||||
|
||||
private:
|
||||
static QData _change_request(VTLSPI__Syms * __restrict vlSymsp);
|
||||
|
||||
public:
|
||||
static void _combo__TOP__2(VTLSPI__Syms * __restrict vlSymsp);
|
||||
static void _combo__TOP__6(VTLSPI__Syms * __restrict vlSymsp);
|
||||
static void _combo__TOP__8(VTLSPI__Syms * __restrict vlSymsp);
|
||||
|
||||
private:
|
||||
void _ctor_var_reset();
|
||||
|
||||
public:
|
||||
static void _eval(VTLSPI__Syms * __restrict vlSymsp);
|
||||
|
||||
private:
|
||||
#ifdef VL_DEBUG
|
||||
void _eval_debug_assertions();
|
||||
#endif // VL_DEBUG
|
||||
public:
|
||||
static void _eval_initial(VTLSPI__Syms * __restrict vlSymsp);
|
||||
static void _eval_settle(VTLSPI__Syms * __restrict vlSymsp);
|
||||
static void _initial__TOP__1(VTLSPI__Syms * __restrict vlSymsp);
|
||||
static void _sequent__TOP__4(VTLSPI__Syms * __restrict vlSymsp);
|
||||
static void _sequent__TOP__5(VTLSPI__Syms * __restrict vlSymsp);
|
||||
static void _sequent__TOP__7(VTLSPI__Syms * __restrict vlSymsp);
|
||||
static void _settle__TOP__3(VTLSPI__Syms * __restrict vlSymsp);
|
||||
}
|
||||
VL_ATTR_ALIGNED(128);
|
||||
|
||||
#endif // guard
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
// Verilated -*- C++ -*-
|
||||
// DESCRIPTION: Verilator output: Symbol table internal header
|
||||
//
|
||||
// Internal details; most calling programs do not need this header
|
||||
|
||||
#ifndef _VTLSPI__Syms_H_
|
||||
#define _VTLSPI__Syms_H_
|
||||
|
||||
#include "verilated_heavy.h"
|
||||
|
||||
// INCLUDE MODULE CLASSES
|
||||
#include "VTLSPI.h"
|
||||
|
||||
// SYMS CLASS
|
||||
class VTLSPI__Syms : public VerilatedSyms {
|
||||
public:
|
||||
// LOCAL STATE
|
||||
const char *__Vm_namep;
|
||||
bool __Vm_didInit;
|
||||
|
||||
// SUBCELL STATE
|
||||
VTLSPI *TOPp;
|
||||
|
||||
// SCOPE NAMES
|
||||
VerilatedScope __Vscope_TLSPI__TLMonitor;
|
||||
VerilatedScope __Vscope_TLSPI__buffer__TLMonitor;
|
||||
|
||||
// CREATORS
|
||||
VTLSPI__Syms(VTLSPI *topp, const char *namep);
|
||||
~VTLSPI__Syms() {}
|
||||
|
||||
// METHODS
|
||||
inline const char *name() { return __Vm_namep; }
|
||||
|
||||
} VL_ATTR_ALIGNED(64);
|
||||
|
||||
#endif // guard
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef _TLBFM_H_
|
||||
#define _TLBFM_H_
|
||||
|
||||
#include "scc/target_mixin.h"
|
||||
#include "scv4tlm/tlm_rec_target_socket.h"
|
||||
#include <tlm.h>
|
||||
|
||||
namespace sysc {
|
||||
|
||||
class tl_uh_bfm : public sc_core::sc_module {
|
||||
public:
|
||||
SC_HAS_PROCESS(tl_uh_bfm);// NOLINT
|
||||
|
||||
enum { Get = 4, AccessAckData = 1, PutFullData = 0, PutPartialData = 1, AccessAck = 0 };
|
||||
|
||||
scc::target_mixin<scv4tlm::tlm_rec_target_socket<32>> socket;
|
||||
|
||||
sc_core::sc_in<bool> clock;
|
||||
sc_core::sc_in<bool> reset;
|
||||
sc_core::sc_in<bool> a_ready;
|
||||
sc_core::sc_out<bool> a_valid;
|
||||
sc_core::sc_out<uint32_t> a_bits_address;
|
||||
sc_core::sc_out<uint32_t> a_bits_data;
|
||||
sc_core::sc_out<uint32_t> a_bits_opcode;
|
||||
sc_core::sc_out<uint32_t> a_bits_param;
|
||||
sc_core::sc_out<uint32_t> a_bits_size;
|
||||
sc_core::sc_out<uint32_t> a_bits_source;
|
||||
sc_core::sc_out<uint32_t> a_bits_mask;
|
||||
sc_core::sc_out<bool> a_bits_corrupt;
|
||||
sc_core::sc_in<uint32_t> d_bits_data;
|
||||
sc_core::sc_out<bool> d_ready;
|
||||
sc_core::sc_in<bool> d_valid;
|
||||
sc_core::sc_in<uint32_t> d_bits_opcode;
|
||||
sc_core::sc_in<uint32_t> d_bits_size;
|
||||
sc_core::sc_in<uint32_t> d_bits_source;
|
||||
|
||||
tl_uh_bfm(sc_core::sc_module_name nm, int64_t offset = 0);
|
||||
|
||||
~tl_uh_bfm() override;
|
||||
|
||||
private:
|
||||
const int64_t offset;
|
||||
tlm_utils::peq_with_get<tlm::tlm_generic_payload> fw_queue;
|
||||
std::deque<tlm::tlm_generic_payload *> tl_in_progress;
|
||||
void fw_thread();
|
||||
void tl_response_method();
|
||||
};
|
||||
|
||||
} /* namespace sysc */
|
||||
|
||||
#endif /* _TLBFM_H_ */
|
||||
|
|
@ -29,9 +29,24 @@ set(LIB_SOURCES
|
|||
sysc/uart.cpp
|
||||
CLIParser.cpp )
|
||||
|
||||
if(VERILATOR_FOUND)
|
||||
set(LIB_SOURCES ${LIB_SOURCES}
|
||||
rtl/spi_rtl.cpp
|
||||
rtl/tl_uh_bfm.cpp
|
||||
rtl/VTLSPI__Syms.cpp
|
||||
rtl/VTLSPI.cpp
|
||||
)
|
||||
set_source_files_properties(beh/fe310.cpp PROPERTIES COMPILE_DEFINITIONS "HAS_VERILATOR")
|
||||
endif()
|
||||
|
||||
add_library(platform ${LIB_SOURCES})
|
||||
target_include_directories(platform PUBLIC ../incl)
|
||||
target_link_libraries(platform PUBLIC riscv_sc CONAN_PKG::seasocks external)
|
||||
if(VERILATOR_FOUND)
|
||||
message(STATUS "Verilator found at ${VERILATOR_EXECUTABLE}")
|
||||
target_include_directories(platform PRIVATE ${PROJECT_SOURCE_DIR}/incl/sysc/rtl)
|
||||
target_include_directories(platform SYSTEM PRIVATE ${VERILATOR_INCLUDE_DIR})
|
||||
endif()
|
||||
set_target_properties(platform PROPERTIES
|
||||
VERSION ${PROJECT_VERSION} # ${VERSION} was defined in the main CMakeLists.
|
||||
FRAMEWORK FALSE
|
||||
|
|
@ -42,6 +57,12 @@ add_executable(riscv-vp sc_main.cpp)
|
|||
# include files for this application
|
||||
target_include_directories(riscv-vp SYSTEM PRIVATE ${LLVM_INCLUDE_DIRS})
|
||||
target_link_libraries(riscv-vp PUBLIC platform riscv_sc)
|
||||
if(VERILATOR_FOUND)
|
||||
set_source_files_properties(sc_main.cpp PROPERTIES COMPILE_DEFINITIONS HAS_VERILATOR)
|
||||
target_include_directories(riscv-vp SYSTEM PRIVATE ${VERILATOR_INCLUDE_DIR})
|
||||
target_link_libraries(riscv-vp verilated)
|
||||
endif()
|
||||
|
||||
if (Tcmalloc_FOUND)
|
||||
target_link_libraries(riscv-vp PUBLIC ${Tcmalloc_LIBRARIES})
|
||||
endif(Tcmalloc_FOUND)
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,22 @@
|
|||
// Verilated -*- C++ -*-
|
||||
// DESCRIPTION: Verilator output: Symbol table implementation internals
|
||||
|
||||
#include "VTLSPI__Syms.h"
|
||||
#include "VTLSPI.h"
|
||||
|
||||
// FUNCTIONS
|
||||
VTLSPI__Syms::VTLSPI__Syms(VTLSPI *topp, const char *namep)
|
||||
// Setup locals
|
||||
: __Vm_namep(namep)
|
||||
, __Vm_didInit(false)
|
||||
// Setup submodule names
|
||||
{
|
||||
// Pointer to top level
|
||||
TOPp = topp;
|
||||
// Setup each module's pointers to their submodules
|
||||
// Setup each module's pointer back to symbol table (for public functions)
|
||||
TOPp->__Vconfigure(this, true);
|
||||
// Setup scope names
|
||||
__Vscope_TLSPI__TLMonitor.configure(this, name(), "TLSPI.TLMonitor");
|
||||
__Vscope_TLSPI__buffer__TLMonitor.configure(this, name(), "TLSPI.buffer.TLMonitor");
|
||||
}
|
||||
|
|
@ -0,0 +1,214 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
#include "scc/signal_initiator_mixin.h"
|
||||
#include "scc/time2tick.h"
|
||||
#include "sysc/SiFive/spi.h"
|
||||
#include "sysc/rtl/tl_uh_bfm.h"
|
||||
#include <VTLSPI.h>
|
||||
#include <scc/utilities.h>
|
||||
#include <tlm.h>
|
||||
#include <tlm/tlm_signal_conv.h>
|
||||
|
||||
namespace sysc {
|
||||
namespace spi_impl {
|
||||
using namespace sc_core;
|
||||
|
||||
class rtl : public spi {
|
||||
public:
|
||||
SC_HAS_PROCESS(beh);// NOLINT
|
||||
|
||||
rtl(sc_module_name nm);
|
||||
~rtl() override;
|
||||
|
||||
// void trace( sc_trace_file* tf ) const override {
|
||||
// }
|
||||
|
||||
private:
|
||||
sc_signal<bool> clock;
|
||||
sc_signal<uint32_t> a_bits_address;
|
||||
sc_signal<uint32_t> a_bits_data;
|
||||
sc_signal<bool> a_ready;
|
||||
sc_signal<bool> a_valid;
|
||||
sc_signal<uint32_t> a_bits_opcode;
|
||||
sc_signal<uint32_t> a_bits_param;
|
||||
sc_signal<uint32_t> a_bits_size;
|
||||
sc_signal<uint32_t> a_bits_source;
|
||||
sc_signal<uint32_t> a_bits_mask;
|
||||
sc_signal<bool> a_bits_corrupt;
|
||||
sc_signal<uint32_t> d_bits_data;
|
||||
sc_signal<bool> d_ready;
|
||||
sc_signal<bool> d_valid;
|
||||
sc_signal<uint32_t> d_bits_opcode;
|
||||
sc_signal<uint32_t> d_bits_size;
|
||||
sc_signal<uint32_t> d_bits_source;
|
||||
sc_signal<bool> sck;
|
||||
sc_signal<bool> dq_0_i;
|
||||
sc_signal<bool> dq_0_o;
|
||||
sc_signal<bool> dq_0_oe;
|
||||
sc_signal<bool> dq_1_i;
|
||||
sc_signal<bool> dq_1_o;
|
||||
sc_signal<bool> dq_1_oe;
|
||||
sc_signal<bool> dq_2_i;
|
||||
sc_signal<bool> dq_3_i;
|
||||
sc_signal<bool> cs_0;
|
||||
sc_signal<bool> cs_2;
|
||||
sc_signal<bool> cs_3;
|
||||
|
||||
VTLSPI i_vtlspi;
|
||||
tl_uh_bfm i_tlbfm;
|
||||
scc::time2tick i_time2tick;
|
||||
tlm::sc_signal2tlm_signal<bool> i_sck_conv;
|
||||
tlm::sc_signal2tlm_signal<bool> i_mosi_conv;
|
||||
tlm::tlm_signal2sc_signal<bool> i_miso_conv;
|
||||
tlm::sc_signal2tlm_signal<bool> i_scs0_conv, i_scs2_conv, i_scs3_conv;
|
||||
scc::tlm_signal_bool_opt_out scs_1;
|
||||
};
|
||||
|
||||
rtl::rtl(sc_module_name nm)
|
||||
: spi(nm)
|
||||
, NAMED(a_bits_address)
|
||||
, NAMED(a_bits_data)
|
||||
, NAMED(a_ready)
|
||||
, NAMED(a_valid)
|
||||
, NAMED(a_bits_opcode)
|
||||
, NAMED(a_bits_param)
|
||||
, NAMED(a_bits_size)
|
||||
, NAMED(a_bits_source)
|
||||
, NAMED(a_bits_mask)
|
||||
, NAMED(a_bits_corrupt)
|
||||
, NAMED(d_bits_data)
|
||||
, NAMED(d_ready)
|
||||
, NAMED(d_valid)
|
||||
, NAMED(d_bits_opcode)
|
||||
, NAMED(d_bits_size)
|
||||
, NAMED(d_bits_source)
|
||||
, NAMED(sck)
|
||||
, NAMED(dq_0_i)
|
||||
, NAMED(dq_0_o)
|
||||
, NAMED(dq_0_oe)
|
||||
, NAMED(dq_1_i)
|
||||
, NAMED(dq_1_o)
|
||||
, NAMED(dq_1_oe)
|
||||
, NAMED(dq_2_i)
|
||||
, NAMED(dq_3_i)
|
||||
, NAMED(cs_0)
|
||||
, NAMED(cs_2)
|
||||
, NAMED(cs_3)
|
||||
, NAMED(i_vtlspi)
|
||||
, NAMED(i_tlbfm, 0x10024000)
|
||||
, NAMED(i_time2tick)
|
||||
, NAMED(i_sck_conv)
|
||||
, NAMED(i_mosi_conv)
|
||||
, NAMED(i_miso_conv)
|
||||
, NAMED(i_scs0_conv)
|
||||
, NAMED(i_scs2_conv)
|
||||
, NAMED(i_scs3_conv)
|
||||
, NAMED(scs_1) {
|
||||
i_vtlspi.clock(clock);
|
||||
i_vtlspi.reset(rst_i);
|
||||
i_vtlspi.auto_int_xing_out_sync_0(irq_o);
|
||||
i_vtlspi.auto_control_xing_in_a_ready(a_ready);
|
||||
i_vtlspi.auto_control_xing_in_a_valid(a_valid);
|
||||
i_vtlspi.auto_control_xing_in_a_bits_address(a_bits_address);
|
||||
i_vtlspi.auto_control_xing_in_a_bits_data(a_bits_data);
|
||||
i_vtlspi.auto_control_xing_in_a_bits_opcode(a_bits_opcode);
|
||||
i_vtlspi.auto_control_xing_in_a_bits_param(a_bits_param);
|
||||
i_vtlspi.auto_control_xing_in_a_bits_size(a_bits_size);
|
||||
i_vtlspi.auto_control_xing_in_a_bits_source(a_bits_source);
|
||||
i_vtlspi.auto_control_xing_in_a_bits_mask(a_bits_mask);
|
||||
i_vtlspi.auto_control_xing_in_a_bits_corrupt(a_bits_corrupt);
|
||||
i_vtlspi.auto_control_xing_in_d_ready(d_ready);
|
||||
i_vtlspi.auto_control_xing_in_d_valid(d_valid);
|
||||
i_vtlspi.auto_control_xing_in_d_bits_data(d_bits_data);
|
||||
i_vtlspi.auto_control_xing_in_d_bits_opcode(d_bits_opcode);
|
||||
i_vtlspi.auto_control_xing_in_d_bits_size(d_bits_size);
|
||||
i_vtlspi.auto_control_xing_in_d_bits_source(d_bits_source);
|
||||
i_vtlspi.auto_io_out_sck(sck);
|
||||
i_vtlspi.auto_io_out_dq_0_i(dq_0_i);
|
||||
i_vtlspi.auto_io_out_dq_0_o(dq_0_o);
|
||||
i_vtlspi.auto_io_out_dq_0_oe(dq_0_oe);
|
||||
i_vtlspi.auto_io_out_dq_1_i(dq_1_i);
|
||||
i_vtlspi.auto_io_out_dq_1_o(dq_1_o);
|
||||
i_vtlspi.auto_io_out_dq_1_oe(dq_1_oe);
|
||||
i_vtlspi.auto_io_out_dq_2_i(dq_2_i);
|
||||
i_vtlspi.auto_io_out_dq_3_i(dq_3_i);
|
||||
i_vtlspi.auto_io_out_cs_0(cs_0);
|
||||
i_vtlspi.auto_io_out_cs_2(cs_2);
|
||||
i_vtlspi.auto_io_out_cs_3(cs_3);
|
||||
|
||||
i_tlbfm.clock(clock);
|
||||
i_tlbfm.reset(rst_i);
|
||||
spi::socket(i_tlbfm.socket);
|
||||
i_tlbfm.a_ready(a_ready);
|
||||
i_tlbfm.a_valid(a_valid);
|
||||
i_tlbfm.a_bits_address(a_bits_address);
|
||||
i_tlbfm.a_bits_data(a_bits_data);
|
||||
i_tlbfm.d_bits_data(d_bits_data);
|
||||
i_tlbfm.a_bits_opcode(a_bits_opcode);
|
||||
i_tlbfm.a_bits_param(a_bits_param);
|
||||
i_tlbfm.a_bits_size(a_bits_size);
|
||||
i_tlbfm.a_bits_source(a_bits_source);
|
||||
i_tlbfm.a_bits_mask(a_bits_mask);
|
||||
i_tlbfm.a_bits_corrupt(a_bits_corrupt);
|
||||
i_tlbfm.d_ready(d_ready);
|
||||
i_tlbfm.d_valid(d_valid);
|
||||
i_tlbfm.d_bits_opcode(d_bits_opcode);
|
||||
i_tlbfm.d_bits_size(d_bits_size);
|
||||
i_tlbfm.d_bits_source(d_bits_source);
|
||||
|
||||
i_time2tick.clk_i(clk_i);
|
||||
i_time2tick.clk_o(clock);
|
||||
i_sck_conv.s_i(sck);
|
||||
i_sck_conv.t_o(sck_o);
|
||||
i_mosi_conv.s_i(dq_0_o);
|
||||
i_mosi_conv.t_o(mosi_o);
|
||||
miso_i(i_miso_conv.t_i);
|
||||
i_miso_conv.s_o(dq_0_i);
|
||||
i_scs0_conv.s_i(cs_0);
|
||||
i_scs0_conv.t_o(scs_o[0]);
|
||||
i_scs2_conv.s_i(cs_2);
|
||||
i_scs2_conv.t_o(scs_o[2]);
|
||||
scs_1(scs_o[1]); // dummy to drive port
|
||||
i_scs3_conv.s_i(cs_3);
|
||||
i_scs3_conv.t_o(scs_o[3]);
|
||||
}
|
||||
|
||||
rtl::~rtl() = default;
|
||||
}
|
||||
|
||||
template <> std::unique_ptr<spi> spi::create<sysc::spi_impl::rtl>(sc_core::sc_module_name nm) {
|
||||
auto *res = new sysc::spi_impl::rtl(nm);
|
||||
return std::unique_ptr<spi>(res);
|
||||
}
|
||||
|
||||
} /* namespace sysc */
|
||||
|
|
@ -0,0 +1,142 @@
|
|||
/*******************************************************************************
|
||||
* Copyright (C) 2018 MINRES Technologies GmbH
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
#include "sysc/rtl/tl_uh_bfm.h"
|
||||
|
||||
#include <scc/report.h>
|
||||
#include <scc/utilities.h>
|
||||
|
||||
namespace sysc {
|
||||
|
||||
using namespace sc_core;
|
||||
|
||||
tl_uh_bfm::tl_uh_bfm(sc_module_name nm, int64_t offset)
|
||||
: sc_module(nm)
|
||||
, offset(offset)
|
||||
, NAMED(socket)
|
||||
, NAMED(clock)
|
||||
, NAMED(reset)
|
||||
, NAMED(a_bits_address)
|
||||
, NAMED(a_bits_data)
|
||||
, NAMED(a_ready)
|
||||
, NAMED(a_valid)
|
||||
, NAMED(a_bits_opcode)
|
||||
, NAMED(a_bits_param)
|
||||
, NAMED(a_bits_size)
|
||||
, NAMED(a_bits_source)
|
||||
, NAMED(a_bits_mask)
|
||||
, NAMED(a_bits_corrupt)
|
||||
, NAMED(d_bits_data)
|
||||
, NAMED(d_ready)
|
||||
, NAMED(d_valid)
|
||||
, NAMED(d_bits_opcode)
|
||||
, NAMED(d_bits_size)
|
||||
, NAMED(d_bits_source)
|
||||
, NAMED(fw_queue) {
|
||||
socket.register_nb_transport_fw(
|
||||
[this](tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) -> tlm::tlm_sync_enum {
|
||||
if (phase == tlm::BEGIN_REQ && gp.get_command() != tlm::TLM_IGNORE_COMMAND) {
|
||||
gp.acquire();
|
||||
fw_queue.notify(gp, delay);
|
||||
return tlm::TLM_ACCEPTED;
|
||||
} else if (phase == tlm::END_RESP) {
|
||||
gp.release();
|
||||
d_ready = true;
|
||||
}
|
||||
});
|
||||
|
||||
SC_METHOD(tl_response_method);
|
||||
sensitive << clock.pos();
|
||||
SC_THREAD(fw_thread);
|
||||
}
|
||||
|
||||
tl_uh_bfm::~tl_uh_bfm() = default;
|
||||
|
||||
void tl_uh_bfm::fw_thread() {
|
||||
d_ready = true;
|
||||
while (true) {
|
||||
a_valid = false;
|
||||
wait(fw_queue.get_event());
|
||||
auto gp = fw_queue.get_next_transaction();
|
||||
if (gp->get_data_length() == 4) {
|
||||
auto addr = gp->get_address() + offset;
|
||||
a_bits_address = addr;
|
||||
a_valid = true;
|
||||
a_bits_param = 0;
|
||||
a_bits_size = 2; // 2^2 bytes
|
||||
a_bits_source = 0x55;
|
||||
a_bits_mask = 0xf;
|
||||
a_bits_corrupt = false;
|
||||
if (gp->get_command() == tlm::TLM_WRITE_COMMAND) {
|
||||
a_bits_opcode = PutFullData;
|
||||
a_bits_data = *(uint32_t *)gp->get_data_ptr();
|
||||
} else {
|
||||
a_bits_opcode = Get;
|
||||
a_bits_data = 0;
|
||||
}
|
||||
tl_in_progress.push_back(gp);
|
||||
do {
|
||||
wait(clock.posedge_event());
|
||||
} while (a_ready == false);
|
||||
} else
|
||||
SCCERR("tlbfm") << "Got transaction with unequal length";
|
||||
}
|
||||
}
|
||||
|
||||
void tl_uh_bfm::tl_response_method() {
|
||||
if (d_valid && d_ready) {
|
||||
// if(d_bits_source==0x55){ // this is ours
|
||||
auto gp = tl_in_progress.front();
|
||||
sc_assert(gp && "Got TL response without a request in queue");
|
||||
tl_in_progress.pop_front();
|
||||
if (gp->get_command() == tlm::TLM_WRITE_COMMAND) {
|
||||
sc_assert(d_bits_opcode == AccessAck &&
|
||||
"TL did not respond with AccessAck to write request");
|
||||
} else {
|
||||
sc_assert(d_bits_opcode == AccessAckData &&
|
||||
"TL did not respond with AccessAckData to read request");
|
||||
*(uint32_t *)(gp->get_data_ptr()) = d_bits_data;
|
||||
}
|
||||
gp->set_response_status(tlm::TLM_OK_RESPONSE);
|
||||
sc_core::sc_time delay;
|
||||
tlm::tlm_phase phase{tlm::BEGIN_RESP};
|
||||
auto ret = socket->nb_transport_bw(*gp, phase, delay);
|
||||
if (ret == tlm::TLM_COMPLETED || (ret == tlm::TLM_UPDATED && phase == tlm::END_RESP)) {
|
||||
d_ready = true;
|
||||
gp->release();
|
||||
} else
|
||||
d_ready = false;
|
||||
// }
|
||||
}
|
||||
}
|
||||
|
||||
} /* namespace sysc */
|
||||
|
|
@ -50,6 +50,15 @@
|
|||
#endif
|
||||
#include <fstream>
|
||||
#include <sstream>
|
||||
#ifdef HAS_VERILATOR
|
||||
#include <verilated.h>
|
||||
inline void configure_verilator() {
|
||||
Verilated::commandArgs(sc_core::sc_argc(), const_cast<char **>(sc_core::sc_argv()));
|
||||
}
|
||||
#else
|
||||
inline void configure_verilator() {}
|
||||
#endif
|
||||
const std::string core_path{"i_system.i_hifive1.i_fe310.i_core_complex"};
|
||||
|
||||
using namespace sc_core;
|
||||
using namespace sysc;
|
||||
|
|
@ -67,6 +76,10 @@ int sc_main(int argc, char *argv[]) {
|
|||
///////////////////////////////////////////////////////////////////////////
|
||||
sc_report_handler::set_actions(SC_ID_MORE_THAN_ONE_SIGNAL_DRIVER_, SC_DO_NOTHING);
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// Setup verilator infrastructure (if used)
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
configure_verilator();
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// CLI argument parsing & logging setup
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
CLIParser parser(argc, argv);
|
||||
|
|
|
|||
|
|
@ -89,21 +89,27 @@ BOOST_PP_REPEAT(8, PORT_NAMING, _)
|
|||
// proxy callbacks
|
||||
h_bridge[0].register_nb_transport([this](tlm::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum {
|
||||
ha_o.write(gp.get_value());
|
||||
return tlm::TLM_ACCEPTED;
|
||||
});
|
||||
h_bridge[1].register_nb_transport([this](tlm::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum {
|
||||
la_o.write(gp.get_value());
|
||||
return tlm::TLM_ACCEPTED;
|
||||
});
|
||||
h_bridge[2].register_nb_transport([this](tlm::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum {
|
||||
hb_o.write(gp.get_value());
|
||||
return tlm::TLM_ACCEPTED;
|
||||
});
|
||||
h_bridge[3].register_nb_transport([this](tlm::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum {
|
||||
lb_o.write(gp.get_value());
|
||||
return tlm::TLM_ACCEPTED;
|
||||
});
|
||||
h_bridge[4].register_nb_transport([this](tlm::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum {
|
||||
hc_o.write(gp.get_value());
|
||||
return tlm::TLM_ACCEPTED;
|
||||
});
|
||||
h_bridge[5].register_nb_transport([this](tlm::tlm_signal_gp<sc_logic> &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum {
|
||||
lc_o.write(gp.get_value());
|
||||
return tlm::TLM_ACCEPTED;
|
||||
});
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue