diff --git a/CMakeLists.txt b/CMakeLists.txt index 849e7f2..ec8459d 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -84,6 +84,14 @@ if(SystemC_FOUND) endif() endif(SystemC_FOUND) +#find_package(Verilator) +if(VERILATOR_FOUND) + message(STATUS "Verilator found at ${VERILATOR_EXECUTABLE}") +else() + message(STATUS "Verilator not found, omitting RTL parts in build") +endif() + +set(PROJECT_3PARTY_DIRS external) include(clang-format) set(ENABLE_CLANG_TIDY OFF CACHE BOOL "Add clang-tidy automatically to builds") diff --git a/platform/incl/sysc/rtl/VTLSPI.h b/platform/incl/sysc/rtl/VTLSPI.h new file mode 100644 index 0000000..8e8026a --- /dev/null +++ b/platform/incl/sysc/rtl/VTLSPI.h @@ -0,0 +1,374 @@ +// Verilated -*- SystemC -*- +// DESCRIPTION: Verilator output: Primary design header +// +// This header should be included by all source files instantiating the design. +// The class here is then constructed to instantiate the design. +// See the Verilator manual for examples. + +#ifndef _VTLSPI_H_ +#define _VTLSPI_H_ + +#include "systemc.h" +#include "verilated_heavy.h" +#include "verilated_sc.h" + +class VTLSPI__Syms; + +//---------- + +SC_MODULE(VTLSPI) { +public: + // PORTS + // The application code writes and reads these signals to + // propagate new values into/out from the Verilated model. + sc_in clock; + sc_in reset; + sc_out auto_int_xing_out_sync_0; + sc_out auto_control_xing_in_a_ready; + sc_in auto_control_xing_in_a_valid; + sc_in auto_control_xing_in_a_bits_opcode; + sc_in auto_control_xing_in_a_bits_param; + sc_in auto_control_xing_in_a_bits_size; + sc_in auto_control_xing_in_a_bits_source; + sc_in auto_control_xing_in_a_bits_mask; + sc_in auto_control_xing_in_a_bits_corrupt; + sc_in auto_control_xing_in_d_ready; + sc_out auto_control_xing_in_d_valid; + sc_out auto_control_xing_in_d_bits_opcode; + sc_out auto_control_xing_in_d_bits_size; + sc_out auto_control_xing_in_d_bits_source; + sc_out auto_io_out_sck; + sc_in auto_io_out_dq_0_i; + sc_out auto_io_out_dq_0_o; + sc_out auto_io_out_dq_0_oe; + sc_in auto_io_out_dq_1_i; + sc_out auto_io_out_dq_1_o; + sc_out auto_io_out_dq_1_oe; + sc_in auto_io_out_dq_2_i; + sc_in auto_io_out_dq_3_i; + sc_out auto_io_out_cs_0; + sc_out auto_io_out_cs_2; + sc_out auto_io_out_cs_3; + sc_in auto_control_xing_in_a_bits_address; + sc_in auto_control_xing_in_a_bits_data; + sc_out auto_control_xing_in_d_bits_data; + + // LOCAL SIGNALS + // Internals; generally not touched by application code + // Anonymous structures to workaround compiler member-count bugs + struct { + VL_SIG8(TLSPI__DOT__fifo_io_tx_valid, 0, 0); + VL_SIG8(TLSPI__DOT__fifo_io_ip_txwm, 0, 0); + VL_SIG8(TLSPI__DOT__fifo_io_ip_rxwm, 0, 0); + VL_SIG8(TLSPI__DOT__mac_io_link_tx_ready, 0, 0); + VL_SIG8(TLSPI__DOT__ctrl_fmt_proto, 1, 0); + VL_SIG8(TLSPI__DOT__ctrl_fmt_endian, 0, 0); + VL_SIG8(TLSPI__DOT__ctrl_fmt_iodir, 0, 0); + VL_SIG8(TLSPI__DOT__ctrl_fmt_len, 3, 0); + VL_SIG8(TLSPI__DOT__ctrl_sck_pol, 0, 0); + VL_SIG8(TLSPI__DOT__ctrl_sck_pha, 0, 0); + VL_SIG8(TLSPI__DOT__ctrl_cs_id, 1, 0); + VL_SIG8(TLSPI__DOT__ctrl_cs_dflt_0, 0, 0); + VL_SIG8(TLSPI__DOT__ctrl_cs_dflt_1, 0, 0); + VL_SIG8(TLSPI__DOT__ctrl_cs_dflt_2, 0, 0); + VL_SIG8(TLSPI__DOT__ctrl_cs_dflt_3, 0, 0); + VL_SIG8(TLSPI__DOT__ctrl_cs_mode, 1, 0); + VL_SIG8(TLSPI__DOT__ctrl_dla_cssck, 7, 0); + VL_SIG8(TLSPI__DOT__ctrl_dla_sckcs, 7, 0); + VL_SIG8(TLSPI__DOT__ctrl_dla_intercs, 7, 0); + VL_SIG8(TLSPI__DOT__ctrl_dla_interxfr, 7, 0); + VL_SIG8(TLSPI__DOT__ctrl_wm_tx, 3, 0); + VL_SIG8(TLSPI__DOT__ctrl_wm_rx, 3, 0); + VL_SIG8(TLSPI__DOT__ie_txwm, 0, 0); + VL_SIG8(TLSPI__DOT__ie_rxwm, 0, 0); + VL_SIG8(TLSPI__DOT___T_426, 7, 0); + VL_SIG8(TLSPI__DOT___T_1495, 0, 0); + VL_SIG8(TLSPI__DOT___T_1732, 0, 0); + VL_SIG8(TLSPI__DOT___T_1766, 0, 0); + VL_SIG8(TLSPI__DOT___T_1796, 0, 0); + VL_SIG8(TLSPI__DOT___T_1742, 0, 0); + VL_SIG8(TLSPI__DOT___T_1904, 0, 0); + VL_SIG8(TLSPI__DOT___T_1844, 0, 0); + VL_SIG8(TLSPI__DOT___T_1832, 0, 0); + VL_SIG8(TLSPI__DOT___T_1802, 0, 0); + VL_SIG8(TLSPI__DOT___GEN_155, 0, 0); + VL_SIG8(TLSPI__DOT___GEN_162, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_52, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_55, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_73, 3, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_167, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_245, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_499, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_500, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_509, 2, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_511, 2, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_513, 1, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_515, 5, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_522, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_526, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_530, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_534, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_538, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_541, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_554, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_555, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_564, 2, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_568, 1, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_570, 5, 0); + }; + struct { + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_579, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_587, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_591, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_602, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_615, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_618, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_619, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_636, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_639, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_640, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_658, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_673, 0, 0); + VL_SIG8(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_687, 0, 0); + VL_SIG8(TLSPI__DOT__intsource__DOT__AsyncResetRegVec_w1_i0__DOT__reg_0_q, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_52, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_55, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_73, 3, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_97, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_167, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_181, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_245, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_486, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_496, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_499, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_500, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_509, 2, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_511, 2, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_513, 1, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_515, 5, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_522, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_526, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_530, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_534, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_538, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_541, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_542, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_551, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_554, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_555, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_564, 2, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_568, 1, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_570, 5, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_579, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_587, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_591, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_602, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_615, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_618, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_619, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_636, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_639, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_640, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_658, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_673, 0, 0); + VL_SIG8(TLSPI__DOT__TLMonitor__DOT___T_687, 0, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__rxq_io_enq_valid, 0, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__rxen, 0, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT___T_57, 3, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__cs_mode, 1, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data, 7, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT__value, 2, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT__value_1, 2, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_39, 0, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_40, 0, 0); + }; + struct { + VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_42, 0, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_43, 0, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_44, 0, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_47, 0, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_52, 2, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_54, 2, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT__value, 2, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT__value_1, 2, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_39, 0, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_40, 0, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_42, 0, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_43, 0, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_44, 0, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_47, 0, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_52, 2, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_54, 2, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy_io_op_valid, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy_io_op_bits_fn, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy_io_op_bits_stb, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy_io_op_bits_cnt, 7, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__cs_id, 1, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__cs_dflt_0, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__cs_dflt_1, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__cs_dflt_2, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__cs_dflt_3, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__cs_set, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT___T_69, 3, 0); + VL_SIG8(TLSPI__DOT__mac__DOT___T_88, 3, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__clear, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__cs_assert, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__cs_deassert, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT___T_94, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__state, 1, 0); + VL_SIG8(TLSPI__DOT__mac__DOT___T_97, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT___T_99, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT___T_102, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT___T_107, 3, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pol, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pha, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto, 1, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_endian, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_iodir, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__setup_d, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_42, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_43, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__sample_d, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_44, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_45, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__last_d, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__scnt, 7, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__sched, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__sck, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__cref, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__cinv, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__rxd, 3, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__buffer, 7, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_71, 7, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__shift, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_96, 7, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__txd, 3, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_154, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_155, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__accept, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__txd_in, 3, 0); + }; + struct { + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_102, 1, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__done, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_156, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__xfr, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___GEN_15, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___GEN_22, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_111, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT__txen_2, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_128, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___T_148, 0, 0); + VL_SIG8(TLSPI__DOT__mac__DOT__phy__DOT___GEN_13, 0, 0); + VL_SIG16(TLSPI__DOT__ctrl_sck_div, 11, 0); + VL_SIG16(TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_div, 11, 0); + VL_SIG16(TLSPI__DOT__mac__DOT__phy__DOT__tcnt, 11, 0); + VL_SIG16(TLSPI__DOT__mac__DOT__phy__DOT___T_47, 11, 0); + VL_SIG16(TLSPI__DOT__mac__DOT__phy__DOT___GEN_16, 11, 0); + VL_SIG(TLSPI__DOT___T_626, 31, 0); + VL_SIG(TLSPI__DOT___GEN_172, 31, 0); + VL_SIG(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_517, 28, 0); + VL_SIG(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_679, 31, 0); + VL_SIG(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_690, 31, 0); + VL_SIG(TLSPI__DOT__buffer__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus, 31, 0); + VL_SIG(TLSPI__DOT__TLMonitor__DOT___T_517, 28, 0); + VL_SIG(TLSPI__DOT__TLMonitor__DOT___T_679, 31, 0); + VL_SIG(TLSPI__DOT__TLMonitor__DOT___T_690, 31, 0); + VL_SIG(TLSPI__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus, 31, 0); + VL_SIG64(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_604, 63, 0); + VL_SIG64(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___GEN_15, 63, 0); + VL_SIG64(TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_677, 63, 0); + VL_SIG64(TLSPI__DOT__TLMonitor__DOT___T_604, 63, 0); + VL_SIG64(TLSPI__DOT__TLMonitor__DOT___GEN_15, 63, 0); + VL_SIG64(TLSPI__DOT__TLMonitor__DOT___T_677, 63, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__txq__DOT___T_35[8], 7, 0); + VL_SIG8(TLSPI__DOT__fifo__DOT__rxq__DOT___T_35[8], 7, 0); + }; + + // LOCAL VARIABLES + // Internals; generally not touched by application code + VL_SIG8(__Vcellinp__TLSPI__reset, 0, 0); + VL_SIG8(__Vcellinp__TLSPI__clock, 0, 0); + VL_SIG8(__Vcellinp__TLSPI__auto_io_out_dq_3_i, 0, 0); + VL_SIG8(__Vcellinp__TLSPI__auto_io_out_dq_2_i, 0, 0); + VL_SIG8(__Vcellinp__TLSPI__auto_io_out_dq_1_i, 0, 0); + VL_SIG8(__Vcellinp__TLSPI__auto_io_out_dq_0_i, 0, 0); + VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_d_ready, 0, 0); + VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt, 0, 0); + VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask, 3, 0); + VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source, 5, 0); + VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size, 1, 0); + VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param, 2, 0); + VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode, 2, 0); + VL_SIG8(__Vcellinp__TLSPI__auto_control_xing_in_a_valid, 0, 0); + VL_SIG8(__VinpClk__TOP____Vcellinp__TLSPI__reset, 0, 0); + VL_SIG8(__Vclklast__TOP____Vcellinp__TLSPI__clock, 0, 0); + VL_SIG8(__Vclklast__TOP____VinpClk__TOP____Vcellinp__TLSPI__reset, 0, 0); + VL_SIG8(__Vchglast__TOP____Vcellinp__TLSPI__reset, 0, 0); + VL_SIG(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data, 31, 0); + VL_SIG(__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address, 28, 0); + + // INTERNAL VARIABLES + // Internals; generally not touched by application code + VTLSPI__Syms *__VlSymsp; // Symbol table + + // PARAMETERS + // Parameters marked /*verilator public*/ for use by application code + + // CONSTRUCTORS +private: + VL_UNCOPYABLE(VTLSPI); ///< Copying not allowed +public: + SC_CTOR(VTLSPI); + virtual ~VTLSPI(); + + // API METHODS +private: + void eval(); + +public: + void final(); + + // INTERNAL METHODS +private: + static void _eval_initial_loop(VTLSPI__Syms * __restrict vlSymsp); + +public: + void __Vconfigure(VTLSPI__Syms * symsp, bool first); + +private: + static QData _change_request(VTLSPI__Syms * __restrict vlSymsp); + +public: + static void _combo__TOP__2(VTLSPI__Syms * __restrict vlSymsp); + static void _combo__TOP__6(VTLSPI__Syms * __restrict vlSymsp); + static void _combo__TOP__8(VTLSPI__Syms * __restrict vlSymsp); + +private: + void _ctor_var_reset(); + +public: + static void _eval(VTLSPI__Syms * __restrict vlSymsp); + +private: +#ifdef VL_DEBUG + void _eval_debug_assertions(); +#endif // VL_DEBUG +public: + static void _eval_initial(VTLSPI__Syms * __restrict vlSymsp); + static void _eval_settle(VTLSPI__Syms * __restrict vlSymsp); + static void _initial__TOP__1(VTLSPI__Syms * __restrict vlSymsp); + static void _sequent__TOP__4(VTLSPI__Syms * __restrict vlSymsp); + static void _sequent__TOP__5(VTLSPI__Syms * __restrict vlSymsp); + static void _sequent__TOP__7(VTLSPI__Syms * __restrict vlSymsp); + static void _settle__TOP__3(VTLSPI__Syms * __restrict vlSymsp); +} +VL_ATTR_ALIGNED(128); + +#endif // guard diff --git a/platform/incl/sysc/rtl/VTLSPI__Syms.h b/platform/incl/sysc/rtl/VTLSPI__Syms.h new file mode 100644 index 0000000..f718bd8 --- /dev/null +++ b/platform/incl/sysc/rtl/VTLSPI__Syms.h @@ -0,0 +1,37 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Symbol table internal header +// +// Internal details; most calling programs do not need this header + +#ifndef _VTLSPI__Syms_H_ +#define _VTLSPI__Syms_H_ + +#include "verilated_heavy.h" + +// INCLUDE MODULE CLASSES +#include "VTLSPI.h" + +// SYMS CLASS +class VTLSPI__Syms : public VerilatedSyms { +public: + // LOCAL STATE + const char *__Vm_namep; + bool __Vm_didInit; + + // SUBCELL STATE + VTLSPI *TOPp; + + // SCOPE NAMES + VerilatedScope __Vscope_TLSPI__TLMonitor; + VerilatedScope __Vscope_TLSPI__buffer__TLMonitor; + + // CREATORS + VTLSPI__Syms(VTLSPI *topp, const char *namep); + ~VTLSPI__Syms() {} + + // METHODS + inline const char *name() { return __Vm_namep; } + +} VL_ATTR_ALIGNED(64); + +#endif // guard diff --git a/platform/incl/sysc/rtl/tl_uh_bfm.h b/platform/incl/sysc/rtl/tl_uh_bfm.h new file mode 100644 index 0000000..3565984 --- /dev/null +++ b/platform/incl/sysc/rtl/tl_uh_bfm.h @@ -0,0 +1,83 @@ +/******************************************************************************* + * Copyright (C) 2018 MINRES Technologies GmbH + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + *******************************************************************************/ + +#ifndef _TLBFM_H_ +#define _TLBFM_H_ + +#include "scc/target_mixin.h" +#include "scv4tlm/tlm_rec_target_socket.h" +#include + +namespace sysc { + +class tl_uh_bfm : public sc_core::sc_module { +public: + SC_HAS_PROCESS(tl_uh_bfm);// NOLINT + + enum { Get = 4, AccessAckData = 1, PutFullData = 0, PutPartialData = 1, AccessAck = 0 }; + + scc::target_mixin> socket; + + sc_core::sc_in clock; + sc_core::sc_in reset; + sc_core::sc_in a_ready; + sc_core::sc_out a_valid; + sc_core::sc_out a_bits_address; + sc_core::sc_out a_bits_data; + sc_core::sc_out a_bits_opcode; + sc_core::sc_out a_bits_param; + sc_core::sc_out a_bits_size; + sc_core::sc_out a_bits_source; + sc_core::sc_out a_bits_mask; + sc_core::sc_out a_bits_corrupt; + sc_core::sc_in d_bits_data; + sc_core::sc_out d_ready; + sc_core::sc_in d_valid; + sc_core::sc_in d_bits_opcode; + sc_core::sc_in d_bits_size; + sc_core::sc_in d_bits_source; + + tl_uh_bfm(sc_core::sc_module_name nm, int64_t offset = 0); + + ~tl_uh_bfm() override; + +private: + const int64_t offset; + tlm_utils::peq_with_get fw_queue; + std::deque tl_in_progress; + void fw_thread(); + void tl_response_method(); +}; + +} /* namespace sysc */ + +#endif /* _TLBFM_H_ */ diff --git a/platform/src/CMakeLists.txt b/platform/src/CMakeLists.txt index b9cba48..743d3b1 100644 --- a/platform/src/CMakeLists.txt +++ b/platform/src/CMakeLists.txt @@ -29,9 +29,24 @@ set(LIB_SOURCES sysc/uart.cpp CLIParser.cpp ) +if(VERILATOR_FOUND) + set(LIB_SOURCES ${LIB_SOURCES} + rtl/spi_rtl.cpp + rtl/tl_uh_bfm.cpp + rtl/VTLSPI__Syms.cpp + rtl/VTLSPI.cpp + ) + set_source_files_properties(beh/fe310.cpp PROPERTIES COMPILE_DEFINITIONS "HAS_VERILATOR") +endif() + add_library(platform ${LIB_SOURCES}) target_include_directories(platform PUBLIC ../incl) target_link_libraries(platform PUBLIC riscv_sc CONAN_PKG::seasocks external) +if(VERILATOR_FOUND) + message(STATUS "Verilator found at ${VERILATOR_EXECUTABLE}") + target_include_directories(platform PRIVATE ${PROJECT_SOURCE_DIR}/incl/sysc/rtl) + target_include_directories(platform SYSTEM PRIVATE ${VERILATOR_INCLUDE_DIR}) +endif() set_target_properties(platform PROPERTIES VERSION ${PROJECT_VERSION} # ${VERSION} was defined in the main CMakeLists. FRAMEWORK FALSE @@ -42,6 +57,12 @@ add_executable(riscv-vp sc_main.cpp) # include files for this application target_include_directories(riscv-vp SYSTEM PRIVATE ${LLVM_INCLUDE_DIRS}) target_link_libraries(riscv-vp PUBLIC platform riscv_sc) +if(VERILATOR_FOUND) + set_source_files_properties(sc_main.cpp PROPERTIES COMPILE_DEFINITIONS HAS_VERILATOR) + target_include_directories(riscv-vp SYSTEM PRIVATE ${VERILATOR_INCLUDE_DIR}) + target_link_libraries(riscv-vp verilated) +endif() + if (Tcmalloc_FOUND) target_link_libraries(riscv-vp PUBLIC ${Tcmalloc_LIBRARIES}) endif(Tcmalloc_FOUND) diff --git a/platform/src/rtl/VTLSPI.cpp b/platform/src/rtl/VTLSPI.cpp new file mode 100644 index 0000000..b1d8efb --- /dev/null +++ b/platform/src/rtl/VTLSPI.cpp @@ -0,0 +1,4364 @@ +// Verilated -*- SystemC -*- +// DESCRIPTION: Verilator output: Design implementation internals +// See VTLSPI.h for the primary calling header + +#include "VTLSPI.h" // For This +#include "VTLSPI__Syms.h" + +//-------------------- +// STATIC VARIABLES + +//-------------------- + +VL_SC_CTOR_IMP(VTLSPI) +#if (SYSTEMC_VERSION > 20011000) +: clock("clock") +, reset("reset") +, auto_int_xing_out_sync_0("auto_int_xing_out_sync_0") +, auto_control_xing_in_a_ready("auto_control_xing_in_a_ready") +, auto_control_xing_in_a_valid("auto_control_xing_in_a_valid") +, auto_control_xing_in_a_bits_opcode("auto_control_xing_in_a_bits_opcode") +, auto_control_xing_in_a_bits_param("auto_control_xing_in_a_bits_param") +, auto_control_xing_in_a_bits_size("auto_control_xing_in_a_bits_size") +, auto_control_xing_in_a_bits_source("auto_control_xing_in_a_bits_source") +, auto_control_xing_in_a_bits_mask("auto_control_xing_in_a_bits_mask") +, auto_control_xing_in_a_bits_corrupt("auto_control_xing_in_a_bits_corrupt") +, auto_control_xing_in_d_ready("auto_control_xing_in_d_ready") +, auto_control_xing_in_d_valid("auto_control_xing_in_d_valid") +, auto_control_xing_in_d_bits_opcode("auto_control_xing_in_d_bits_opcode") +, auto_control_xing_in_d_bits_size("auto_control_xing_in_d_bits_size") +, auto_control_xing_in_d_bits_source("auto_control_xing_in_d_bits_source") +, auto_io_out_sck("auto_io_out_sck") +, auto_io_out_dq_0_i("auto_io_out_dq_0_i") +, auto_io_out_dq_0_o("auto_io_out_dq_0_o") +, auto_io_out_dq_0_oe("auto_io_out_dq_0_oe") +, auto_io_out_dq_1_i("auto_io_out_dq_1_i") +, auto_io_out_dq_1_o("auto_io_out_dq_1_o") +, auto_io_out_dq_1_oe("auto_io_out_dq_1_oe") +, auto_io_out_dq_2_i("auto_io_out_dq_2_i") +, auto_io_out_dq_3_i("auto_io_out_dq_3_i") +, auto_io_out_cs_0("auto_io_out_cs_0") +, auto_io_out_cs_2("auto_io_out_cs_2") +, auto_io_out_cs_3("auto_io_out_cs_3") +, auto_control_xing_in_a_bits_address("auto_control_xing_in_a_bits_address") +, auto_control_xing_in_a_bits_data("auto_control_xing_in_a_bits_data") +, auto_control_xing_in_d_bits_data("auto_control_xing_in_d_bits_data") +#endif +{ + VTLSPI__Syms *__restrict vlSymsp = __VlSymsp = new VTLSPI__Syms(this, name()); + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Sensitivities on all clocks and combo inputs + SC_METHOD(eval); + sensitive << clock; + sensitive << reset; + sensitive << auto_control_xing_in_a_valid; + sensitive << auto_control_xing_in_a_bits_opcode; + sensitive << auto_control_xing_in_a_bits_param; + sensitive << auto_control_xing_in_a_bits_size; + sensitive << auto_control_xing_in_a_bits_source; + sensitive << auto_control_xing_in_a_bits_address; + sensitive << auto_control_xing_in_a_bits_mask; + sensitive << auto_control_xing_in_a_bits_data; + sensitive << auto_control_xing_in_a_bits_corrupt; + sensitive << auto_control_xing_in_d_ready; + sensitive << auto_io_out_dq_0_i; + sensitive << auto_io_out_dq_1_i; + sensitive << auto_io_out_dq_2_i; + sensitive << auto_io_out_dq_3_i; + + // Reset internal values + + // Reset structure values + _ctor_var_reset(); +} + +void VTLSPI::__Vconfigure(VTLSPI__Syms *vlSymsp, bool first) { + if (false && first) { + } // Prevent unused + this->__VlSymsp = vlSymsp; +} + +VTLSPI::~VTLSPI() { + delete __VlSymsp; + __VlSymsp = nullptr; +} + +//-------------------- + +void VTLSPI::eval() { + VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate VTLSPI::eval\n");); + VTLSPI__Syms *__restrict vlSymsp = this->__VlSymsp; // Setup global symbol table + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; +#ifdef VL_DEBUG + // Debug assertions + _eval_debug_assertions(); +#endif // VL_DEBUG + // Initialize + if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) _eval_initial_loop(vlSymsp); + // Evaluate till stable + int __VclockLoop = 0; + QData __Vchange = 1; + do { + VL_DEBUG_IF(VL_DBG_MSGF("+ Clock loop\n");); + _eval(vlSymsp); + if (VL_UNLIKELY(++__VclockLoop > 100)) { + // About to fail, so enable debug to see what's not settling. + // Note you must run make with OPT=-DVL_DEBUG for debug prints. + int __Vsaved_debug = Verilated::debug(); + Verilated::debug(1); + __Vchange = _change_request(vlSymsp); + Verilated::debug(__Vsaved_debug); + VL_FATAL_MT(__FILE__, __LINE__, __FILE__, "Verilated model didn't converge"); + } else { + __Vchange = _change_request(vlSymsp); + } + } while (VL_UNLIKELY(__Vchange)); +} + +void VTLSPI::_eval_initial_loop(VTLSPI__Syms *__restrict vlSymsp) { + vlSymsp->__Vm_didInit = true; + _eval_initial(vlSymsp); + // Evaluate till stable + int __VclockLoop = 0; + QData __Vchange = 1; + do { + _eval_settle(vlSymsp); + _eval(vlSymsp); + if (VL_UNLIKELY(++__VclockLoop > 100)) { + // About to fail, so enable debug to see what's not settling. + // Note you must run make with OPT=-DVL_DEBUG for debug prints. + int __Vsaved_debug = Verilated::debug(); + Verilated::debug(1); + __Vchange = _change_request(vlSymsp); + Verilated::debug(__Vsaved_debug); + VL_FATAL_MT(__FILE__, __LINE__, __FILE__, "Verilated model didn't DC converge"); + } else { + __Vchange = _change_request(vlSymsp); + } + } while (VL_UNLIKELY(__Vchange)); +} + +//-------------------- +// Internal Methods + +void VTLSPI::_initial__TOP__1(VTLSPI__Syms *__restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::_initial__TOP__1\n");); + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Variables + VL_SIGW(__Vtemp1, 159, 0, 5); + VL_SIGW(__Vtemp2, 159, 0, 5); + // Body + // INITIAL at ../git/freedom/rocket-chip/src/main/resources/vsrc/AsyncResetReg.v:57 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__intsource__DOT__AsyncResetRegVec_w1_i0__DOT__reg_0_q = 0U; + } + // INITIAL at ../git/freedom/rocket-chip/src/main/resources/vsrc/plusarg_reader.v:17 + __Vtemp1[0U] = 0x743d2564U; + __Vtemp1[1U] = 0x6d656f75U; + __Vtemp1[2U] = 0x6b5f7469U; + __Vtemp1[3U] = 0x656c696eU; + __Vtemp1[4U] = 0x74696cU; + if ((!VL_VALUEPLUSARGS_INI(32, VL_CVT_PACK_STR_NW(5, __Vtemp1), + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus))) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus = 0U; + } + // INITIAL at ../git/freedom/rocket-chip/src/main/resources/vsrc/plusarg_reader.v:17 + __Vtemp2[0U] = 0x743d2564U; + __Vtemp2[1U] = 0x6d656f75U; + __Vtemp2[2U] = 0x6b5f7469U; + __Vtemp2[3U] = 0x656c696eU; + __Vtemp2[4U] = 0x74696cU; + if ((!VL_VALUEPLUSARGS_INI(32, VL_CVT_PACK_STR_NW(5, __Vtemp2), + vlTOPp->TLSPI__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus))) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus = 0U; + } +} + +VL_INLINE_OPT void VTLSPI::_combo__TOP__2(VTLSPI__Syms *__restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::_combo__TOP__2\n");); + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_3_i, vlTOPp->auto_io_out_dq_3_i); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_2_i, vlTOPp->auto_io_out_dq_2_i); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_1_i, vlTOPp->auto_io_out_dq_1_i); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_0_i, vlTOPp->auto_io_out_dq_0_i); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_d_ready, vlTOPp->auto_control_xing_in_d_ready); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__clock, vlTOPp->clock); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__rxd = ((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_3_i) << 3U) | + ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_2_i) << 2U)) | + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_1_i) << 1U) | + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_0_i))); + VL_ASSIGN_SII(1, vlTOPp->auto_control_xing_in_a_ready, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_d_ready); +} + +void VTLSPI::_settle__TOP__3(VTLSPI__Syms *__restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::_settle__TOP__3\n");); + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_3_i, vlTOPp->auto_io_out_dq_3_i); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_2_i, vlTOPp->auto_io_out_dq_2_i); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_1_i, vlTOPp->auto_io_out_dq_1_i); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_0_i, vlTOPp->auto_io_out_dq_0_i); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_d_ready, vlTOPp->auto_control_xing_in_d_ready); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__clock, vlTOPp->clock); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt, + vlTOPp->auto_control_xing_in_a_bits_corrupt); + VL_ASSIGN_ISI(4, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask, + vlTOPp->auto_control_xing_in_a_bits_mask); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid, vlTOPp->auto_control_xing_in_a_valid); + VL_ASSIGN_ISI(3, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param, + vlTOPp->auto_control_xing_in_a_bits_param); + VL_ASSIGN_ISI(3, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode, + vlTOPp->auto_control_xing_in_a_bits_opcode); + VL_ASSIGN_ISI(6, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source, + vlTOPp->auto_control_xing_in_a_bits_source); + VL_ASSIGN_ISI(2, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size, + vlTOPp->auto_control_xing_in_a_bits_size); + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_dq_1_o, (1U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txd) >> 1U))); + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_dq_0_o, (1U & (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txd))); + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_sck, vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_690 = + ((IData)(1U) + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_679); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_690 = ((IData)(1U) + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_679); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_54 = + (7U & ((IData)(1U) + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value_1))); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_54 = + (7U & ((IData)(1U) + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value_1))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_111 = + ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto)) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_iodir)); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txen_2 = + ((2U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto)) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_iodir)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_499 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496) - (IData)(1U))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_500 = + (1U & (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_554 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551) - (IData)(1U))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_555 = + (1U & (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_618 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_615) - (IData)(1U))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_619 = + (1U & (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_615))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_639 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_636) - (IData)(1U))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_640 = + (1U & (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_636))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_499 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496) - (IData)(1U))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_500 = (1U & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_554 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_551) - (IData)(1U))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_555 = (1U & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_551))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_618 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_615) - (IData)(1U))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_619 = (1U & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_615))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_639 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_636) - (IData)(1U))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_640 = (1U & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_636))); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data = + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35[vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value_1]; + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_cs_3, vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_3); + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_cs_2, vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_2); + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_cs_0, vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_0); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_52 = + (7U & ((IData)(1U) + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value))); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_52 = + (7U & ((IData)(1U) + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value))); + vlTOPp->TLSPI__DOT__mac__DOT___T_97 = (0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)); + vlTOPp->TLSPI__DOT__mac__DOT___T_99 = (1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)); + vlTOPp->TLSPI__DOT__mac__DOT___T_102 = (2U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_128 = ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__done) | + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__last_d)); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq_io_enq_valid = + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__done) & (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxen)); + vlTOPp->TLSPI__DOT__fifo__DOT___T_57 = + (0xfU & + (((((0U == (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_proto)) ? (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_len) : 0U) | + (7U & + ((1U == (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_proto)) ? ((IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_len) >> 1U) + : 0U))) | + (3U & + ((2U == (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_proto)) ? ((IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_len) >> 2U) + : 0U))) + + (((1U == (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_proto)) & (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_len)) | + ((2U == (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_proto)) & + (0U != (3U & (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_len))))))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cinv = ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pha) ^ + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pol)); + vlTOPp->TLSPI__DOT__mac__DOT___T_88 = + ((((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_3) << 3U) | + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_2) << 2U)) | + (((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_1) << 1U) | (IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_0))); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_40 = ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value) == + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value_1)); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_40 = ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value) == + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value_1)); + vlTOPp->TLSPI__DOT__mac__DOT___T_69 = + (0xfU & + (((((IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_3) << 3U) | ((IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_2) << 2U)) | + (((IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_1) << 1U) | (IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_0))) ^ + ((3U != (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__cs_mode)) << (IData)(vlTOPp->TLSPI__DOT__ctrl_cs_id)))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_154 = (1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sched = ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) | + (0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_47 = ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_15 = ((0U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) & + ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) & + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr) & + (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref))))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__shift = ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__setup_d) | + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sample_d) & + (0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_155 = ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) & + (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref))); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__reset, vlTOPp->reset); + VL_ASSIGN_ISI(32, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data, + vlTOPp->auto_control_xing_in_a_bits_data); + VL_ASSIGN_ISI(29, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address, + vlTOPp->auto_control_xing_in_a_bits_address); + VL_ASSIGN_SII(1, vlTOPp->auto_int_xing_out_sync_0, + vlTOPp->TLSPI__DOT__intsource__DOT__AsyncResetRegVec_w1_i0__DOT__reg_0_q); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_687 = + ((((VL_ULL(0) == vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_604) | + (0U == vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus)) | + (vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_679 < + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_687 = + ((((VL_ULL(0) == vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_604) | + (0U == vlTOPp->TLSPI__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus)) | + (vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_679 < + vlTOPp->TLSPI__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__rxd = ((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_3_i) << 3U) | + ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_2_i) << 2U)) | + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_1_i) << 1U) | + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_io_out_dq_0_i))); + VL_ASSIGN_SII(1, vlTOPp->auto_control_xing_in_a_ready, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_d_ready); + vlTOPp->TLSPI__DOT___T_626 = + (((((8U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)) ? 0xffU : 0U) << 0x18U) | + (((4U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)) ? 0xffU : 0U) << 0x10U)) | + ((((2U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)) ? 0xffU : 0U) << 8U) | + ((1U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)) ? 0xffU : 0U))); + VL_ASSIGN_SII(1, vlTOPp->auto_control_xing_in_d_valid, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid); + vlTOPp->TLSPI__DOT___T_1495 = ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_d_ready)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542 = + ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_d_ready) & + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_542 = ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_d_ready) & + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486 = + ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_d_ready) & + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_486 = ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_d_ready) & + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_526 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_511)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_526 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param) == + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_511)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + VL_ASSIGN_SII(3, vlTOPp->auto_control_xing_in_d_bits_opcode, + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_522 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_509)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_579 = + (((4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode)) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_564)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_522 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode) == + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_509)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_579 = + (((4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode)) == + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_564)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_534 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_515)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_658 = + (1U & ((~(IData)((vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_604 >> + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_534 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source) == + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_515)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_658 = + (1U & ((~(IData)((vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_604 >> + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_530 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_513)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_530 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size) == + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_513)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT___T_426 = (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source) << 2U) | + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)); + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_dq_1_oe, ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_111) | + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txen_2))); + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_dq_0_oe, + ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto)) | + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_111) | + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txen_2)))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_71 = + ((((0x80U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) << 7U)) | + (0x40U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) << 5U))) | + ((0x20U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) << 3U)) | + (0x10U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) << 1U)))) | + (((8U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) >> 1U)) | + (4U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) >> 3U))) | + ((2U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) >> 5U)) | + (1U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) >> 7U))))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_148 = + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref) ^ (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cinv)); + vlTOPp->TLSPI__DOT__mac__DOT___T_107 = + (0xfU & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_88) ^ + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_set) << (IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_id)))); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_43 = ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_40) & + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_39)); + vlTOPp->TLSPI__DOT__fifo_io_ip_rxwm = (((((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_39) & + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_40)) + << 3U) | + (7U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value) - + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value_1)))) > + (IData)(vlTOPp->TLSPI__DOT__ctrl_wm_rx)); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_42 = ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_40) & + (~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_39))); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42 = ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_40) & + (~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_39))); + vlTOPp->TLSPI__DOT__fifo_io_ip_txwm = (((((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_39) & + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_40)) + << 3U) | + (7U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value) - + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value_1)))) < + (IData)(vlTOPp->TLSPI__DOT__ctrl_wm_tx)); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_43 = ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_40) & + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_39)); + vlTOPp->TLSPI__DOT__mac__DOT__cs_deassert = + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__clear) | + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_69) != (IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_88))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_16 = + (0xfffU & ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt) + : ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt) + : ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_47) - (IData)(1U))) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_22 = + ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) + ? ((~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_155)) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_15)) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_15)); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__accept = + ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_155) | + (0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt))) + : (0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97 = + ((0U == + (3U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address & + (~(0x1fU & ((IData)(3U) << (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size))))))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_167 = + (((2U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) & + (0U == (0x3ffff000U & (0x10024000U ^ vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_538 = + ((vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address == + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_517) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97 = + ((0U == + (3U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address & + (~(0x1fU & ((IData)(3U) << (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size))))))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_167 = + (((2U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) & + (0U == (0x3ffff000U & (0x10024000U ^ vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_538 = ((vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address == + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_517) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_52 = + (1U & + ((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (1U & ((((IData)(1U) << (1U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size))) >> 1U) & + (~(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U)))))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_55 = + (1U & + ((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (1U & ((((IData)(1U) << (1U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size))) >> 1U) & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U))))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_52 = + (1U & + ((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (1U & ((((IData)(1U) << (1U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size))) >> 1U) & + (~(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U)))))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_55 = + (1U & + ((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (1U & ((((IData)(1U) << (1U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size))) >> 1U) & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U))))); + vlTOPp->TLSPI__DOT___GEN_155 = + ((0x10U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((0x12U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((0x13U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((0x14U == + (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == + (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((0x15U == + (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == + (0x3e0U & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((0x1cU == + (0x1fU & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == + (0x3e0U & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + : ((0x1dU != + (0x1fU & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) | + (0U == + (0x3e0U & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U)))))))))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_96 = + ((((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto)) + ? ((0xfeU & (((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__shift) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) + : ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) >> 1U)) + << 1U)) | + (1U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sample_d) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__rxd) >> 1U) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer)))) + : 0U) | + ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto)) + ? ((0xfcU & (((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__shift) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) + : ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) >> 2U)) + << 2U)) | + (3U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sample_d) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__rxd) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer)))) + : 0U)) | + ((2U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto)) + ? ((0xf0U & (((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__shift) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) + : ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) >> 4U)) + << 4U)) | + (0xfU & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sample_d) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__rxd) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer)))) + : 0U)); + vlTOPp->TLSPI__DOT___T_1732 = ((IData)(vlTOPp->TLSPI__DOT___T_1495) & + (4U != (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_602 = + ((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_602 = + ((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_542) & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_551))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_541 = + ((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___GEN_15 = + (((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_615))) + ? (VL_ULL(1) << (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source)) + : VL_ULL(0)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_541 = + ((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_486) & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___GEN_15 = + (((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_486) & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_615))) + ? (VL_ULL(1) << (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source)) + : VL_ULL(0)); + VL_ASSIGN_SII(6, vlTOPp->auto_control_xing_in_d_bits_source, (0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U))); + VL_ASSIGN_SII(2, vlTOPp->auto_control_xing_in_d_bits_size, (3U & (IData)(vlTOPp->TLSPI__DOT___T_426))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_587 = + (((3U & (IData)(vlTOPp->TLSPI__DOT___T_426)) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_568)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_591 = + (((0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U)) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_570)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_587 = + (((3U & (IData)(vlTOPp->TLSPI__DOT___T_426)) == (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_568)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_591 = (((0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U)) == + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_570)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_13 = + ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck) + : ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_148) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck)) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck))); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_44 = ((~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_43)) & + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq_io_enq_valid)); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_47 = + ((((((IData)(vlTOPp->TLSPI__DOT___T_1495) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> + 0x13U)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))) & + (0U != (0xffU & vlTOPp->TLSPI__DOT___T_626))) & + (~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_42))); + vlTOPp->TLSPI__DOT___GEN_172 = + ((6U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_cs_mode) + : ((0xaU == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (((IData)(vlTOPp->TLSPI__DOT__ctrl_dla_sckcs) << 0x10U) | + (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_cssck)) + : ((0xbU == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (((IData)(vlTOPp->TLSPI__DOT__ctrl_dla_interxfr) << 0x10U) | + (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_intercs)) + : ((0x10U == + (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (((IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_len) << 0x10U) | + (((IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_iodir) << 3U) | + (((IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_endian) << 2U) | + (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_proto)))) + : ((0x12U == + (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_43) << 0x1fU) + : ((0x13U == + (0x1fU & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_42) << 0x1fU) | + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_35 + [vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value_1]) + : ((0x14U == + (0x1fU & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_wm_tx) + : ((0x15U == + (0x1fU & + (vlTOPp + ->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_wm_rx) + : ((0x1cU == + (0x1fU & + (vlTOPp + ->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + ? (((IData)(vlTOPp->TLSPI__DOT__ie_rxwm) << 1U) | + (IData)(vlTOPp->TLSPI__DOT__ie_txwm)) + : ((0x1dU == + (0x1fU & + (vlTOPp + ->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + ? (((IData)( + vlTOPp->TLSPI__DOT__fifo_io_ip_rxwm) + << 1U) | + (IData)( + vlTOPp->TLSPI__DOT__fifo_io_ip_txwm)) + : 0U)))))))))); + vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_cnt = + ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_deassert) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_sckcs) + : (IData)(vlTOPp->TLSPI__DOT__fifo__DOT___T_57)) + : ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42) + ? 0U + : (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_cssck))) + : ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_interxfr) + : ((2U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_intercs) + : (IData)(vlTOPp->TLSPI__DOT__fifo__DOT___T_57)))); + vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn = + (1U & + ((0U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) | + ((~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert)) | (IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_deassert)))); + vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_stb = + (1U & ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert) + ? (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_deassert)) + : (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42)) + : ((1U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) & + (2U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state))))); + vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid = + (1U & ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) + ? ((~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert)) | + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_deassert) | + (~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42)))) + : ((1U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) | + (0U != (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_interxfr))))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_102 = + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__accept) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_proto) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto)); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txd_in = + (0xfU & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__accept) + ? (((IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_endian) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_71) + : (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data)) >> + 4U) + : ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) >> 4U))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156 = ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__accept) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__done)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_73 = + (((8U & (((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_55) << 3U) | + (0xfffffff8U & ((vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address << 2U) & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address << 3U))))) | + (4U & (((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_55) << 2U) | + (0xfffffffcU & ((vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address << 1U) & + ((~vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address) << 2U)))))) | + ((2U & (((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_52) | + ((~(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U)) & + vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address)) + << 1U)) | + (1U & ((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_52) | + ((~(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U)) & + (~vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address)))))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_73 = + (((8U & (((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_55) << 3U) | + (0xfffffff8U & ((vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address << 2U) & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address << 3U))))) | + (4U & (((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_55) << 2U) | + (0xfffffffcU & ((vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address << 1U) & + ((~vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address) << 2U)))))) | + ((2U & (((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_52) | + ((~(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U)) & + vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address)) + << 1U)) | + (1U & ((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_52) | + ((~(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U)) & + (~vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address)))))); + vlTOPp->TLSPI__DOT___GEN_162 = + ((0U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((1U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((4U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((5U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == + (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((6U == + (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == + (0x3e0U & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((0xaU == + (0x1fU & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == + (0x3e0U & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + : ((0xbU == + (0x1fU & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + ? (0U == + (0x3e0U & + (vlTOPp + ->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + : (IData)(vlTOPp->TLSPI__DOT___GEN_155)))))))); + vlTOPp->TLSPI__DOT___T_1766 = + (((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> 5U)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))); + vlTOPp->TLSPI__DOT___T_1796 = + (((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> 0xaU)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))); + vlTOPp->TLSPI__DOT___T_1742 = + (((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> 1U)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))); + vlTOPp->TLSPI__DOT___T_1904 = + (((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> + 0x1cU)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))); + vlTOPp->TLSPI__DOT___T_1832 = + (((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> + 0x10U)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))); + vlTOPp->TLSPI__DOT___T_1802 = + (((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> 0xbU)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))); + vlTOPp->TLSPI__DOT___T_1844 = + (((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> + 0x12U)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_673 = + (1U & ((IData)(((vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___GEN_15 | + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_604) >> + (0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_677 = + ((vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_604 | + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___GEN_15) & + (~(((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_636))) + ? (VL_ULL(1) << (0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U))) + : VL_ULL(0)))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_673 = + (1U & ((IData)(((vlTOPp->TLSPI__DOT__TLMonitor__DOT___GEN_15 | vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_604) >> + (0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_677 = + ((vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_604 | vlTOPp->TLSPI__DOT__TLMonitor__DOT___GEN_15) & + (~(((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_542) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_636))) + ? (VL_ULL(1) << (0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U))) + : VL_ULL(0)))); + vlTOPp->TLSPI__DOT__mac_io_link_tx_ready = ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) & + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert) & + ((~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_deassert)) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156)))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_73)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_245 = + ((0U == ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_73)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_181 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask) == + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_73)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_245 = + ((0U == ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_73)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + VL_ASSIGN_SII( + 32, vlTOPp->auto_control_xing_in_d_bits_data, + ((IData)(vlTOPp->TLSPI__DOT___GEN_162) + ? ((0U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_sck_div) + : ((1U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (((IData)(vlTOPp->TLSPI__DOT__ctrl_sck_pol) << 1U) | + (IData)(vlTOPp->TLSPI__DOT__ctrl_sck_pha)) + : ((4U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_cs_id) + : ((5U == + (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (((IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_3) << 3U) | + (((IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_2) << 2U) | + (((IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_1) << 1U) | + (IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_0)))) + : vlTOPp->TLSPI__DOT___GEN_172)))) + : 0U)); + vlTOPp->TLSPI__DOT__fifo_io_tx_valid = + (((IData)(vlTOPp->TLSPI__DOT___T_1844) & (0U == (0xffU & (~vlTOPp->TLSPI__DOT___T_626)))) & + (~(((IData)(vlTOPp->TLSPI__DOT___T_1844) & (vlTOPp->TLSPI__DOT___T_626 >> 0x1fU)) & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data >> 0x1fU)))); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_47 = ((IData)(vlTOPp->TLSPI__DOT__mac_io_link_tx_ready) & + (~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42))); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_44 = + ((~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_43)) & (IData)(vlTOPp->TLSPI__DOT__fifo_io_tx_valid)); + vlTOPp->TLSPI__DOT__mac__DOT___T_94 = + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__clear) | + ((((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__cs_mode) != (IData)(vlTOPp->TLSPI__DOT__ctrl_cs_mode)) | + ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_47) & + (~((2U == (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__cs_mode)) | + (3U == (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__cs_mode)))))) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert))); +} + +VL_INLINE_OPT void VTLSPI::_sequent__TOP__4(VTLSPI__Syms *__restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::_sequent__TOP__4\n");); + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Variables + VL_SIG8(__Vdlyvdim0__TLSPI__DOT__fifo__DOT__txq__DOT___T_35__v0, 2, 0); + VL_SIG8(__Vdlyvval__TLSPI__DOT__fifo__DOT__txq__DOT___T_35__v0, 7, 0); + VL_SIG8(__Vdlyvset__TLSPI__DOT__fifo__DOT__txq__DOT___T_35__v0, 0, 0); + VL_SIG8(__Vdlyvdim0__TLSPI__DOT__fifo__DOT__rxq__DOT___T_35__v0, 2, 0); + VL_SIG8(__Vdlyvval__TLSPI__DOT__fifo__DOT__rxq__DOT___T_35__v0, 7, 0); + VL_SIG8(__Vdlyvset__TLSPI__DOT__fifo__DOT__rxq__DOT___T_35__v0, 0, 0); + VL_SIG8(__Vdly__TLSPI__DOT__mac__DOT__cs_assert, 0, 0); + // Body + __Vdlyvset__TLSPI__DOT__fifo__DOT__txq__DOT___T_35__v0 = 0U; + __Vdlyvset__TLSPI__DOT__fifo__DOT__rxq__DOT___T_35__v0 = 0U; + // ALWAYS at verilog/TLMonitor_60.v:510 + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries AcquireBlock type unsupported by manager " + "(connected at CrossingHelper.scala:17:44)\n at Monitor.scala:41 assert " + "(edge.manager.supportsAcquireBSafe(edge.address(bundle), bundle.size), \"'A' channel " + "carries AcquireBlock type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:630: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 630, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries AcquireBlock from a client which does not " + "support Probe (connected at CrossingHelper.scala:17:44)\n at Monitor.scala:42 " + "assert (edge.client.supportsProbe(edge.source(bundle), bundle.size), \"'A' channel " + "carries AcquireBlock from a client which does not support Probe\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:652: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 652, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquireBlock smaller than a beat (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:44 assert (bundle.size >= " + "UInt(log2Ceil(edge.manager.beatBytes)), \"'A' channel AcquireBlock smaller than a " + "beat\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:696: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 696, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquireBlock address not aligned to size (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:45 assert (is_aligned, \"'A' " + "channel AcquireBlock address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:718: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 718, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquireBlock carries invalid grow param (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:46 assert " + "(TLPermissions.isGrow(bundle.param), \"'A' channel AcquireBlock carries invalid grow " + "param\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:740: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 740, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (0xfU & (~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquireBlock contains invalid mask (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:47 assert (~bundle.mask === " + "UInt(0), \"'A' channel AcquireBlock contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (0xfU & (~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:762: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 762, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquireBlock is corrupt (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:48 assert (!bundle.corrupt, \"'A' " + "channel AcquireBlock is corrupt\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:784: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 784, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries AcquirePerm type unsupported by manager " + "(connected at CrossingHelper.scala:17:44)\n at Monitor.scala:52 assert " + "(edge.manager.supportsAcquireBSafe(edge.address(bundle), bundle.size), \"'A' channel " + "carries AcquirePerm type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:806: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 806, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries AcquirePerm from a client which does not " + "support Probe (connected at CrossingHelper.scala:17:44)\n at Monitor.scala:53 " + "assert (edge.client.supportsProbe(edge.source(bundle), bundle.size), \"'A' channel " + "carries AcquirePerm from a client which does not support Probe\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:828: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 828, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquirePerm smaller than a beat (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:55 assert (bundle.size >= " + "UInt(log2Ceil(edge.manager.beatBytes)), \"'A' channel AcquirePerm smaller than a " + "beat\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:872: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 872, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquirePerm address not aligned to size (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:56 assert (is_aligned, \"'A' " + "channel AcquirePerm address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:894: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 894, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquirePerm carries invalid grow param (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:57 assert " + "(TLPermissions.isGrow(bundle.param), \"'A' channel AcquirePerm carries invalid grow " + "param\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:916: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 916, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U != (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquirePerm requests NtoB (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:58 assert (bundle.param =/= " + "TLPermissions.NtoB, \"'A' channel AcquirePerm requests NtoB\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U != (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:938: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 938, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (0xfU & (~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquirePerm contains invalid mask (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:59 assert (~bundle.mask === " + "UInt(0), \"'A' channel AcquirePerm contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (0xfU & (~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:960: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 960, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquirePerm is corrupt (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:60 assert (!bundle.corrupt, \"'A' " + "channel AcquirePerm is corrupt\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:982: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 982, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_167))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries Get type unsupported by manager (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:64 assert " + "(edge.manager.supportsGetSafe(edge.address(bundle), bundle.size), \"'A' channel " + "carries Get type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_167))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1004: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1004, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Get address not aligned to size (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:66 assert (is_aligned, \"'A' " + "channel Get address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1048: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1048, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Get carries invalid param (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:67 assert (bundle.param === " + "UInt(0), \"'A' channel Get carries invalid param\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1070: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1070, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Get contains invalid mask (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:68 assert (bundle.mask === mask, " + "\"'A' channel Get contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1092: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1092, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Get is corrupt (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:69 assert (!bundle.corrupt, \"'A' " + "channel Get is corrupt\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1114: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1114, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_167))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries PutFull type unsupported by manager (connected " + "at CrossingHelper.scala:17:44)\n at Monitor.scala:73 assert " + "(edge.manager.supportsPutFullSafe(edge.address(bundle), bundle.size), \"'A' channel " + "carries PutFull type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_167))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1136: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1136, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel PutFull address not aligned to size (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:75 assert (is_aligned, \"'A' " + "channel PutFull address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1180: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1180, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel PutFull carries invalid param (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:76 assert (bundle.param === " + "UInt(0), \"'A' channel PutFull carries invalid param\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1202: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1202, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel PutFull contains invalid mask (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:77 assert (bundle.mask === mask, " + "\"'A' channel PutFull contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1224: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1224, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_167))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries PutPartial type unsupported by manager " + "(connected at CrossingHelper.scala:17:44)\n at Monitor.scala:81 assert " + "(edge.manager.supportsPutPartialSafe(edge.address(bundle), bundle.size), \"'A' " + "channel carries PutPartial type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_167))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1246: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1246, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel PutPartial address not aligned to size (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:83 assert (is_aligned, \"'A' " + "channel PutPartial address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1290: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1290, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel PutPartial carries invalid param (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:84 assert (bundle.param === " + "UInt(0), \"'A' channel PutPartial carries invalid param\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1312: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1312, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_245))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel PutPartial contains invalid mask (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:85 assert ((bundle.mask & ~mask) " + "=== UInt(0), \"'A' channel PutPartial contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_245))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1334: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1334, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries Arithmetic type unsupported by manager " + "(connected at CrossingHelper.scala:17:44)\n at Monitor.scala:89 assert " + "(edge.manager.supportsArithmeticSafe(edge.address(bundle), bundle.size), \"'A' " + "channel carries Arithmetic type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1356: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1356, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Arithmetic address not aligned to size (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:91 assert (is_aligned, \"'A' " + "channel Arithmetic address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1400: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1400, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((4U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Arithmetic carries invalid opcode param (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:92 assert " + "(TLAtomics.isArithmetic(bundle.param), \"'A' channel Arithmetic carries invalid " + "opcode param\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((4U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1422: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1422, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Arithmetic contains invalid mask (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:93 assert (bundle.mask === mask, " + "\"'A' channel Arithmetic contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1444: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1444, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries Logical type unsupported by manager (connected " + "at CrossingHelper.scala:17:44)\n at Monitor.scala:97 assert " + "(edge.manager.supportsLogicalSafe(edge.address(bundle), bundle.size), \"'A' channel " + "carries Logical type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1466: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1466, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Logical address not aligned to size (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:99 assert (is_aligned, \"'A' " + "channel Logical address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1510: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1510, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((3U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Logical carries invalid opcode param (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:100 assert " + "(TLAtomics.isLogical(bundle.param), \"'A' channel Logical carries invalid opcode " + "param\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((3U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1532: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1532, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Logical contains invalid mask (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:101 assert (bundle.mask === mask, " + "\"'A' channel Logical contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1554: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1554, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries Hint type unsupported by manager (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:105 assert " + "(edge.manager.supportsHintSafe(edge.address(bundle), bundle.size), \"'A' channel " + "carries Hint type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1576: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1576, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Hint address not aligned to size (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:107 assert (is_aligned, \"'A' " + "channel Hint address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1620: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1620, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Hint contains invalid mask (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:108 assert (bundle.mask === mask, " + "\"'A' channel Hint contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1642: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1642, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Hint is corrupt (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:109 assert (!bundle.corrupt, \"'A' " + "channel Hint is corrupt\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:1664: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 1664, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_522))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel opcode changed within multibeat operation (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:343 assert (a.bits.opcode === " + "opcode, \"'A' channel opcode changed within multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_522))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:2456: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 2456, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_526))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel param changed within multibeat operation (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:344 assert (a.bits.param === " + "param, \"'A' channel param changed within multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_526))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:2478: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 2478, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_530))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel size changed within multibeat operation (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:345 assert (a.bits.size === size, " + " \"'A' channel size changed within multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_530))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:2500: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 2500, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_534))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel source changed within multibeat operation (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:346 assert (a.bits.source === " + "source, \"'A' channel source changed within multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_534))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:2522: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 2522, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_538))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel address changed with multibeat operation (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:347 assert (a.bits.address=== " + "address,\"'A' channel address changed with multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_538))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:2544: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 2544, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_579))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'D' channel opcode changed within multibeat operation (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:413 assert (d.bits.opcode === " + "opcode, \"'D' channel opcode changed within multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_579))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:2566: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 2566, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_587))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'D' channel size changed within multibeat operation (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:415 assert (d.bits.size === size, " + " \"'D' channel size changed within multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_587))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:2610: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 2610, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_591))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'D' channel source changed within multibeat operation (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:416 assert (d.bits.source === " + "source, \"'D' channel source changed within multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551)) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_591))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:2632: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 2632, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_615))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_658))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel re-used a source ID (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:448 " + "assert(!inflight(bundle.a.bits.source), \"'A' channel re-used a source ID\" + " + "extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_615))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_658))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:2698: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 2698, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_636))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_673))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'D' channel acknowledged for nothing inflight (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:455 assert((a_set | " + "inflight)(bundle.d.bits.source), \"'D' channel acknowledged for nothing inflight\" + " + "extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_636))) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_673))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:2720: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 2720, ""); + } + if (VL_UNLIKELY((1U & (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_687))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: TileLink timeout expired (connected at " + "CrossingHelper.scala:17:44)\n at Monitor.scala:467 assert (!inflight.orR || limit " + "=== UInt(0) || watchdog < limit, \"TileLink timeout expired\" + extra)\n"); + } + if (VL_UNLIKELY((1U & (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_687))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_60.v:2742: Assertion failed in %NTLSPI.buffer.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_60.v", 2742, ""); + } + // ALWAYS at verilog/TLMonitor_61.v:510 + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries AcquireBlock type unsupported by manager " + "(connected at CrossingHelper.scala:17:14)\n at Monitor.scala:41 assert " + "(edge.manager.supportsAcquireBSafe(edge.address(bundle), bundle.size), \"'A' channel " + "carries AcquireBlock type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:630: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 630, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries AcquireBlock from a client which does not " + "support Probe (connected at CrossingHelper.scala:17:14)\n at Monitor.scala:42 " + "assert (edge.client.supportsProbe(edge.source(bundle), bundle.size), \"'A' channel " + "carries AcquireBlock from a client which does not support Probe\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:652: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 652, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquireBlock smaller than a beat (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:44 assert (bundle.size >= " + "UInt(log2Ceil(edge.manager.beatBytes)), \"'A' channel AcquireBlock smaller than a " + "beat\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:696: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 696, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquireBlock address not aligned to size (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:45 assert (is_aligned, \"'A' " + "channel AcquireBlock address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:718: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 718, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquireBlock carries invalid grow param (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:46 assert " + "(TLPermissions.isGrow(bundle.param), \"'A' channel AcquireBlock carries invalid grow " + "param\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:740: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 740, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (0xfU & (~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquireBlock contains invalid mask (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:47 assert (~bundle.mask === " + "UInt(0), \"'A' channel AcquireBlock contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (0xfU & (~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:762: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 762, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquireBlock is corrupt (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:48 assert (!bundle.corrupt, \"'A' " + "channel AcquireBlock is corrupt\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (6U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:784: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 784, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries AcquirePerm type unsupported by manager " + "(connected at CrossingHelper.scala:17:14)\n at Monitor.scala:52 assert " + "(edge.manager.supportsAcquireBSafe(edge.address(bundle), bundle.size), \"'A' channel " + "carries AcquirePerm type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:806: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 806, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries AcquirePerm from a client which does not " + "support Probe (connected at CrossingHelper.scala:17:14)\n at Monitor.scala:53 " + "assert (edge.client.supportsProbe(edge.source(bundle), bundle.size), \"'A' channel " + "carries AcquirePerm from a client which does not support Probe\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:828: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 828, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquirePerm smaller than a beat (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:55 assert (bundle.size >= " + "UInt(log2Ceil(edge.manager.beatBytes)), \"'A' channel AcquirePerm smaller than a " + "beat\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:872: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 872, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquirePerm address not aligned to size (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:56 assert (is_aligned, \"'A' " + "channel AcquirePerm address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:894: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 894, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquirePerm carries invalid grow param (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:57 assert " + "(TLPermissions.isGrow(bundle.param), \"'A' channel AcquirePerm carries invalid grow " + "param\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((2U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:916: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 916, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U != (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquirePerm requests NtoB (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:58 assert (bundle.param =/= " + "TLPermissions.NtoB, \"'A' channel AcquirePerm requests NtoB\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U != (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:938: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 938, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (0xfU & (~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquirePerm contains invalid mask (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:59 assert (~bundle.mask === " + "UInt(0), \"'A' channel AcquirePerm contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (0xfU & (~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:960: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 960, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel AcquirePerm is corrupt (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:60 assert (!bundle.corrupt, \"'A' " + "channel AcquirePerm is corrupt\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (7U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:982: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 982, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_167))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries Get type unsupported by manager (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:64 assert " + "(edge.manager.supportsGetSafe(edge.address(bundle), bundle.size), \"'A' channel " + "carries Get type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_167))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1004: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1004, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Get address not aligned to size (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:66 assert (is_aligned, \"'A' " + "channel Get address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1048: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1048, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Get carries invalid param (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:67 assert (bundle.param === " + "UInt(0), \"'A' channel Get carries invalid param\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1070: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1070, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_181))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Get contains invalid mask (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:68 assert (bundle.mask === mask, " + "\"'A' channel Get contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_181))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1092: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1092, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Get is corrupt (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:69 assert (!bundle.corrupt, \"'A' " + "channel Get is corrupt\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1114: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1114, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_167))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries PutFull type unsupported by manager (connected " + "at CrossingHelper.scala:17:14)\n at Monitor.scala:73 assert " + "(edge.manager.supportsPutFullSafe(edge.address(bundle), bundle.size), \"'A' channel " + "carries PutFull type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_167))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1136: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1136, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel PutFull address not aligned to size (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:75 assert (is_aligned, \"'A' " + "channel PutFull address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1180: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1180, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel PutFull carries invalid param (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:76 assert (bundle.param === " + "UInt(0), \"'A' channel PutFull carries invalid param\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1202: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1202, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_181))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel PutFull contains invalid mask (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:77 assert (bundle.mask === mask, " + "\"'A' channel PutFull contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_181))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1224: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1224, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_167))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries PutPartial type unsupported by manager " + "(connected at CrossingHelper.scala:17:14)\n at Monitor.scala:81 assert " + "(edge.manager.supportsPutPartialSafe(edge.address(bundle), bundle.size), \"'A' " + "channel carries PutPartial type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_167))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1246: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1246, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel PutPartial address not aligned to size (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:83 assert (is_aligned, \"'A' " + "channel PutPartial address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1290: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1290, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel PutPartial carries invalid param (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:84 assert (bundle.param === " + "UInt(0), \"'A' channel PutPartial carries invalid param\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((0U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1312: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1312, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_245))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel PutPartial contains invalid mask (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:85 assert ((bundle.mask & ~mask) " + "=== UInt(0), \"'A' channel PutPartial contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (1U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_245))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1334: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1334, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries Arithmetic type unsupported by manager " + "(connected at CrossingHelper.scala:17:14)\n at Monitor.scala:89 assert " + "(edge.manager.supportsArithmeticSafe(edge.address(bundle), bundle.size), \"'A' " + "channel carries Arithmetic type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1356: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1356, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Arithmetic address not aligned to size (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:91 assert (is_aligned, \"'A' " + "channel Arithmetic address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1400: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1400, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((4U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Arithmetic carries invalid opcode param (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:92 assert " + "(TLAtomics.isArithmetic(bundle.param), \"'A' channel Arithmetic carries invalid " + "opcode param\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((4U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1422: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1422, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_181))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Arithmetic contains invalid mask (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:93 assert (bundle.mask === mask, " + "\"'A' channel Arithmetic contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (2U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_181))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1444: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1444, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries Logical type unsupported by manager (connected " + "at CrossingHelper.scala:17:14)\n at Monitor.scala:97 assert " + "(edge.manager.supportsLogicalSafe(edge.address(bundle), bundle.size), \"'A' channel " + "carries Logical type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1466: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1466, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Logical address not aligned to size (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:99 assert (is_aligned, \"'A' " + "channel Logical address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1510: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1510, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((3U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Logical carries invalid opcode param (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:100 assert " + "(TLAtomics.isLogical(bundle.param), \"'A' channel Logical carries invalid opcode " + "param\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((3U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1532: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1532, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_181))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Logical contains invalid mask (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:101 assert (bundle.mask === mask, " + "\"'A' channel Logical contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (3U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_181))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1554: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1554, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel carries Hint type unsupported by manager (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:105 assert " + "(edge.manager.supportsHintSafe(edge.address(bundle), bundle.size), \"'A' channel " + "carries Hint type unsupported by manager\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->__Vcellinp__TLSPI__reset))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1576: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1576, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Hint address not aligned to size (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:107 assert (is_aligned, \"'A' " + "channel Hint address not aligned to size\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1620: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1620, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_181))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Hint contains invalid mask (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:108 assert (bundle.mask === mask, " + "\"'A' channel Hint contains invalid mask\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_181))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1642: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1642, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel Hint is corrupt (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:109 assert (!bundle.corrupt, \"'A' " + "channel Hint is corrupt\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (5U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (~((~(IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:1664: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 1664, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_522))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel opcode changed within multibeat operation (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:343 assert (a.bits.opcode === " + "opcode, \"'A' channel opcode changed within multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_522))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:2456: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 2456, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_526))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel param changed within multibeat operation (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:344 assert (a.bits.param === " + "param, \"'A' channel param changed within multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_526))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:2478: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 2478, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_530))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel size changed within multibeat operation (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:345 assert (a.bits.size === size, " + " \"'A' channel size changed within multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_530))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:2500: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 2500, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_534))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel source changed within multibeat operation (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:346 assert (a.bits.source === " + "source, \"'A' channel source changed within multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_534))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:2522: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 2522, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_538))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel address changed with multibeat operation (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:347 assert (a.bits.address=== " + "address,\"'A' channel address changed with multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_538))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:2544: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 2544, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_551)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_579))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'D' channel opcode changed within multibeat operation (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:413 assert (d.bits.opcode === " + "opcode, \"'D' channel opcode changed within multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_551)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_579))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:2566: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 2566, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_551)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_587))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'D' channel size changed within multibeat operation (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:415 assert (d.bits.size === size, " + " \"'D' channel size changed within multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_551)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_587))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:2610: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 2610, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_551)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_591))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'D' channel source changed within multibeat operation (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:416 assert (d.bits.source === " + "source, \"'D' channel source changed within multibeat operation\" + extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_551)) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_591))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:2632: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 2632, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_486) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_615))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_658))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'A' channel re-used a source ID (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:448 " + "assert(!inflight(bundle.a.bits.source), \"'A' channel re-used a source ID\" + " + "extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_486) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_615))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_658))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:2698: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 2698, ""); + } + if (VL_UNLIKELY((((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_542) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_636))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_673))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: 'D' channel acknowledged for nothing inflight (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:455 assert((a_set | " + "inflight)(bundle.d.bits.source), \"'D' channel acknowledged for nothing inflight\" + " + "extra)\n"); + } + if (VL_UNLIKELY((((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_542) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_636))) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_673))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:2720: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 2720, ""); + } + if (VL_UNLIKELY((1U & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_687))))) { + VL_FWRITEF(0x80000002U, "Assertion failed: TileLink timeout expired (connected at " + "CrossingHelper.scala:17:14)\n at Monitor.scala:467 assert (!inflight.orR || limit " + "=== UInt(0) || watchdog < limit, \"TileLink timeout expired\" + extra)\n"); + } + if (VL_UNLIKELY((1U & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_687))))) { + VL_WRITEF("[%0t] %%Error: TLMonitor_61.v:2742: Assertion failed in %NTLSPI.TLMonitor\n", 64, VL_TIME_Q(), + vlSymsp->name()); + VL_STOP_MT("verilog/TLMonitor_61.v", 2742, ""); + } + __Vdly__TLSPI__DOT__mac__DOT__cs_assert = vlTOPp->TLSPI__DOT__mac__DOT__cs_assert; + // ALWAYS at verilog/TLMonitor_60.v:510 + if (vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_541) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_511 = + vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param; + } + // ALWAYS at verilog/TLMonitor_61.v:510 + if (vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_541) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_511 = vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param; + } + // ALWAYS at verilog/TLMonitor_60.v:510 + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_604 = + ((IData)(vlTOPp->__Vcellinp__TLSPI__reset) ? VL_ULL(0) + : vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_677); + // ALWAYS at verilog/TLMonitor_61.v:510 + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_604 = + ((IData)(vlTOPp->__Vcellinp__TLSPI__reset) ? VL_ULL(0) : vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_677); + // ALWAYS at verilog/TLMonitor_60.v:510 + if (vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_602) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_568 = (3U & (IData)(vlTOPp->TLSPI__DOT___T_426)); + } + // ALWAYS at verilog/TLMonitor_60.v:510 + if (vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_602) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_570 = (0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U)); + } + // ALWAYS at verilog/TLMonitor_61.v:510 + if (vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_602) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_568 = (3U & (IData)(vlTOPp->TLSPI__DOT___T_426)); + } + // ALWAYS at verilog/TLMonitor_61.v:510 + if (vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_602) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_570 = (0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U)); + } + // ALWAYS at verilog/TLMonitor_60.v:510 + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_679 = + ((IData)(vlTOPp->__Vcellinp__TLSPI__reset) + ? 0U + : (((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486) | + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542)) + ? 0U + : vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_690)); + // ALWAYS at verilog/TLMonitor_61.v:510 + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_679 = + ((IData)(vlTOPp->__Vcellinp__TLSPI__reset) ? 0U : (((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_486) | + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_542)) + ? 0U + : vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_690)); + // ALWAYS at verilog/SPIPhysical_1.v:429 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txd = 0U; + } else { + if ((1U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid) + ? ((~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn)) | + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_22)) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_22)) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_22)))) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txd = + ((3U & (((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_102)) & + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txd_in) >> 3U)) | + ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_102)) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txd_in) >> 2U) + : 0U))) | + ((2U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_102)) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txd_in) + : 0U)); + } + } + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_dla_cssck = 1U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1796) & (0U == (0xffU & (~vlTOPp->TLSPI__DOT___T_626))))) { + vlTOPp->TLSPI__DOT__ctrl_dla_cssck = (0xffU & vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data); + } + } + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_dla_sckcs = 1U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1796) & (0U == (0xffU & (~(vlTOPp->TLSPI__DOT___T_626 >> 0x10U)))))) { + vlTOPp->TLSPI__DOT__ctrl_dla_sckcs = + (0xffU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data >> 0x10U)); + } + } + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_dla_intercs = 1U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1802) & (0U == (0xffU & (~vlTOPp->TLSPI__DOT___T_626))))) { + vlTOPp->TLSPI__DOT__ctrl_dla_intercs = + (0xffU & vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data); + } + } + // ALWAYS at verilog/TLMonitor_60.v:510 + if (vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_602) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_564 = + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode)); + } + // ALWAYS at verilog/TLMonitor_61.v:510 + if (vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_602) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_564 = + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode)); + } + // ALWAYS at verilog/TLMonitor_60.v:510 + if (vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_541) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_509 = + vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode; + } + // ALWAYS at verilog/TLMonitor_61.v:510 + if (vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_541) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_509 = vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode; + } + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_fmt_len = 8U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1832) & (0U == (0xfU & (~(vlTOPp->TLSPI__DOT___T_626 >> 0x10U)))))) { + vlTOPp->TLSPI__DOT__ctrl_fmt_len = + (0xfU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data >> 0x10U)); + } + } + // ALWAYS at verilog/TLMonitor_60.v:510 + if (vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_541) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_515 = + vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source; + } + // ALWAYS at verilog/TLMonitor_61.v:510 + if (vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_541) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_515 = vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source; + } + // ALWAYS at verilog/SPIPhysical_1.v:429 + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_stb) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pha = vlTOPp->TLSPI__DOT__ctrl_sck_pha; + } + } + } + } + } + // ALWAYS at verilog/SPIPhysical_1.v:429 + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_stb) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_iodir = vlTOPp->TLSPI__DOT__ctrl_fmt_iodir; + } + } + } + // ALWAYS at verilog/Queue_11.v:110 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_39 = 0U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_44) != + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_47))) { + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_39 = vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_44; + } + } + // ALWAYS at verilog/SPIPhysical_1.v:429 + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_stb) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto = vlTOPp->TLSPI__DOT__ctrl_fmt_proto; + } + } + } + // ALWAYS at verilog/TLMonitor_60.v:510 + if (vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_541) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_513 = + vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size; + } + // ALWAYS at verilog/TLMonitor_61.v:510 + if (vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_541) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_513 = vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size; + } + // ALWAYS at verilog/Queue_11.v:110 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_39 = 0U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_44) != + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_47))) { + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_39 = vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_44; + } + } + // ALWAYS at verilog/SPIFIFO.v:195 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__fifo__DOT__rxen = 0U; + } else { + if (vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_47) { + vlTOPp->TLSPI__DOT__fifo__DOT__rxen = (1U & (~(IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_iodir))); + } else { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__done) { + vlTOPp->TLSPI__DOT__fifo__DOT__rxen = 0U; + } + } + } + // ALWAYS at verilog/TLMonitor_60.v:510 + if (vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_541) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_517 = + vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address; + } + // ALWAYS at verilog/TLMonitor_61.v:510 + if (vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_541) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_517 = vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address; + } + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_wm_tx = 0U; + } else { + if (((((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> + 0x14U)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))) & + (0U == (0xfU & (~vlTOPp->TLSPI__DOT___T_626))))) { + vlTOPp->TLSPI__DOT__ctrl_wm_tx = (0xfU & vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data); + } + } + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_wm_rx = 0U; + } else { + if (((((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> + 0x15U)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))) & + (0U == (0xfU & (~vlTOPp->TLSPI__DOT___T_626))))) { + vlTOPp->TLSPI__DOT__ctrl_wm_rx = (0xfU & vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data); + } + } + // ALWAYS at verilog/Queue_11.v:110 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value_1 = 0U; + } else { + if (vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_47) { + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value_1 = vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_54; + } + } + // ALWAYS at verilog/Queue_11.v:110 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value_1 = 0U; + } else { + if (vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_47) { + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value_1 = vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_54; + } + } + // ALWAYS at verilog/Queue_11.v:110 + if (((~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_43)) & (IData)(vlTOPp->TLSPI__DOT__fifo_io_tx_valid))) { + __Vdlyvval__TLSPI__DOT__fifo__DOT__txq__DOT___T_35__v0 = + (0xffU & vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data); + __Vdlyvset__TLSPI__DOT__fifo__DOT__txq__DOT___T_35__v0 = 1U; + __Vdlyvdim0__TLSPI__DOT__fifo__DOT__txq__DOT___T_35__v0 = vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value; + } + // ALWAYS at verilog/Queue_11.v:110 + if (((~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_43)) & + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq_io_enq_valid))) { + __Vdlyvval__TLSPI__DOT__fifo__DOT__rxq__DOT___T_35__v0 = + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_endian) + ? ((((0x80U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) << 7U)) | + (0x40U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) << 5U))) | + ((0x20U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) << 3U)) | + (0x10U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) << 1U)))) | + (((8U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) >> 1U)) | + (4U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) >> 3U))) | + ((2U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) >> 5U)) | + (1U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) >> 7U))))) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer)); + __Vdlyvset__TLSPI__DOT__fifo__DOT__rxq__DOT___T_35__v0 = 1U; + __Vdlyvdim0__TLSPI__DOT__fifo__DOT__rxq__DOT___T_35__v0 = vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value; + } + // ALWAYS at verilog/SPIPhysical_1.v:486 + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_stb) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck = vlTOPp->TLSPI__DOT__ctrl_sck_pol; + } else { + if ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt))) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_155) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck = + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pol; + } else { + if ((0U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt))) { + if ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt))) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck = + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_148; + } + } + } + } + } else { + if ((0U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt))) { + if ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt))) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck = + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_148; + } + } + } + } + } + } else { + if ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt))) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_155) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck = + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pol; + } else { + if ((0U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt))) { + if ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt))) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck = + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_148; + } + } + } + } + } else { + if ((0U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt))) { + if ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt))) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck = + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_148; + } + } + } + } + } + } else { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck = vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cinv; + } + } else { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck = + ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_155) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pol) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_13)) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_13)); + } + } else { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck = + ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_155) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pol) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_13)) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_13)); + } + // ALWAYS at verilog/SPIPhysical_1.v:429 + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__last_d = + ((~(IData)(vlTOPp->__Vcellinp__TLSPI__reset)) & (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_45)); + // ALWAYS at verilog/SPIPhysical_1.v:429 + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sample_d = + ((~(IData)(vlTOPp->__Vcellinp__TLSPI__reset)) & (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_43)); + // ALWAYS at verilog/SPIPhysical_1.v:486 + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__setup_d = + (1U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid) + ? ((~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn)) | + ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) + ? ((~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_155)) & + ((0U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) & + ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) & + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr) & + (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref)))))) + : ((0U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) & + ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) & + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr) & + (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref))))))) + : ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) + ? ((~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_155)) & + ((0U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) & + ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) & + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr) & + (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref)))))) + : ((0U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) & + ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) & + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr) & + (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref))))))) + : ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) + ? ((~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_155)) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_15)) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_15)))); + // ALWAYS at verilog/SPIMedia_1.v:303 + vlTOPp->TLSPI__DOT__mac__DOT__clear = ((~(IData)(vlTOPp->__Vcellinp__TLSPI__reset)) & + ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_94) + : ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_94) + : ((2U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_94))))); + // ALWAYSPOST at verilog/Queue_11.v:111 + if (__Vdlyvset__TLSPI__DOT__fifo__DOT__txq__DOT___T_35__v0) { + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35[__Vdlyvdim0__TLSPI__DOT__fifo__DOT__txq__DOT___T_35__v0] = + __Vdlyvval__TLSPI__DOT__fifo__DOT__txq__DOT___T_35__v0; + } + // ALWAYSPOST at verilog/Queue_11.v:111 + if (__Vdlyvset__TLSPI__DOT__fifo__DOT__rxq__DOT___T_35__v0) { + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_35[__Vdlyvdim0__TLSPI__DOT__fifo__DOT__rxq__DOT___T_35__v0] = + __Vdlyvval__TLSPI__DOT__fifo__DOT__rxq__DOT___T_35__v0; + } + // ALWAYS at verilog/TLMonitor_60.v:510 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551 = 0U; + } else { + if (vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551 = + ((~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_555)) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_554)); + } + } + // ALWAYS at verilog/TLMonitor_60.v:510 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_636 = 0U; + } else { + if (vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_636 = + ((~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_640)) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_639)); + } + } + // ALWAYS at verilog/TLMonitor_60.v:510 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496 = 0U; + } else { + if (vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496 = + ((~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_500)) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_499)); + } + } + // ALWAYS at verilog/TLMonitor_60.v:510 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_615 = 0U; + } else { + if (vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486) { + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_615 = + ((~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_619)) & + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_618)); + } + } + // ALWAYS at verilog/TLMonitor_61.v:510 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_551 = 0U; + } else { + if (vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_542) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_551 = ((~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_555)) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_554)); + } + } + // ALWAYS at verilog/TLMonitor_61.v:510 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_636 = 0U; + } else { + if (vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_542) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_636 = ((~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_640)) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_639)); + } + } + // ALWAYS at verilog/TLMonitor_61.v:510 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496 = 0U; + } else { + if (vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_486) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496 = ((~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_500)) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_499)); + } + } + // ALWAYS at verilog/TLMonitor_61.v:510 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_615 = 0U; + } else { + if (vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_486) { + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_615 = ((~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_619)) & + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_618)); + } + } + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_690 = + ((IData)(1U) + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_679); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_690 = ((IData)(1U) + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_679); + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_dq_1_o, (1U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txd) >> 1U))); + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_dq_0_o, (1U & (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txd))); + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_sck_pha = 0U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1742) & vlTOPp->TLSPI__DOT___T_626)) { + vlTOPp->TLSPI__DOT__ctrl_sck_pha = (1U & vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data); + } + } + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_111 = + ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto)) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_iodir)); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txen_2 = + ((2U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto)) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_iodir)); + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_fmt_proto = 0U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1832) & (0U == (3U & (~vlTOPp->TLSPI__DOT___T_626))))) { + vlTOPp->TLSPI__DOT__ctrl_fmt_proto = (3U & vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data); + } + } + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_fmt_iodir = 0U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1832) & (vlTOPp->TLSPI__DOT___T_626 >> 3U))) { + vlTOPp->TLSPI__DOT__ctrl_fmt_iodir = + (1U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data >> 3U)); + } + } + // ALWAYS at verilog/SPIPhysical_1.v:429 + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__done = + ((IData)(vlTOPp->__Vcellinp__TLSPI__reset) | + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_128) + : (0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_cnt))) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_128)) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_128))); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_54 = + (7U & ((IData)(1U) + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value_1))); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_54 = + (7U & ((IData)(1U) + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value_1))); + // ALWAYS at verilog/Queue_11.v:110 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value = 0U; + } else { + if (vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_44) { + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value = vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_52; + } + } + // ALWAYS at verilog/SPIPhysical_1.v:429 + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_stb) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_endian = vlTOPp->TLSPI__DOT__ctrl_fmt_endian; + } + } + } + // ALWAYS at verilog/SPIPhysical_1.v:429 + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer = + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_96) + : ((IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_endian) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_71) + : (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data))) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_96)) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_96)); + // ALWAYS at verilog/Queue_11.v:110 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value = 0U; + } else { + if (vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_44) { + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value = vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_52; + } + } + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_sck, vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck); + // ALWAYS at verilog/SPIPhysical_1.v:429 + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_stb) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pol = vlTOPp->TLSPI__DOT__ctrl_sck_pol; + } + } + } + } + } + // ALWAYS at verilog/SPIPhysical_1.v:429 + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_45 = + ((~(IData)(vlTOPp->__Vcellinp__TLSPI__reset)) & (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_44)); + // ALWAYS at verilog/SPIPhysical_1.v:429 + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_43 = + ((~(IData)(vlTOPp->__Vcellinp__TLSPI__reset)) & (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_42)); + // ALWAYS at verilog/SPIMedia_1.v:303 + if (vlTOPp->TLSPI__DOT__mac__DOT___T_97) { + if ((1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert)))) { + if (vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42) { + vlTOPp->TLSPI__DOT__mac__DOT__cs_id = vlTOPp->TLSPI__DOT__ctrl_cs_id; + } + } + } + if (vlTOPp->TLSPI__DOT__mac__DOT___T_97) { + if ((1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert)))) { + if (vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42) { + vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_0 = vlTOPp->TLSPI__DOT__ctrl_cs_dflt_0; + } else { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_0 = (1U & (IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_69)); + } + } + } + } else { + if ((1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_99)))) { + if (vlTOPp->TLSPI__DOT__mac__DOT___T_102) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_0 = (1U & (IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_107)); + } + } + } + } + if (vlTOPp->TLSPI__DOT__mac__DOT___T_97) { + if ((1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert)))) { + if (vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42) { + vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_1 = vlTOPp->TLSPI__DOT__ctrl_cs_dflt_1; + } else { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_1 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_69) >> 1U)); + } + } + } + } else { + if ((1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_99)))) { + if (vlTOPp->TLSPI__DOT__mac__DOT___T_102) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_1 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_107) >> 1U)); + } + } + } + } + if (vlTOPp->TLSPI__DOT__mac__DOT___T_97) { + if ((1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert)))) { + if (vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42) { + vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_2 = vlTOPp->TLSPI__DOT__ctrl_cs_dflt_2; + } else { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_2 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_69) >> 2U)); + } + } + } + } else { + if ((1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_99)))) { + if (vlTOPp->TLSPI__DOT__mac__DOT___T_102) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_2 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_107) >> 2U)); + } + } + } + } + if (vlTOPp->TLSPI__DOT__mac__DOT___T_97) { + if ((1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert)))) { + if (vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42) { + vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_3 = vlTOPp->TLSPI__DOT__ctrl_cs_dflt_3; + } else { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_3 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_69) >> 3U)); + } + } + } + } else { + if ((1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_99)))) { + if (vlTOPp->TLSPI__DOT__mac__DOT___T_102) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_3 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_107) >> 3U)); + } + } + } + } + if (vlTOPp->TLSPI__DOT__mac__DOT___T_97) { + if ((1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert)))) { + if ((1U & (~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42)))) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + vlTOPp->TLSPI__DOT__mac__DOT__cs_set = (3U != (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__cs_mode)); + } + } + } + } + if (vlTOPp->__Vcellinp__TLSPI__reset) { + __Vdly__TLSPI__DOT__mac__DOT__cs_assert = 0U; + } else { + if (vlTOPp->TLSPI__DOT__mac__DOT___T_97) { + if ((1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert)))) { + if ((1U & (~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42)))) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + __Vdly__TLSPI__DOT__mac__DOT__cs_assert = 1U; + } + } + } + } else { + if ((1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_99)))) { + if (vlTOPp->TLSPI__DOT__mac__DOT___T_102) { + __Vdly__TLSPI__DOT__mac__DOT__cs_assert = 0U; + } + } + } + } + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__mac__DOT__state = 0U; + } else { + if (vlTOPp->TLSPI__DOT__mac__DOT___T_97) { + if (vlTOPp->TLSPI__DOT__mac__DOT__cs_assert) { + if (vlTOPp->TLSPI__DOT__mac__DOT__cs_deassert) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + vlTOPp->TLSPI__DOT__mac__DOT__state = 2U; + } + } else { + if (((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid))) { + vlTOPp->TLSPI__DOT__mac__DOT__state = 1U; + } + } + } + } else { + if (vlTOPp->TLSPI__DOT__mac__DOT___T_99) { + if (((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) | + (0U == (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_interxfr)))) { + vlTOPp->TLSPI__DOT__mac__DOT__state = 0U; + } + } else { + if (vlTOPp->TLSPI__DOT__mac__DOT___T_102) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + vlTOPp->TLSPI__DOT__mac__DOT__state = 0U; + } + } + } + } + } + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_dq_1_oe, ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_111) | + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txen_2))); + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_dq_0_oe, + ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto)) | + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_111) | + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txen_2)))); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data = + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35[vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value_1]; + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_554 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551) - (IData)(1U))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_555 = + (1U & (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_639 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_636) - (IData)(1U))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_640 = + (1U & (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_636))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_499 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496) - (IData)(1U))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_500 = + (1U & (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_618 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_615) - (IData)(1U))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_619 = + (1U & (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_615))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_554 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_551) - (IData)(1U))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_555 = (1U & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_551))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_639 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_636) - (IData)(1U))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_640 = (1U & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_636))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_499 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496) - (IData)(1U))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_500 = (1U & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_618 = + (1U & ((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_615) - (IData)(1U))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_619 = (1U & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_615))); + vlTOPp->TLSPI__DOT__mac__DOT__cs_assert = __Vdly__TLSPI__DOT__mac__DOT__cs_assert; + vlTOPp->TLSPI__DOT__fifo__DOT___T_57 = + (0xfU & + (((((0U == (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_proto)) ? (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_len) : 0U) | + (7U & + ((1U == (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_proto)) ? ((IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_len) >> 1U) + : 0U))) | + (3U & + ((2U == (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_proto)) ? ((IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_len) >> 2U) + : 0U))) + + (((1U == (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_proto)) & (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_len)) | + ((2U == (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_proto)) & + (0U != (3U & (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_len))))))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_128 = ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__done) | + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__last_d)); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq_io_enq_valid = + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__done) & (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxen)); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_52 = + (7U & ((IData)(1U) + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value))); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_40 = ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value) == + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value_1)); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_71 = + ((((0x80U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) << 7U)) | + (0x40U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) << 5U))) | + ((0x20U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) << 3U)) | + (0x10U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) << 1U)))) | + (((8U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) >> 1U)) | + (4U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) >> 3U))) | + ((2U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) >> 5U)) | + (1U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data) >> 7U))))); + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_fmt_endian = 0U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1832) & (vlTOPp->TLSPI__DOT___T_626 >> 2U))) { + vlTOPp->TLSPI__DOT__ctrl_fmt_endian = + (1U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data >> 2U)); + } + } + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_52 = + (7U & ((IData)(1U) + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value))); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_40 = ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value) == + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value_1)); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cinv = ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pha) ^ + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pol)); + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_sck_pol = 0U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1742) & (vlTOPp->TLSPI__DOT___T_626 >> 1U))) { + vlTOPp->TLSPI__DOT__ctrl_sck_pol = + (1U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data >> 1U)); + } + } + // ALWAYS at verilog/SPIPhysical_1.v:429 + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_44 = ((~(IData)(vlTOPp->__Vcellinp__TLSPI__reset)) & + ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) & + (((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref)) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr)))); + // ALWAYS at verilog/SPIPhysical_1.v:486 + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_42 = ((~(IData)(vlTOPp->__Vcellinp__TLSPI__reset)) & + ((0U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) & + ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) & + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref))))); + vlTOPp->TLSPI__DOT__mac__DOT___T_97 = (0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)); + vlTOPp->TLSPI__DOT__mac__DOT___T_99 = (1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)); + vlTOPp->TLSPI__DOT__mac__DOT___T_102 = (2U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)); + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_dla_interxfr = 0U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1802) & (0U == (0xffU & (~(vlTOPp->TLSPI__DOT___T_626 >> 0x10U)))))) { + vlTOPp->TLSPI__DOT__ctrl_dla_interxfr = + (0xffU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data >> 0x10U)); + } + } + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_cs_0, vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_0); + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_cs_2, vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_2); + VL_ASSIGN_SII(1, vlTOPp->auto_io_out_cs_3, vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_3); + vlTOPp->TLSPI__DOT__mac__DOT___T_88 = + ((((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_3) << 3U) | + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_2) << 2U)) | + (((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_1) << 1U) | (IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_dflt_0))); + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_cs_dflt_0 = 1U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1766) & vlTOPp->TLSPI__DOT___T_626)) { + vlTOPp->TLSPI__DOT__ctrl_cs_dflt_0 = (1U & vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data); + } + } + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_cs_dflt_1 = 1U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1766) & (vlTOPp->TLSPI__DOT___T_626 >> 1U))) { + vlTOPp->TLSPI__DOT__ctrl_cs_dflt_1 = + (1U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data >> 1U)); + } + } + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_cs_dflt_2 = 1U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1766) & (vlTOPp->TLSPI__DOT___T_626 >> 2U))) { + vlTOPp->TLSPI__DOT__ctrl_cs_dflt_2 = + (1U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data >> 2U)); + } + } + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_cs_dflt_3 = 1U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1766) & (vlTOPp->TLSPI__DOT___T_626 >> 3U))) { + vlTOPp->TLSPI__DOT__ctrl_cs_dflt_3 = + (1U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data >> 3U)); + } + } + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_cs_id = 0U; + } else { + if (((((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> + 4U)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))) & + (0U == (3U & (~vlTOPp->TLSPI__DOT___T_626))))) { + vlTOPp->TLSPI__DOT__ctrl_cs_id = (3U & vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data); + } + } + // ALWAYS at verilog/SPIFIFO.v:195 + vlTOPp->TLSPI__DOT__fifo__DOT__cs_mode = + ((IData)(vlTOPp->__Vcellinp__TLSPI__reset) ? 0U : (IData)(vlTOPp->TLSPI__DOT__ctrl_cs_mode)); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42 = ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_40) & + (~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_39))); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_43 = ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_40) & + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_39)); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_43 = ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_40) & + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_39)); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_42 = ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_40) & + (~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_39))); + vlTOPp->TLSPI__DOT__mac__DOT___T_107 = + (0xfU & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_88) ^ + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_set) << (IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_id)))); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_44 = ((~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_43)) & + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq_io_enq_valid)); + // ALWAYS at verilog/SPIPhysical_1.v:429 + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr = + (1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn))); + } + } + // ALWAYS at verilog/SPIPhysical_1.v:429 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref = 1U; + } else { + if ((0U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt))) { + if ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt))) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref = vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_154; + } + } + } + vlTOPp->TLSPI__DOT__mac__DOT___T_69 = + (0xfU & + (((((IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_3) << 3U) | ((IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_2) << 2U)) | + (((IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_1) << 1U) | (IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_0))) ^ + ((3U != (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__cs_mode)) << (IData)(vlTOPp->TLSPI__DOT__ctrl_cs_id)))); + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_cs_mode = 0U; + } else { + if (((((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> + 6U)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))) & + (0U == (3U & (~vlTOPp->TLSPI__DOT___T_626))))) { + vlTOPp->TLSPI__DOT__ctrl_cs_mode = (3U & vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data); + } + } + vlTOPp->TLSPI__DOT__mac__DOT__cs_deassert = + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__clear) | + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_69) != (IData)(vlTOPp->TLSPI__DOT__mac__DOT___T_88))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_154 = (1U & (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_148 = + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref) ^ (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cinv)); + // ALWAYS at verilog/SPIPhysical_1.v:429 + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt = + (0xffU & ((IData)(vlTOPp->__Vcellinp__TLSPI__reset) + ? 0U + : ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_cnt) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_16)) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_16)))); + // ALWAYS at verilog/SPIPhysical_1.v:429 + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt = + (0xfffU & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sched) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_div) + : ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_47) - (IData)(1U)))); + vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_cnt = + ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_deassert) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_sckcs) + : (IData)(vlTOPp->TLSPI__DOT__fifo__DOT___T_57)) + : ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42) + ? 0U + : (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_cssck))) + : ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_interxfr) + : ((2U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_intercs) + : (IData)(vlTOPp->TLSPI__DOT__fifo__DOT___T_57)))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__shift = ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__setup_d) | + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sample_d) & + (0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sched = ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) | + (0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_13 = + ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck) + : ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_148) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck)) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sck))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_47 = ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_15 = ((0U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) & + ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) & + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__xfr) & + (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref))))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_155 = ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) & + (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref))); + // ALWAYS at verilog/SPIPhysical_1.v:429 + if (vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn) { + if (vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_stb) { + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_div = vlTOPp->TLSPI__DOT__ctrl_sck_div; + } + } + } + } + } + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_16 = + (0xfffU & ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt) + : ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__tcnt)) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__cref) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt) + : ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_47) - (IData)(1U))) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_22 = + ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) + ? ((~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_155)) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_15)) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___GEN_15)); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__accept = + ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt)) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_155) | + (0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt))) + : (0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__scnt))); + vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_fn = + (1U & + ((0U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) | + ((~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert)) | (IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_deassert)))); + vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_bits_stb = + (1U & ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert) + ? (~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_deassert)) + : (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42)) + : ((1U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) & + (2U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state))))); + vlTOPp->TLSPI__DOT__mac__DOT__phy_io_op_valid = + (1U & ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) + ? ((~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert)) | + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_deassert) | + (~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42)))) + : ((1U != (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) | + (0U != (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_interxfr))))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_102 = + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__accept) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_proto) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto)); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__txd_in = + (0xfU & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__accept) + ? (((IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_endian) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_71) + : (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data)) >> + 4U) + : ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) >> 4U))); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156 = ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__accept) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__done)); + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ctrl_sck_div = 3U; + } else { + if (((((IData)(vlTOPp->TLSPI__DOT___T_1732) & + ((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))) & + (0U == (0xfffU & (~vlTOPp->TLSPI__DOT___T_626))))) { + vlTOPp->TLSPI__DOT__ctrl_sck_div = (0xfffU & vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data); + } + } + vlTOPp->TLSPI__DOT__mac_io_link_tx_ready = ((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__state)) & + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert) & + ((~(IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_deassert)) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_156)))); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_47 = ((IData)(vlTOPp->TLSPI__DOT__mac_io_link_tx_ready) & + (~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_42))); + vlTOPp->TLSPI__DOT__mac__DOT___T_94 = + ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__clear) | + ((((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__cs_mode) != (IData)(vlTOPp->TLSPI__DOT__ctrl_cs_mode)) | + ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_47) & + (~((2U == (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__cs_mode)) | + (3U == (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__cs_mode)))))) & + (IData)(vlTOPp->TLSPI__DOT__mac__DOT__cs_assert))); +} + +VL_INLINE_OPT void VTLSPI::_sequent__TOP__5(VTLSPI__Syms *__restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::_sequent__TOP__5\n");); + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + // ALWAYS at ../git/freedom/rocket-chip/src/main/resources/vsrc/AsyncResetReg.v:70 + vlTOPp->TLSPI__DOT__intsource__DOT__AsyncResetRegVec_w1_i0__DOT__reg_0_q = + ((~(IData)(vlTOPp->__Vcellinp__TLSPI__reset)) & + (((IData)(vlTOPp->TLSPI__DOT__fifo_io_ip_txwm) & (IData)(vlTOPp->TLSPI__DOT__ie_txwm)) | + ((IData)(vlTOPp->TLSPI__DOT__fifo_io_ip_rxwm) & (IData)(vlTOPp->TLSPI__DOT__ie_rxwm)))); + VL_ASSIGN_SII(1, vlTOPp->auto_int_xing_out_sync_0, + vlTOPp->TLSPI__DOT__intsource__DOT__AsyncResetRegVec_w1_i0__DOT__reg_0_q); +} + +VL_INLINE_OPT void VTLSPI::_combo__TOP__6(VTLSPI__Syms *__restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::_combo__TOP__6\n");); + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt, + vlTOPp->auto_control_xing_in_a_bits_corrupt); + VL_ASSIGN_ISI(4, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask, + vlTOPp->auto_control_xing_in_a_bits_mask); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid, vlTOPp->auto_control_xing_in_a_valid); + VL_ASSIGN_ISI(3, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param, + vlTOPp->auto_control_xing_in_a_bits_param); + VL_ASSIGN_ISI(3, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode, + vlTOPp->auto_control_xing_in_a_bits_opcode); + VL_ASSIGN_ISI(6, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source, + vlTOPp->auto_control_xing_in_a_bits_source); + VL_ASSIGN_ISI(2, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size, + vlTOPp->auto_control_xing_in_a_bits_size); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_687 = + ((((VL_ULL(0) == vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_604) | + (0U == vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus)) | + (vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_679 < + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_687 = + ((((VL_ULL(0) == vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_604) | + (0U == vlTOPp->TLSPI__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus)) | + (vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_679 < + vlTOPp->TLSPI__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT___T_96 = + ((((0U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto)) + ? ((0xfeU & (((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__shift) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) + : ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) >> 1U)) + << 1U)) | + (1U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sample_d) + ? ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__rxd) >> 1U) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer)))) + : 0U) | + ((1U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto)) + ? ((0xfcU & (((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__shift) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) + : ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) >> 2U)) + << 2U)) | + (3U & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sample_d) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__rxd) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer)))) + : 0U)) | + ((2U == (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto)) + ? ((0xf0U & (((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__shift) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) + : ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer) >> 4U)) + << 4U)) | + (0xfU & ((IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__sample_d) + ? (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__rxd) + : (IData)(vlTOPp->TLSPI__DOT__mac__DOT__phy__DOT__buffer)))) + : 0U)); + VL_ASSIGN_ISI(29, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address, + vlTOPp->auto_control_xing_in_a_bits_address); + VL_ASSIGN_SII(1, vlTOPp->auto_control_xing_in_d_valid, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid); + vlTOPp->TLSPI__DOT___T_1495 = ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid) & + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_d_ready)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542 = + ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_d_ready) & + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_542 = ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_d_ready) & + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486 = + ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_d_ready) & + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_486 = ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_d_ready) & + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_valid)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_526 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_511)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_526 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_param) == + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_511)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + VL_ASSIGN_SII(3, vlTOPp->auto_control_xing_in_d_bits_opcode, + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_522 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_509)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_579 = + (((4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode)) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_564)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_522 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode) == + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_509)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_579 = + (((4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode)) == + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_564)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_534 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_515)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_658 = + (1U & ((~(IData)((vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_604 >> + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_534 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source) == + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_515)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_658 = + (1U & ((~(IData)((vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_604 >> + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_530 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_513)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_530 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size) == + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_513)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT___T_426 = (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source) << 2U) | + (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97 = + ((0U == + (3U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address & + (~(0x1fU & ((IData)(3U) << (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size))))))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_167 = + (((2U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) & + (0U == (0x3ffff000U & (0x10024000U ^ vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_538 = + ((vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address == + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_517) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_97 = + ((0U == + (3U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address & + (~(0x1fU & ((IData)(3U) << (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size))))))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_167 = + (((2U >= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) & + (0U == (0x3ffff000U & (0x10024000U ^ vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_538 = ((vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address == + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_517) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_52 = + (1U & + ((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (1U & ((((IData)(1U) << (1U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size))) >> 1U) & + (~(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U)))))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_55 = + (1U & + ((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (1U & ((((IData)(1U) << (1U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size))) >> 1U) & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U))))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_52 = + (1U & + ((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (1U & ((((IData)(1U) << (1U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size))) >> 1U) & + (~(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U)))))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_55 = + (1U & + ((2U <= (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size)) | + (1U & ((((IData)(1U) << (1U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_size))) >> 1U) & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U))))); + vlTOPp->TLSPI__DOT___GEN_155 = + ((0x10U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((0x12U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((0x13U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((0x14U == + (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == + (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((0x15U == + (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == + (0x3e0U & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((0x1cU == + (0x1fU & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == + (0x3e0U & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + : ((0x1dU != + (0x1fU & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) | + (0U == + (0x3e0U & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U)))))))))); + vlTOPp->TLSPI__DOT___T_1732 = ((IData)(vlTOPp->TLSPI__DOT___T_1495) & + (4U != (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_602 = + ((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_602 = + ((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_542) & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_551))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_541 = + ((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___GEN_15 = + (((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_615))) + ? (VL_ULL(1) << (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source)) + : VL_ULL(0)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_541 = + ((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_486) & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_496))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___GEN_15 = + (((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_486) & (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_615))) + ? (VL_ULL(1) << (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_source)) + : VL_ULL(0)); + VL_ASSIGN_SII(6, vlTOPp->auto_control_xing_in_d_bits_source, (0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U))); + VL_ASSIGN_SII(2, vlTOPp->auto_control_xing_in_d_bits_size, (3U & (IData)(vlTOPp->TLSPI__DOT___T_426))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_587 = + (((3U & (IData)(vlTOPp->TLSPI__DOT___T_426)) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_568)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_591 = + (((0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U)) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_570)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_587 = + (((3U & (IData)(vlTOPp->TLSPI__DOT___T_426)) == (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_568)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_591 = (((0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U)) == + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_570)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_73 = + (((8U & (((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_55) << 3U) | + (0xfffffff8U & ((vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address << 2U) & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address << 3U))))) | + (4U & (((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_55) << 2U) | + (0xfffffffcU & ((vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address << 1U) & + ((~vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address) << 2U)))))) | + ((2U & (((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_52) | + ((~(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U)) & + vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address)) + << 1U)) | + (1U & ((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_52) | + ((~(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U)) & + (~vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address)))))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_73 = + (((8U & (((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_55) << 3U) | + (0xfffffff8U & ((vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address << 2U) & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address << 3U))))) | + (4U & (((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_55) << 2U) | + (0xfffffffcU & ((vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address << 1U) & + ((~vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address) << 2U)))))) | + ((2U & (((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_52) | + ((~(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U)) & + vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address)) + << 1U)) | + (1U & ((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_52) | + ((~(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 1U)) & + (~vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address)))))); + vlTOPp->TLSPI__DOT___GEN_162 = + ((0U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((1U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((4U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((5U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == + (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((6U == + (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == + (0x3e0U & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + : ((0xaU == + (0x1fU & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (0U == + (0x3e0U & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + : ((0xbU == + (0x1fU & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + ? (0U == + (0x3e0U & + (vlTOPp + ->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + : (IData)(vlTOPp->TLSPI__DOT___GEN_155)))))))); + vlTOPp->TLSPI__DOT___T_1766 = + (((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> 5U)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))); + vlTOPp->TLSPI__DOT___T_1796 = + (((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> 0xaU)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))); + vlTOPp->TLSPI__DOT___T_1742 = + (((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> 1U)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))); + vlTOPp->TLSPI__DOT___T_1832 = + (((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> + 0x10U)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))); + vlTOPp->TLSPI__DOT___T_1802 = + (((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> 0xbU)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))); + vlTOPp->TLSPI__DOT___T_1844 = + (((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> + 0x12U)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_673 = + (1U & ((IData)(((vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___GEN_15 | + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_604) >> + (0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_677 = + ((vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_604 | + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___GEN_15) & + (~(((IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_636))) + ? (VL_ULL(1) << (0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U))) + : VL_ULL(0)))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_673 = + (1U & ((IData)(((vlTOPp->TLSPI__DOT__TLMonitor__DOT___GEN_15 | vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_604) >> + (0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset))); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_677 = + ((vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_604 | vlTOPp->TLSPI__DOT__TLMonitor__DOT___GEN_15) & + (~(((IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_542) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_636))) + ? (VL_ULL(1) << (0x3fU & ((IData)(vlTOPp->TLSPI__DOT___T_426) >> 2U))) + : VL_ULL(0)))); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask) == + (IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_73)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_245 = + ((0U == ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask) & + (~(IData)(vlTOPp->TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_73)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_181 = + (((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask) == + (IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_73)) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); + vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_245 = + ((0U == ((IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask) & + (~(IData)(vlTOPp->TLSPI__DOT__TLMonitor__DOT___T_73)))) | + (IData)(vlTOPp->__Vcellinp__TLSPI__reset)); +} + +VL_INLINE_OPT void VTLSPI::_sequent__TOP__7(VTLSPI__Syms *__restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::_sequent__TOP__7\n");); + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + vlTOPp->TLSPI__DOT__fifo_io_ip_txwm = (((((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_39) & + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_40)) + << 3U) | + (7U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value) - + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT__value_1)))) < + (IData)(vlTOPp->TLSPI__DOT__ctrl_wm_tx)); + vlTOPp->TLSPI__DOT__fifo_io_ip_rxwm = (((((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_39) & + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_40)) + << 3U) | + (7U & ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value) - + (IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value_1)))) > + (IData)(vlTOPp->TLSPI__DOT__ctrl_wm_rx)); + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ie_txwm = 0U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1904) & vlTOPp->TLSPI__DOT___T_626)) { + vlTOPp->TLSPI__DOT__ie_txwm = (1U & vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data); + } + } + // ALWAYS at verilog/TLSPI.v:962 + if (vlTOPp->__Vcellinp__TLSPI__reset) { + vlTOPp->TLSPI__DOT__ie_rxwm = 0U; + } else { + if (((IData)(vlTOPp->TLSPI__DOT___T_1904) & (vlTOPp->TLSPI__DOT___T_626 >> 1U))) { + vlTOPp->TLSPI__DOT__ie_rxwm = (1U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data >> 1U)); + } + } +} + +VL_INLINE_OPT void VTLSPI::_combo__TOP__8(VTLSPI__Syms *__restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::_combo__TOP__8\n");); + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + vlTOPp->TLSPI__DOT___T_1904 = + (((IData)(vlTOPp->TLSPI__DOT___T_1732) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> + 0x1cU)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))); + VL_ASSIGN_ISI(1, vlTOPp->__Vcellinp__TLSPI__reset, vlTOPp->reset); + VL_ASSIGN_ISI(32, vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data, + vlTOPp->auto_control_xing_in_a_bits_data); + vlTOPp->TLSPI__DOT___T_626 = + (((((8U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)) ? 0xffU : 0U) << 0x18U) | + (((4U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)) ? 0xffU : 0U) << 0x10U)) | + ((((2U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)) ? 0xffU : 0U) << 8U) | + ((1U & (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask)) ? 0xffU : 0U))); + vlTOPp->TLSPI__DOT___GEN_172 = + ((6U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_cs_mode) + : ((0xaU == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (((IData)(vlTOPp->TLSPI__DOT__ctrl_dla_sckcs) << 0x10U) | + (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_cssck)) + : ((0xbU == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (((IData)(vlTOPp->TLSPI__DOT__ctrl_dla_interxfr) << 0x10U) | + (IData)(vlTOPp->TLSPI__DOT__ctrl_dla_intercs)) + : ((0x10U == + (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (((IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_len) << 0x10U) | + (((IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_iodir) << 3U) | + (((IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_endian) << 2U) | + (IData)(vlTOPp->TLSPI__DOT__ctrl_fmt_proto)))) + : ((0x12U == + (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? ((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_43) << 0x1fU) + : ((0x13U == + (0x1fU & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (((IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_42) << 0x1fU) | + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_35 + [vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT__value_1]) + : ((0x14U == + (0x1fU & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_wm_tx) + : ((0x15U == + (0x1fU & + (vlTOPp + ->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_wm_rx) + : ((0x1cU == + (0x1fU & + (vlTOPp + ->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + ? (((IData)(vlTOPp->TLSPI__DOT__ie_rxwm) << 1U) | + (IData)(vlTOPp->TLSPI__DOT__ie_txwm)) + : ((0x1dU == + (0x1fU & + (vlTOPp + ->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> + 2U))) + ? (((IData)( + vlTOPp->TLSPI__DOT__fifo_io_ip_rxwm) + << 1U) | + (IData)( + vlTOPp->TLSPI__DOT__fifo_io_ip_txwm)) + : 0U)))))))))); + vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_47 = + ((((((IData)(vlTOPp->TLSPI__DOT___T_1495) & + (4U == (IData)(vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode))) & + (((IData)(1U) << (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) >> + 0x13U)) & + (0U == (0x3e0U & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U)))) & + (0U != (0xffU & vlTOPp->TLSPI__DOT___T_626))) & + (~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__rxq__DOT___T_42))); + vlTOPp->TLSPI__DOT__fifo_io_tx_valid = + (((IData)(vlTOPp->TLSPI__DOT___T_1844) & (0U == (0xffU & (~vlTOPp->TLSPI__DOT___T_626)))) & + (~(((IData)(vlTOPp->TLSPI__DOT___T_1844) & (vlTOPp->TLSPI__DOT___T_626 >> 0x1fU)) & + (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_data >> 0x1fU)))); + VL_ASSIGN_SII( + 32, vlTOPp->auto_control_xing_in_d_bits_data, + ((IData)(vlTOPp->TLSPI__DOT___GEN_162) + ? ((0U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_sck_div) + : ((1U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (((IData)(vlTOPp->TLSPI__DOT__ctrl_sck_pol) << 1U) | + (IData)(vlTOPp->TLSPI__DOT__ctrl_sck_pha)) + : ((4U == (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (IData)(vlTOPp->TLSPI__DOT__ctrl_cs_id) + : ((5U == + (0x1fU & (vlTOPp->__Vcellinp__TLSPI__auto_control_xing_in_a_bits_address >> 2U))) + ? (((IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_3) << 3U) | + (((IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_2) << 2U) | + (((IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_1) << 1U) | + (IData)(vlTOPp->TLSPI__DOT__ctrl_cs_dflt_0)))) + : vlTOPp->TLSPI__DOT___GEN_172)))) + : 0U)); + vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_44 = + ((~(IData)(vlTOPp->TLSPI__DOT__fifo__DOT__txq__DOT___T_43)) & (IData)(vlTOPp->TLSPI__DOT__fifo_io_tx_valid)); +} + +void VTLSPI::_eval(VTLSPI__Syms *__restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::_eval\n");); + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + vlTOPp->_combo__TOP__2(vlSymsp); + if (((IData)(vlTOPp->__Vcellinp__TLSPI__clock) & (~(IData)(vlTOPp->__Vclklast__TOP____Vcellinp__TLSPI__clock)))) { + vlTOPp->_sequent__TOP__4(vlSymsp); + } + if ((((IData)(vlTOPp->__Vcellinp__TLSPI__clock) & (~(IData)(vlTOPp->__Vclklast__TOP____Vcellinp__TLSPI__clock))) | + ((IData)(vlTOPp->__VinpClk__TOP____Vcellinp__TLSPI__reset) & + (~(IData)(vlTOPp->__Vclklast__TOP____VinpClk__TOP____Vcellinp__TLSPI__reset))))) { + vlTOPp->_sequent__TOP__5(vlSymsp); + } + vlTOPp->_combo__TOP__6(vlSymsp); + if (((IData)(vlTOPp->__Vcellinp__TLSPI__clock) & (~(IData)(vlTOPp->__Vclklast__TOP____Vcellinp__TLSPI__clock)))) { + vlTOPp->_sequent__TOP__7(vlSymsp); + } + vlTOPp->_combo__TOP__8(vlSymsp); + // Final + vlTOPp->__Vclklast__TOP____Vcellinp__TLSPI__clock = vlTOPp->__Vcellinp__TLSPI__clock; + vlTOPp->__Vclklast__TOP____VinpClk__TOP____Vcellinp__TLSPI__reset = + vlTOPp->__VinpClk__TOP____Vcellinp__TLSPI__reset; + vlTOPp->__VinpClk__TOP____Vcellinp__TLSPI__reset = vlTOPp->__Vcellinp__TLSPI__reset; +} + +void VTLSPI::_eval_initial(VTLSPI__Syms *__restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::_eval_initial\n");); + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + vlTOPp->_initial__TOP__1(vlSymsp); +} + +void VTLSPI::final() { + VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::final\n");); + // Variables + VTLSPI__Syms *__restrict vlSymsp = this->__VlSymsp; + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; +} + +void VTLSPI::_eval_settle(VTLSPI__Syms *__restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::_eval_settle\n");); + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + vlTOPp->_settle__TOP__3(vlSymsp); +} + +VL_INLINE_OPT QData VTLSPI::_change_request(VTLSPI__Syms *__restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::_change_request\n");); + VTLSPI *__restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + // Change detection + QData __req = false; // Logically a bool + __req |= ((vlTOPp->__Vcellinp__TLSPI__reset ^ vlTOPp->__Vchglast__TOP____Vcellinp__TLSPI__reset)); + VL_DEBUG_IF(if (__req && ((vlTOPp->__Vcellinp__TLSPI__reset ^ vlTOPp->__Vchglast__TOP____Vcellinp__TLSPI__reset))) + VL_DBG_MSGF(" CHANGE: verilog/TLSPI.v:3: __Vcellinp__TLSPI__reset\n");); + // Final + vlTOPp->__Vchglast__TOP____Vcellinp__TLSPI__reset = vlTOPp->__Vcellinp__TLSPI__reset; + return __req; +} + +#ifdef VL_DEBUG +void VTLSPI::_eval_debug_assertions() { VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::_eval_debug_assertions\n");); } +#endif // VL_DEBUG + +void VTLSPI::_ctor_var_reset() { + VL_DEBUG_IF(VL_DBG_MSGF("+ VTLSPI::_ctor_var_reset\n");); + // Body + __Vcellinp__TLSPI__auto_io_out_dq_3_i = VL_RAND_RESET_I(1); + __Vcellinp__TLSPI__auto_io_out_dq_2_i = VL_RAND_RESET_I(1); + __Vcellinp__TLSPI__auto_io_out_dq_1_i = VL_RAND_RESET_I(1); + __Vcellinp__TLSPI__auto_io_out_dq_0_i = VL_RAND_RESET_I(1); + __Vcellinp__TLSPI__auto_control_xing_in_d_ready = VL_RAND_RESET_I(1); + __Vcellinp__TLSPI__auto_control_xing_in_a_bits_corrupt = VL_RAND_RESET_I(1); + __Vcellinp__TLSPI__auto_control_xing_in_a_bits_data = VL_RAND_RESET_I(32); + __Vcellinp__TLSPI__auto_control_xing_in_a_bits_mask = VL_RAND_RESET_I(4); + __Vcellinp__TLSPI__auto_control_xing_in_a_bits_address = VL_RAND_RESET_I(29); + __Vcellinp__TLSPI__auto_control_xing_in_a_bits_source = VL_RAND_RESET_I(6); + __Vcellinp__TLSPI__auto_control_xing_in_a_bits_size = VL_RAND_RESET_I(2); + __Vcellinp__TLSPI__auto_control_xing_in_a_bits_param = VL_RAND_RESET_I(3); + __Vcellinp__TLSPI__auto_control_xing_in_a_bits_opcode = VL_RAND_RESET_I(3); + __Vcellinp__TLSPI__auto_control_xing_in_a_valid = VL_RAND_RESET_I(1); + __Vcellinp__TLSPI__reset = VL_RAND_RESET_I(1); + __Vcellinp__TLSPI__clock = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo_io_tx_valid = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo_io_ip_txwm = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo_io_ip_rxwm = VL_RAND_RESET_I(1); + TLSPI__DOT__mac_io_link_tx_ready = VL_RAND_RESET_I(1); + TLSPI__DOT__ctrl_fmt_proto = VL_RAND_RESET_I(2); + TLSPI__DOT__ctrl_fmt_endian = VL_RAND_RESET_I(1); + TLSPI__DOT__ctrl_fmt_iodir = VL_RAND_RESET_I(1); + TLSPI__DOT__ctrl_fmt_len = VL_RAND_RESET_I(4); + TLSPI__DOT__ctrl_sck_div = VL_RAND_RESET_I(12); + TLSPI__DOT__ctrl_sck_pol = VL_RAND_RESET_I(1); + TLSPI__DOT__ctrl_sck_pha = VL_RAND_RESET_I(1); + TLSPI__DOT__ctrl_cs_id = VL_RAND_RESET_I(2); + TLSPI__DOT__ctrl_cs_dflt_0 = VL_RAND_RESET_I(1); + TLSPI__DOT__ctrl_cs_dflt_1 = VL_RAND_RESET_I(1); + TLSPI__DOT__ctrl_cs_dflt_2 = VL_RAND_RESET_I(1); + TLSPI__DOT__ctrl_cs_dflt_3 = VL_RAND_RESET_I(1); + TLSPI__DOT__ctrl_cs_mode = VL_RAND_RESET_I(2); + TLSPI__DOT__ctrl_dla_cssck = VL_RAND_RESET_I(8); + TLSPI__DOT__ctrl_dla_sckcs = VL_RAND_RESET_I(8); + TLSPI__DOT__ctrl_dla_intercs = VL_RAND_RESET_I(8); + TLSPI__DOT__ctrl_dla_interxfr = VL_RAND_RESET_I(8); + TLSPI__DOT__ctrl_wm_tx = VL_RAND_RESET_I(4); + TLSPI__DOT__ctrl_wm_rx = VL_RAND_RESET_I(4); + TLSPI__DOT__ie_txwm = VL_RAND_RESET_I(1); + TLSPI__DOT__ie_rxwm = VL_RAND_RESET_I(1); + TLSPI__DOT___T_426 = VL_RAND_RESET_I(8); + TLSPI__DOT___T_626 = VL_RAND_RESET_I(32); + TLSPI__DOT___T_1495 = VL_RAND_RESET_I(1); + TLSPI__DOT___T_1732 = VL_RAND_RESET_I(1); + TLSPI__DOT___T_1766 = VL_RAND_RESET_I(1); + TLSPI__DOT___T_1796 = VL_RAND_RESET_I(1); + TLSPI__DOT___T_1742 = VL_RAND_RESET_I(1); + TLSPI__DOT___T_1904 = VL_RAND_RESET_I(1); + TLSPI__DOT___T_1844 = VL_RAND_RESET_I(1); + TLSPI__DOT___T_1832 = VL_RAND_RESET_I(1); + TLSPI__DOT___T_1802 = VL_RAND_RESET_I(1); + TLSPI__DOT___GEN_155 = VL_RAND_RESET_I(1); + TLSPI__DOT___GEN_162 = VL_RAND_RESET_I(1); + TLSPI__DOT___GEN_172 = VL_RAND_RESET_I(32); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_52 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_55 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_73 = VL_RAND_RESET_I(4); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_97 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_167 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_181 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_245 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_486 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_496 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_499 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_500 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_509 = VL_RAND_RESET_I(3); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_511 = VL_RAND_RESET_I(3); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_513 = VL_RAND_RESET_I(2); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_515 = VL_RAND_RESET_I(6); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_517 = VL_RAND_RESET_I(29); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_522 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_526 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_530 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_534 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_538 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_541 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_542 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_551 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_554 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_555 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_564 = VL_RAND_RESET_I(3); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_568 = VL_RAND_RESET_I(2); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_570 = VL_RAND_RESET_I(6); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_579 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_587 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_591 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_602 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_604 = VL_RAND_RESET_Q(64); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_615 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_618 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_619 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_636 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_639 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_640 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_658 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___GEN_15 = VL_RAND_RESET_Q(64); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_673 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_677 = VL_RAND_RESET_Q(64); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_679 = VL_RAND_RESET_I(32); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_687 = VL_RAND_RESET_I(1); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT___T_690 = VL_RAND_RESET_I(32); + TLSPI__DOT__buffer__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus = VL_RAND_RESET_I(32); + TLSPI__DOT__intsource__DOT__AsyncResetRegVec_w1_i0__DOT__reg_0_q = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_52 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_55 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_73 = VL_RAND_RESET_I(4); + TLSPI__DOT__TLMonitor__DOT___T_97 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_167 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_181 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_245 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_486 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_496 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_499 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_500 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_509 = VL_RAND_RESET_I(3); + TLSPI__DOT__TLMonitor__DOT___T_511 = VL_RAND_RESET_I(3); + TLSPI__DOT__TLMonitor__DOT___T_513 = VL_RAND_RESET_I(2); + TLSPI__DOT__TLMonitor__DOT___T_515 = VL_RAND_RESET_I(6); + TLSPI__DOT__TLMonitor__DOT___T_517 = VL_RAND_RESET_I(29); + TLSPI__DOT__TLMonitor__DOT___T_522 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_526 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_530 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_534 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_538 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_541 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_542 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_551 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_554 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_555 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_564 = VL_RAND_RESET_I(3); + TLSPI__DOT__TLMonitor__DOT___T_568 = VL_RAND_RESET_I(2); + TLSPI__DOT__TLMonitor__DOT___T_570 = VL_RAND_RESET_I(6); + TLSPI__DOT__TLMonitor__DOT___T_579 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_587 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_591 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_602 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_604 = VL_RAND_RESET_Q(64); + TLSPI__DOT__TLMonitor__DOT___T_615 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_618 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_619 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_636 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_639 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_640 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_658 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___GEN_15 = VL_RAND_RESET_Q(64); + TLSPI__DOT__TLMonitor__DOT___T_673 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_677 = VL_RAND_RESET_Q(64); + TLSPI__DOT__TLMonitor__DOT___T_679 = VL_RAND_RESET_I(32); + TLSPI__DOT__TLMonitor__DOT___T_687 = VL_RAND_RESET_I(1); + TLSPI__DOT__TLMonitor__DOT___T_690 = VL_RAND_RESET_I(32); + TLSPI__DOT__TLMonitor__DOT__plusarg_reader__DOT__myplus = VL_RAND_RESET_I(32); + TLSPI__DOT__fifo__DOT__rxq_io_enq_valid = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo__DOT__rxen = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo__DOT___T_57 = VL_RAND_RESET_I(4); + TLSPI__DOT__fifo__DOT__cs_mode = VL_RAND_RESET_I(2); + { + int __Vi0 = 0; + for (; __Vi0 < 8; ++__Vi0) { + TLSPI__DOT__fifo__DOT__txq__DOT___T_35[__Vi0] = VL_RAND_RESET_I(8); + } + } + TLSPI__DOT__fifo__DOT__txq__DOT___T_35___05FT_58_data = VL_RAND_RESET_I(8); + TLSPI__DOT__fifo__DOT__txq__DOT__value = VL_RAND_RESET_I(3); + TLSPI__DOT__fifo__DOT__txq__DOT__value_1 = VL_RAND_RESET_I(3); + TLSPI__DOT__fifo__DOT__txq__DOT___T_39 = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo__DOT__txq__DOT___T_40 = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo__DOT__txq__DOT___T_42 = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo__DOT__txq__DOT___T_43 = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo__DOT__txq__DOT___T_44 = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo__DOT__txq__DOT___T_47 = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo__DOT__txq__DOT___T_52 = VL_RAND_RESET_I(3); + TLSPI__DOT__fifo__DOT__txq__DOT___T_54 = VL_RAND_RESET_I(3); + { + int __Vi0 = 0; + for (; __Vi0 < 8; ++__Vi0) { + TLSPI__DOT__fifo__DOT__rxq__DOT___T_35[__Vi0] = VL_RAND_RESET_I(8); + } + } + TLSPI__DOT__fifo__DOT__rxq__DOT__value = VL_RAND_RESET_I(3); + TLSPI__DOT__fifo__DOT__rxq__DOT__value_1 = VL_RAND_RESET_I(3); + TLSPI__DOT__fifo__DOT__rxq__DOT___T_39 = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo__DOT__rxq__DOT___T_40 = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo__DOT__rxq__DOT___T_42 = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo__DOT__rxq__DOT___T_43 = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo__DOT__rxq__DOT___T_44 = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo__DOT__rxq__DOT___T_47 = VL_RAND_RESET_I(1); + TLSPI__DOT__fifo__DOT__rxq__DOT___T_52 = VL_RAND_RESET_I(3); + TLSPI__DOT__fifo__DOT__rxq__DOT___T_54 = VL_RAND_RESET_I(3); + TLSPI__DOT__mac__DOT__phy_io_op_valid = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy_io_op_bits_fn = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy_io_op_bits_stb = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy_io_op_bits_cnt = VL_RAND_RESET_I(8); + TLSPI__DOT__mac__DOT__cs_id = VL_RAND_RESET_I(2); + TLSPI__DOT__mac__DOT__cs_dflt_0 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__cs_dflt_1 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__cs_dflt_2 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__cs_dflt_3 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__cs_set = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT___T_69 = VL_RAND_RESET_I(4); + TLSPI__DOT__mac__DOT___T_88 = VL_RAND_RESET_I(4); + TLSPI__DOT__mac__DOT__clear = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__cs_assert = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__cs_deassert = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT___T_94 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__state = VL_RAND_RESET_I(2); + TLSPI__DOT__mac__DOT___T_97 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT___T_99 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT___T_102 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT___T_107 = VL_RAND_RESET_I(4); + TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_div = VL_RAND_RESET_I(12); + TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pol = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__ctrl_sck_pha = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_proto = VL_RAND_RESET_I(2); + TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_endian = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__ctrl_fmt_iodir = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__setup_d = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT___T_42 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT___T_43 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__sample_d = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT___T_44 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT___T_45 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__last_d = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__scnt = VL_RAND_RESET_I(8); + TLSPI__DOT__mac__DOT__phy__DOT__tcnt = VL_RAND_RESET_I(12); + TLSPI__DOT__mac__DOT__phy__DOT___T_47 = VL_RAND_RESET_I(12); + TLSPI__DOT__mac__DOT__phy__DOT__sched = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__sck = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__cref = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__cinv = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__rxd = VL_RAND_RESET_I(4); + TLSPI__DOT__mac__DOT__phy__DOT__buffer = VL_RAND_RESET_I(8); + TLSPI__DOT__mac__DOT__phy__DOT___T_71 = VL_RAND_RESET_I(8); + TLSPI__DOT__mac__DOT__phy__DOT__shift = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT___T_96 = VL_RAND_RESET_I(8); + TLSPI__DOT__mac__DOT__phy__DOT__txd = VL_RAND_RESET_I(4); + TLSPI__DOT__mac__DOT__phy__DOT___T_154 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT___T_155 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__accept = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__txd_in = VL_RAND_RESET_I(4); + TLSPI__DOT__mac__DOT__phy__DOT___T_102 = VL_RAND_RESET_I(2); + TLSPI__DOT__mac__DOT__phy__DOT__done = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT___T_156 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__xfr = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT___GEN_15 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT___GEN_22 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT___T_111 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT__txen_2 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT___T_128 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT___T_148 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT___GEN_13 = VL_RAND_RESET_I(1); + TLSPI__DOT__mac__DOT__phy__DOT___GEN_16 = VL_RAND_RESET_I(12); + __VinpClk__TOP____Vcellinp__TLSPI__reset = VL_RAND_RESET_I(1); + __Vclklast__TOP____Vcellinp__TLSPI__clock = VL_RAND_RESET_I(1); + __Vclklast__TOP____VinpClk__TOP____Vcellinp__TLSPI__reset = VL_RAND_RESET_I(1); + __Vchglast__TOP____Vcellinp__TLSPI__reset = VL_RAND_RESET_I(1); +} diff --git a/platform/src/rtl/VTLSPI__Syms.cpp b/platform/src/rtl/VTLSPI__Syms.cpp new file mode 100644 index 0000000..412ccbe --- /dev/null +++ b/platform/src/rtl/VTLSPI__Syms.cpp @@ -0,0 +1,22 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Symbol table implementation internals + +#include "VTLSPI__Syms.h" +#include "VTLSPI.h" + +// FUNCTIONS +VTLSPI__Syms::VTLSPI__Syms(VTLSPI *topp, const char *namep) +// Setup locals +: __Vm_namep(namep) +, __Vm_didInit(false) +// Setup submodule names +{ + // Pointer to top level + TOPp = topp; + // Setup each module's pointers to their submodules + // Setup each module's pointer back to symbol table (for public functions) + TOPp->__Vconfigure(this, true); + // Setup scope names + __Vscope_TLSPI__TLMonitor.configure(this, name(), "TLSPI.TLMonitor"); + __Vscope_TLSPI__buffer__TLMonitor.configure(this, name(), "TLSPI.buffer.TLMonitor"); +} diff --git a/platform/src/rtl/spi_rtl.cpp b/platform/src/rtl/spi_rtl.cpp new file mode 100644 index 0000000..1d8ab69 --- /dev/null +++ b/platform/src/rtl/spi_rtl.cpp @@ -0,0 +1,214 @@ +/******************************************************************************* + * Copyright (C) 2018 MINRES Technologies GmbH + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + *******************************************************************************/ + +#include "scc/signal_initiator_mixin.h" +#include "scc/time2tick.h" +#include "sysc/SiFive/spi.h" +#include "sysc/rtl/tl_uh_bfm.h" +#include +#include +#include +#include + +namespace sysc { +namespace spi_impl { +using namespace sc_core; + +class rtl : public spi { +public: + SC_HAS_PROCESS(beh);// NOLINT + + rtl(sc_module_name nm); + ~rtl() override; + + // void trace( sc_trace_file* tf ) const override { + // } + +private: + sc_signal clock; + sc_signal a_bits_address; + sc_signal a_bits_data; + sc_signal a_ready; + sc_signal a_valid; + sc_signal a_bits_opcode; + sc_signal a_bits_param; + sc_signal a_bits_size; + sc_signal a_bits_source; + sc_signal a_bits_mask; + sc_signal a_bits_corrupt; + sc_signal d_bits_data; + sc_signal d_ready; + sc_signal d_valid; + sc_signal d_bits_opcode; + sc_signal d_bits_size; + sc_signal d_bits_source; + sc_signal sck; + sc_signal dq_0_i; + sc_signal dq_0_o; + sc_signal dq_0_oe; + sc_signal dq_1_i; + sc_signal dq_1_o; + sc_signal dq_1_oe; + sc_signal dq_2_i; + sc_signal dq_3_i; + sc_signal cs_0; + sc_signal cs_2; + sc_signal cs_3; + + VTLSPI i_vtlspi; + tl_uh_bfm i_tlbfm; + scc::time2tick i_time2tick; + tlm::sc_signal2tlm_signal i_sck_conv; + tlm::sc_signal2tlm_signal i_mosi_conv; + tlm::tlm_signal2sc_signal i_miso_conv; + tlm::sc_signal2tlm_signal i_scs0_conv, i_scs2_conv, i_scs3_conv; + scc::tlm_signal_bool_opt_out scs_1; +}; + +rtl::rtl(sc_module_name nm) +: spi(nm) +, NAMED(a_bits_address) +, NAMED(a_bits_data) +, NAMED(a_ready) +, NAMED(a_valid) +, NAMED(a_bits_opcode) +, NAMED(a_bits_param) +, NAMED(a_bits_size) +, NAMED(a_bits_source) +, NAMED(a_bits_mask) +, NAMED(a_bits_corrupt) +, NAMED(d_bits_data) +, NAMED(d_ready) +, NAMED(d_valid) +, NAMED(d_bits_opcode) +, NAMED(d_bits_size) +, NAMED(d_bits_source) +, NAMED(sck) +, NAMED(dq_0_i) +, NAMED(dq_0_o) +, NAMED(dq_0_oe) +, NAMED(dq_1_i) +, NAMED(dq_1_o) +, NAMED(dq_1_oe) +, NAMED(dq_2_i) +, NAMED(dq_3_i) +, NAMED(cs_0) +, NAMED(cs_2) +, NAMED(cs_3) +, NAMED(i_vtlspi) +, NAMED(i_tlbfm, 0x10024000) +, NAMED(i_time2tick) +, NAMED(i_sck_conv) +, NAMED(i_mosi_conv) +, NAMED(i_miso_conv) +, NAMED(i_scs0_conv) +, NAMED(i_scs2_conv) +, NAMED(i_scs3_conv) +, NAMED(scs_1) { + i_vtlspi.clock(clock); + i_vtlspi.reset(rst_i); + i_vtlspi.auto_int_xing_out_sync_0(irq_o); + i_vtlspi.auto_control_xing_in_a_ready(a_ready); + i_vtlspi.auto_control_xing_in_a_valid(a_valid); + i_vtlspi.auto_control_xing_in_a_bits_address(a_bits_address); + i_vtlspi.auto_control_xing_in_a_bits_data(a_bits_data); + i_vtlspi.auto_control_xing_in_a_bits_opcode(a_bits_opcode); + i_vtlspi.auto_control_xing_in_a_bits_param(a_bits_param); + i_vtlspi.auto_control_xing_in_a_bits_size(a_bits_size); + i_vtlspi.auto_control_xing_in_a_bits_source(a_bits_source); + i_vtlspi.auto_control_xing_in_a_bits_mask(a_bits_mask); + i_vtlspi.auto_control_xing_in_a_bits_corrupt(a_bits_corrupt); + i_vtlspi.auto_control_xing_in_d_ready(d_ready); + i_vtlspi.auto_control_xing_in_d_valid(d_valid); + i_vtlspi.auto_control_xing_in_d_bits_data(d_bits_data); + i_vtlspi.auto_control_xing_in_d_bits_opcode(d_bits_opcode); + i_vtlspi.auto_control_xing_in_d_bits_size(d_bits_size); + i_vtlspi.auto_control_xing_in_d_bits_source(d_bits_source); + i_vtlspi.auto_io_out_sck(sck); + i_vtlspi.auto_io_out_dq_0_i(dq_0_i); + i_vtlspi.auto_io_out_dq_0_o(dq_0_o); + i_vtlspi.auto_io_out_dq_0_oe(dq_0_oe); + i_vtlspi.auto_io_out_dq_1_i(dq_1_i); + i_vtlspi.auto_io_out_dq_1_o(dq_1_o); + i_vtlspi.auto_io_out_dq_1_oe(dq_1_oe); + i_vtlspi.auto_io_out_dq_2_i(dq_2_i); + i_vtlspi.auto_io_out_dq_3_i(dq_3_i); + i_vtlspi.auto_io_out_cs_0(cs_0); + i_vtlspi.auto_io_out_cs_2(cs_2); + i_vtlspi.auto_io_out_cs_3(cs_3); + + i_tlbfm.clock(clock); + i_tlbfm.reset(rst_i); + spi::socket(i_tlbfm.socket); + i_tlbfm.a_ready(a_ready); + i_tlbfm.a_valid(a_valid); + i_tlbfm.a_bits_address(a_bits_address); + i_tlbfm.a_bits_data(a_bits_data); + i_tlbfm.d_bits_data(d_bits_data); + i_tlbfm.a_bits_opcode(a_bits_opcode); + i_tlbfm.a_bits_param(a_bits_param); + i_tlbfm.a_bits_size(a_bits_size); + i_tlbfm.a_bits_source(a_bits_source); + i_tlbfm.a_bits_mask(a_bits_mask); + i_tlbfm.a_bits_corrupt(a_bits_corrupt); + i_tlbfm.d_ready(d_ready); + i_tlbfm.d_valid(d_valid); + i_tlbfm.d_bits_opcode(d_bits_opcode); + i_tlbfm.d_bits_size(d_bits_size); + i_tlbfm.d_bits_source(d_bits_source); + + i_time2tick.clk_i(clk_i); + i_time2tick.clk_o(clock); + i_sck_conv.s_i(sck); + i_sck_conv.t_o(sck_o); + i_mosi_conv.s_i(dq_0_o); + i_mosi_conv.t_o(mosi_o); + miso_i(i_miso_conv.t_i); + i_miso_conv.s_o(dq_0_i); + i_scs0_conv.s_i(cs_0); + i_scs0_conv.t_o(scs_o[0]); + i_scs2_conv.s_i(cs_2); + i_scs2_conv.t_o(scs_o[2]); + scs_1(scs_o[1]); // dummy to drive port + i_scs3_conv.s_i(cs_3); + i_scs3_conv.t_o(scs_o[3]); +} + +rtl::~rtl() = default; +} + +template <> std::unique_ptr spi::create(sc_core::sc_module_name nm) { + auto *res = new sysc::spi_impl::rtl(nm); + return std::unique_ptr(res); +} + +} /* namespace sysc */ diff --git a/platform/src/rtl/tl_uh_bfm.cpp b/platform/src/rtl/tl_uh_bfm.cpp new file mode 100644 index 0000000..f4bae60 --- /dev/null +++ b/platform/src/rtl/tl_uh_bfm.cpp @@ -0,0 +1,142 @@ +/******************************************************************************* + * Copyright (C) 2018 MINRES Technologies GmbH + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + *******************************************************************************/ + +#include "sysc/rtl/tl_uh_bfm.h" + +#include +#include + +namespace sysc { + +using namespace sc_core; + +tl_uh_bfm::tl_uh_bfm(sc_module_name nm, int64_t offset) +: sc_module(nm) +, offset(offset) +, NAMED(socket) +, NAMED(clock) +, NAMED(reset) +, NAMED(a_bits_address) +, NAMED(a_bits_data) +, NAMED(a_ready) +, NAMED(a_valid) +, NAMED(a_bits_opcode) +, NAMED(a_bits_param) +, NAMED(a_bits_size) +, NAMED(a_bits_source) +, NAMED(a_bits_mask) +, NAMED(a_bits_corrupt) +, NAMED(d_bits_data) +, NAMED(d_ready) +, NAMED(d_valid) +, NAMED(d_bits_opcode) +, NAMED(d_bits_size) +, NAMED(d_bits_source) +, NAMED(fw_queue) { + socket.register_nb_transport_fw( + [this](tlm::tlm_generic_payload &gp, tlm::tlm_phase &phase, sc_core::sc_time &delay) -> tlm::tlm_sync_enum { + if (phase == tlm::BEGIN_REQ && gp.get_command() != tlm::TLM_IGNORE_COMMAND) { + gp.acquire(); + fw_queue.notify(gp, delay); + return tlm::TLM_ACCEPTED; + } else if (phase == tlm::END_RESP) { + gp.release(); + d_ready = true; + } + }); + + SC_METHOD(tl_response_method); + sensitive << clock.pos(); + SC_THREAD(fw_thread); +} + +tl_uh_bfm::~tl_uh_bfm() = default; + +void tl_uh_bfm::fw_thread() { + d_ready = true; + while (true) { + a_valid = false; + wait(fw_queue.get_event()); + auto gp = fw_queue.get_next_transaction(); + if (gp->get_data_length() == 4) { + auto addr = gp->get_address() + offset; + a_bits_address = addr; + a_valid = true; + a_bits_param = 0; + a_bits_size = 2; // 2^2 bytes + a_bits_source = 0x55; + a_bits_mask = 0xf; + a_bits_corrupt = false; + if (gp->get_command() == tlm::TLM_WRITE_COMMAND) { + a_bits_opcode = PutFullData; + a_bits_data = *(uint32_t *)gp->get_data_ptr(); + } else { + a_bits_opcode = Get; + a_bits_data = 0; + } + tl_in_progress.push_back(gp); + do { + wait(clock.posedge_event()); + } while (a_ready == false); + } else + SCCERR("tlbfm") << "Got transaction with unequal length"; + } +} + +void tl_uh_bfm::tl_response_method() { + if (d_valid && d_ready) { + // if(d_bits_source==0x55){ // this is ours + auto gp = tl_in_progress.front(); + sc_assert(gp && "Got TL response without a request in queue"); + tl_in_progress.pop_front(); + if (gp->get_command() == tlm::TLM_WRITE_COMMAND) { + sc_assert(d_bits_opcode == AccessAck && + "TL did not respond with AccessAck to write request"); + } else { + sc_assert(d_bits_opcode == AccessAckData && + "TL did not respond with AccessAckData to read request"); + *(uint32_t *)(gp->get_data_ptr()) = d_bits_data; + } + gp->set_response_status(tlm::TLM_OK_RESPONSE); + sc_core::sc_time delay; + tlm::tlm_phase phase{tlm::BEGIN_RESP}; + auto ret = socket->nb_transport_bw(*gp, phase, delay); + if (ret == tlm::TLM_COMPLETED || (ret == tlm::TLM_UPDATED && phase == tlm::END_RESP)) { + d_ready = true; + gp->release(); + } else + d_ready = false; + // } + } +} + +} /* namespace sysc */ diff --git a/platform/src/sc_main.cpp b/platform/src/sc_main.cpp index 39ae349..4e3c833 100644 --- a/platform/src/sc_main.cpp +++ b/platform/src/sc_main.cpp @@ -50,6 +50,15 @@ #endif #include #include +#ifdef HAS_VERILATOR +#include +inline void configure_verilator() { + Verilated::commandArgs(sc_core::sc_argc(), const_cast(sc_core::sc_argv())); +} +#else +inline void configure_verilator() {} +#endif +const std::string core_path{"i_system.i_hifive1.i_fe310.i_core_complex"}; using namespace sc_core; using namespace sysc; @@ -67,6 +76,10 @@ int sc_main(int argc, char *argv[]) { /////////////////////////////////////////////////////////////////////////// sc_report_handler::set_actions(SC_ID_MORE_THAN_ONE_SIGNAL_DRIVER_, SC_DO_NOTHING); /////////////////////////////////////////////////////////////////////////// + // Setup verilator infrastructure (if used) + /////////////////////////////////////////////////////////////////////////// + configure_verilator(); + /////////////////////////////////////////////////////////////////////////// // CLI argument parsing & logging setup /////////////////////////////////////////////////////////////////////////// CLIParser parser(argc, argv); diff --git a/platform/src/sysc/hifive1.cpp b/platform/src/sysc/hifive1.cpp index 280f61e..7b2b990 100644 --- a/platform/src/sysc/hifive1.cpp +++ b/platform/src/sysc/hifive1.cpp @@ -89,21 +89,27 @@ BOOST_PP_REPEAT(8, PORT_NAMING, _) // proxy callbacks h_bridge[0].register_nb_transport([this](tlm::tlm_signal_gp &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum { ha_o.write(gp.get_value()); + return tlm::TLM_ACCEPTED; }); h_bridge[1].register_nb_transport([this](tlm::tlm_signal_gp &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum { la_o.write(gp.get_value()); + return tlm::TLM_ACCEPTED; }); h_bridge[2].register_nb_transport([this](tlm::tlm_signal_gp &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum { hb_o.write(gp.get_value()); + return tlm::TLM_ACCEPTED; }); h_bridge[3].register_nb_transport([this](tlm::tlm_signal_gp &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum { lb_o.write(gp.get_value()); + return tlm::TLM_ACCEPTED; }); h_bridge[4].register_nb_transport([this](tlm::tlm_signal_gp &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum { hc_o.write(gp.get_value()); + return tlm::TLM_ACCEPTED; }); h_bridge[5].register_nb_transport([this](tlm::tlm_signal_gp &gp, tlm::tlm_phase &phase, sc_time &delay) -> tlm::tlm_sync_enum { lc_o.write(gp.get_value()); + return tlm::TLM_ACCEPTED; });