158 lines
5.3 KiB
C++
158 lines
5.3 KiB
C++
////////////////////////////////////////////////////////////////////////////////
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// Copyright (C) 2017, MINRES Technologies GmbH
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its contributors
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// may be used to endorse or promote products derived from this software
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// without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// Created on: Sun Sep 17 23:56:50 CEST 2017
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// * gpio_regs.h Author: <RDL Generator>
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//
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////////////////////////////////////////////////////////////////////////////////
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#ifndef _GPIO_REGS_H_
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#define _GPIO_REGS_H_
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#include <util/bit_field.h>
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#include <sysc/register.h>
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#include <sysc/tlmtarget.h>
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#include <sysc/utilities.h>
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namespace sysc {
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template<unsigned BUSWIDTH=32>
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class gpio_regs :
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public sc_core::sc_module,
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public sysc::tlm_target<BUSWIDTH>,
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public sysc::resetable
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{
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protected:
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// storage declarations
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uint32_t r_value;
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uint32_t r_input_en;
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uint32_t r_output_en;
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uint32_t r_port;
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uint32_t r_pue;
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uint32_t r_ds;
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uint32_t r_rise_ie;
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uint32_t r_rise_ip;
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uint32_t r_fall_ie;
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uint32_t r_fall_ip;
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uint32_t r_high_ie;
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uint32_t r_high_ip;
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uint32_t r_low_ie;
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uint32_t r_low_ip;
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uint32_t r_iof_en;
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uint32_t r_iof_sel;
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uint32_t r_out_xor;
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// register declarations
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sysc::sc_register<uint32_t> value;
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sysc::sc_register<uint32_t> input_en;
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sysc::sc_register<uint32_t> output_en;
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sysc::sc_register<uint32_t> port;
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sysc::sc_register<uint32_t> pue;
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sysc::sc_register<uint32_t> ds;
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sysc::sc_register<uint32_t> rise_ie;
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sysc::sc_register<uint32_t> rise_ip;
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sysc::sc_register<uint32_t> fall_ie;
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sysc::sc_register<uint32_t> fall_ip;
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sysc::sc_register<uint32_t> high_ie;
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sysc::sc_register<uint32_t> high_ip;
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sysc::sc_register<uint32_t> low_ie;
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sysc::sc_register<uint32_t> low_ip;
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sysc::sc_register<uint32_t> iof_en;
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sysc::sc_register<uint32_t> iof_sel;
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sysc::sc_register<uint32_t> out_xor;
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gpio_regs(sc_core::sc_module_name nm);
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protected:
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sc_core::sc_time clk;
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};
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//////////////////////////////////////////////////////////////////////////////
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// member functions
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//////////////////////////////////////////////////////////////////////////////
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template<unsigned BUSWIDTH>
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gpio_regs<BUSWIDTH>::gpio_regs(sc_core::sc_module_name nm)
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: sc_core::sc_module(nm)
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, sysc::tlm_target<BUSWIDTH>(clk)
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, NAMED(value, r_value, 0, *this)
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, NAMED(input_en, r_input_en, 0, *this)
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, NAMED(output_en, r_output_en, 0, *this)
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, NAMED(port, r_port, 0, *this)
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, NAMED(pue, r_pue, 0, *this)
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, NAMED(ds, r_ds, 0, *this)
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, NAMED(rise_ie, r_rise_ie, 0, *this)
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, NAMED(rise_ip, r_rise_ip, 0, *this)
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, NAMED(fall_ie, r_fall_ie, 0, *this)
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, NAMED(fall_ip, r_fall_ip, 0, *this)
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, NAMED(high_ie, r_high_ie, 0, *this)
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, NAMED(high_ip, r_high_ip, 0, *this)
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, NAMED(low_ie, r_low_ie, 0, *this)
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, NAMED(low_ip, r_low_ip, 0, *this)
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, NAMED(iof_en, r_iof_en, 0, *this)
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, NAMED(iof_sel, r_iof_sel, 0, *this)
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, NAMED(out_xor, r_out_xor, 0, *this)
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{
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this->socket_map.addEntry(&value, 0x0UL, 0x4UL);
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this->socket_map.addEntry(&input_en, 0x4UL, 0x4UL);
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this->socket_map.addEntry(&output_en, 0x8UL, 0x4UL);
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this->socket_map.addEntry(&port, 0xcUL, 0x4UL);
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this->socket_map.addEntry(&pue, 0x10UL, 0x4UL);
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this->socket_map.addEntry(&ds, 0x14UL, 0x4UL);
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this->socket_map.addEntry(&rise_ie, 0x18UL, 0x4UL);
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this->socket_map.addEntry(&rise_ip, 0x1cUL, 0x4UL);
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this->socket_map.addEntry(&fall_ie, 0x20UL, 0x4UL);
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this->socket_map.addEntry(&fall_ip, 0x24UL, 0x4UL);
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this->socket_map.addEntry(&high_ie, 0x28UL, 0x4UL);
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this->socket_map.addEntry(&high_ip, 0x2cUL, 0x4UL);
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this->socket_map.addEntry(&low_ie, 0x30UL, 0x4UL);
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this->socket_map.addEntry(&low_ip, 0x34UL, 0x4UL);
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this->socket_map.addEntry(&iof_en, 0x38UL, 0x4UL);
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this->socket_map.addEntry(&iof_sel, 0x3cUL, 0x4UL);
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this->socket_map.addEntry(&out_xor, 0x40UL, 0x4UL);
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}
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}
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#endif // _GPIO_REGS_H_
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