SystemC-Components-Test/examples/simple_system/gen/gpio_regs.h

////////////////////////////////////////////////////////////////////////////////
// Copyright (C) 2017, MINRES Technologies GmbH
// All rights reserved.
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// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
//    this list of conditions and the following disclaimer.
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// 2. Redistributions in binary form must reproduce the above copyright notice,
//    this list of conditions and the following disclaimer in the documentation
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//    may be used to endorse or promote products derived from this software
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// POSSIBILITY OF SUCH DAMAGE.
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// Created on: Sun Sep 17 23:56:50 CEST 2017
//             *      gpio_regs.h Author: <RDL Generator>
//
////////////////////////////////////////////////////////////////////////////////

#ifndef _GPIO_REGS_H_
#define _GPIO_REGS_H_

#include <util/bit_field.h>
#include <sysc/register.h>
#include <sysc/tlmtarget.h>
#include <sysc/utilities.h>

namespace sysc {

template<unsigned BUSWIDTH=32>
class gpio_regs :
        public sc_core::sc_module,
        public sysc::tlm_target<BUSWIDTH>,
        public sysc::resetable
 {
protected:
    // storage declarations
    uint32_t r_value;
    
    uint32_t r_input_en;
    
    uint32_t r_output_en;
    
    uint32_t r_port;
    
    uint32_t r_pue;
    
    uint32_t r_ds;
    
    uint32_t r_rise_ie;
    
    uint32_t r_rise_ip;
    
    uint32_t r_fall_ie;
    
    uint32_t r_fall_ip;
    
    uint32_t r_high_ie;
    
    uint32_t r_high_ip;
    
    uint32_t r_low_ie;
    
    uint32_t r_low_ip;
    
    uint32_t r_iof_en;
    
    uint32_t r_iof_sel;
    
    uint32_t r_out_xor;
    
    // register declarations
    sysc::sc_register<uint32_t> value;
    sysc::sc_register<uint32_t> input_en;
    sysc::sc_register<uint32_t> output_en;
    sysc::sc_register<uint32_t> port;
    sysc::sc_register<uint32_t> pue;
    sysc::sc_register<uint32_t> ds;
    sysc::sc_register<uint32_t> rise_ie;
    sysc::sc_register<uint32_t> rise_ip;
    sysc::sc_register<uint32_t> fall_ie;
    sysc::sc_register<uint32_t> fall_ip;
    sysc::sc_register<uint32_t> high_ie;
    sysc::sc_register<uint32_t> high_ip;
    sysc::sc_register<uint32_t> low_ie;
    sysc::sc_register<uint32_t> low_ip;
    sysc::sc_register<uint32_t> iof_en;
    sysc::sc_register<uint32_t> iof_sel;
    sysc::sc_register<uint32_t> out_xor;
    
    gpio_regs(sc_core::sc_module_name nm);
protected:
    sc_core::sc_time clk;
};
//////////////////////////////////////////////////////////////////////////////
// member functions
//////////////////////////////////////////////////////////////////////////////

template<unsigned BUSWIDTH>
gpio_regs<BUSWIDTH>::gpio_regs(sc_core::sc_module_name nm)
: sc_core::sc_module(nm)
, sysc::tlm_target<BUSWIDTH>(clk)
, NAMED(value, r_value, 0, *this)
, NAMED(input_en, r_input_en, 0, *this)
, NAMED(output_en, r_output_en, 0, *this)
, NAMED(port, r_port, 0, *this)
, NAMED(pue, r_pue, 0, *this)
, NAMED(ds, r_ds, 0, *this)
, NAMED(rise_ie, r_rise_ie, 0, *this)
, NAMED(rise_ip, r_rise_ip, 0, *this)
, NAMED(fall_ie, r_fall_ie, 0, *this)
, NAMED(fall_ip, r_fall_ip, 0, *this)
, NAMED(high_ie, r_high_ie, 0, *this)
, NAMED(high_ip, r_high_ip, 0, *this)
, NAMED(low_ie, r_low_ie, 0, *this)
, NAMED(low_ip, r_low_ip, 0, *this)
, NAMED(iof_en, r_iof_en, 0, *this)
, NAMED(iof_sel, r_iof_sel, 0, *this)
, NAMED(out_xor, r_out_xor, 0, *this)
{
    this->socket_map.addEntry(&value, 0x0UL, 0x4UL);
    this->socket_map.addEntry(&input_en, 0x4UL, 0x4UL);
    this->socket_map.addEntry(&output_en, 0x8UL, 0x4UL);
    this->socket_map.addEntry(&port, 0xcUL, 0x4UL);
    this->socket_map.addEntry(&pue, 0x10UL, 0x4UL);
    this->socket_map.addEntry(&ds, 0x14UL, 0x4UL);
    this->socket_map.addEntry(&rise_ie, 0x18UL, 0x4UL);
    this->socket_map.addEntry(&rise_ip, 0x1cUL, 0x4UL);
    this->socket_map.addEntry(&fall_ie, 0x20UL, 0x4UL);
    this->socket_map.addEntry(&fall_ip, 0x24UL, 0x4UL);
    this->socket_map.addEntry(&high_ie, 0x28UL, 0x4UL);
    this->socket_map.addEntry(&high_ip, 0x2cUL, 0x4UL);
    this->socket_map.addEntry(&low_ie, 0x30UL, 0x4UL);
    this->socket_map.addEntry(&low_ip, 0x34UL, 0x4UL);
    this->socket_map.addEntry(&iof_en, 0x38UL, 0x4UL);
    this->socket_map.addEntry(&iof_sel, 0x3cUL, 0x4UL);
    this->socket_map.addEntry(&out_xor, 0x40UL, 0x4UL);
}
 
}
#endif // _GPIO_REGS_H_