SystemC/SystemC-Components-Test
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applies clang-format

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This commit is contained in:
Eyck Jentzsch 2024-12-18 17:36:16 +01:00
parent a0bd767bc9
commit f8f1f2f54c
4 changed files with 19 additions and 25 deletions
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2
scc

@ -1 +1 @@
Subproject commit eadb9285757d639ce1acd854551c115ef84fc903
Subproject commit 5046e6e54f4dc17e9673c4d5049c55632c926fea

2
src/sc_main.cpp
View File

@ -38,7 +38,7 @@ int sc_main(int argc, char* argv[]) {
result = Catch::Session().run(argc, argv);
// destroy design(s)
sc_stop();
SCCTRACE()<<"Test sequence finished";
SCCTRACE() << "Test sequence finished";
factory::get_instance().destroy();
}
return result;

19
tests/cxs_tlm/csx_packet_test.cpp
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@ -22,7 +22,7 @@ template <unsigned WIDTH, typename STATE> unsigned run_scenario(STATE& state) {
auto run1 = sc_spawn([&dut, &state]() {
auto burst_cnt{0};
for(auto size:state.packet_sizes) {
for(auto size : state.packet_sizes) {
cxs_pkt_shared_ptr tx_pkt = cxs_pkt_mm::get().allocate();
tx_pkt->get_data().resize(size);
auto phase{tlm::nw::REQUEST};
@ -30,16 +30,16 @@ template <unsigned WIDTH, typename STATE> unsigned run_scenario(STATE& state) {
auto status = dut.isck->nb_transport_fw(*tx_pkt, phase, t);
REQUIRE(status == tlm::TLM_UPDATED);
REQUIRE(phase == tlm::nw::CONFIRM);
if(++burst_cnt==state.granularity) {
if(++burst_cnt == state.granularity) {
wait(dut.recv.data_written_event());
while(!dut.recv.empty()) {
auto recv_pkt = dut.recv.front();
dut.recv.pop_front();
REQUIRE(tx_pkt==recv_pkt);
REQUIRE(recv_pkt->get_data().size()==state.packet_sizes[state.resp_cnt]);
REQUIRE(tx_pkt == recv_pkt);
REQUIRE(recv_pkt->get_data().size() == state.packet_sizes[state.resp_cnt]);
state.resp_cnt++;
}
burst_cnt=0;
burst_cnt = 0;
}
}
});
@ -53,10 +53,8 @@ template <unsigned WIDTH, typename STATE> unsigned run_scenario(STATE& state) {
return cycles;
}
template <typename STATE>
unsigned run_scenario(int width, STATE &state)
{
switch (width) {
template <typename STATE> unsigned run_scenario(int width, STATE& state) {
switch(width) {
case 8:
case 256:
return run_scenario<256>(state);
@ -79,9 +77,8 @@ TEST_CASE("single-packet", "[CXS][tlm-level]") {
unsigned resp_cnt{0};
} state;
state.packet_sizes.assign({4, 8, 16, 32, 64, 128, 256, 1024});
for(auto width=8; width<11; ++width) {
for(auto width = 8; width < 11; ++width) {
state.resp_cnt = 0;
auto cycles = run_scenario(width, state);

21
tests/cxs_tlm/testbench.h
View File

@ -7,19 +7,18 @@
#include <scc/observer.h>
#include <scc/sc_variable.h>
#include <scc/tracer.h>
#include <tlm/nw/initiator_mixin.h>
#include <tlm/nw/target_mixin.h>
#include <string>
#include <systemc>
#include <tlm/nw/initiator_mixin.h>
#include <tlm/nw/target_mixin.h>
using namespace sc_core;
using namespace sc_dt;
using namespace std;
using namespace cxs;
const char* sc_gen_unique_name( const char*, bool preserve_first );
template<unsigned PHIT_WIDTH>
struct testbench : public sc_core::sc_module {
const char* sc_gen_unique_name(const char*, bool preserve_first);
template <unsigned PHIT_WIDTH> struct testbench : public sc_core::sc_module {
using transaction_type = cxs_packet_types::tlm_payload_type;
using phase_type = cxs_packet_types::tlm_phase_type;
@ -30,19 +29,17 @@ struct testbench : public sc_core::sc_module {
cxs_transmitter<PHIT_WIDTH> tx{"tx"};
cxs_channel<PHIT_WIDTH> cxs_chan{"cxs_chan"};
cxs_receiver<PHIT_WIDTH> rx{"rx"};
tlm::nw::target_mixin<cxs_pkt_target_socket<>,cxs_packet_types> tsck{"tsck"};
tlm::nw::target_mixin<cxs_pkt_target_socket<>, cxs_packet_types> tsck{"tsck"};
testbench()
: testbench(sc_core::sc_gen_unique_name("testbench", false)) {}
testbench(sc_core::sc_module_name const& nm)
: sc_module(nm) {
isck.register_nb_transport_bw([this](transaction_type& trans, phase_type& phase, sc_core::sc_time& t) {
return this->nb_transport_fw(trans, phase, t);
});
tsck.register_nb_transport_fw([this](transaction_type& trans, phase_type& phase, sc_core::sc_time& t) {
return this->nb_transport_fw(trans, phase, t);
});
isck.register_nb_transport_bw(
[this](transaction_type& trans, phase_type& phase, sc_core::sc_time& t) { return this->nb_transport_fw(trans, phase, t); });
tsck.register_nb_transport_fw(
[this](transaction_type& trans, phase_type& phase, sc_core::sc_time& t) { return this->nb_transport_fw(trans, phase, t); });
isck(tx.tsck);
tx.clk_i(clk);
tx.isck(cxs_chan.tsck);