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SystemC-Components-Test
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Merge remote-tracking branch 'origin/main' into develop

This commit is contained in:
Eyck Jentzsch 2023-12-22 22:13:38 +01:00
parent 5b5feb51f5 c445c1cda1
commit cd6100bd47
4 changed files with 249 additions and 48 deletions
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123
Jenkinsfile vendored
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@ -1,62 +1,91 @@
void checkout_project() {
checkout([
$class: 'GitSCM',
branches: [
[name: 'refs/heads/' + getBranch()]
],
extensions: [
[$class: 'CleanBeforeCheckout'],
[$class: 'SubmoduleOption',
disableSubmodules: false,
recursiveSubmodules: true,
trackingSubmodules: false,
parentCredentials: true,
shallow: true
]
],
submoduleCfg: [],
userRemoteConfigs: [
[credentialsId: 'gitea-jenkins', url: 'https://git.minres.com/SystemC/SystemC-Components-Test.git']
]
])
}
void setup_conan() {
sh'''
pip3 install "conan<2.0" pyucis
conan profile new default --detect --force
conan remote list | grep minres > /dev/null
[ $? ] || conan remote add minres https://git.minres.com/api/packages/Tooling/conan
'''
}
void build_n_test_project() {
sh'''
cmake -S . -B build
cmake --build build -j12
cmake --build build --target test
cmake --build build --target format-check
'''
}
pipeline {
agent any
options {
agent none
options {
// using the Timestamper plugin we can add timestamps to the console log
timestamps()
skipStagesAfterUnstable()
timestamps()
skipStagesAfterUnstable()
}
stages {
stage('SCC test pipeline') {
agent {docker {
image 'ubuntu-riscv'
} }
stages {
stage('checkout') {
steps {
sh 'env'
sh 'rm -rf * .??* '
checkout([
$class: 'GitSCM',
branches: [
[name: 'refs/heads/' + getBranch()]
],
extensions: [
[$class: 'CleanBeforeCheckout'],
[$class: 'SubmoduleOption',
disableSubmodules: false,
recursiveSubmodules: true,
trackingSubmodules: false,
parentCredentials: true,
shallow: true
]
],
submoduleCfg: [],
userRemoteConfigs: [
[credentialsId: 'gitea-jenkins', url: 'https://git.minres.com/SystemC/SystemC-Components-Test.git']
]
])
sh '''
pip3 install "conan<2.0" pyucis
conan profile new default --detect --force
conan remote list | grep minres > /dev/null
[ $? ] || conan remote add minres https://git.minres.com/api/packages/Tooling/conan
'''
parallel {
stage('U18.04') {
agent {docker { image 'ubuntu-18.04' } }
stages {
stage('Checkout') { steps { checkout_project() }}
stage('Setup') { steps { setup_conan() }}
stage('Build & test') { steps { build_n_test_project() }}
}
}
stage('build & test') {
steps {
sh '''
cmake -S . -B build
cmake --build build -j12
cmake --build build --target test
cmake --build build --target format-check
'''
stage('U20.04') {
agent {docker { image 'ubuntu-20.04' } }
stages {
stage('Checkout') { steps { checkout_project() }}
stage('Setup') { steps { setup_conan() }}
stage('Build & test') { steps { build_n_test_project() }}
}
}
stage('COS7') {
agent {docker { image 'centos7' } }
stages {
stage('Checkout') { steps { checkout_project() }}
stage('Setup') { steps { setup_conan() }}
stage('Build & test') { steps { build_n_test_project() }}
}
}
stage('RCK8') {
agent {docker { image 'rockylinux8' } }
stages {
stage('Checkout') { steps { checkout_project() }}
stage('Setup') { steps { setup_conan() }}
stage('Build & test') { steps { build_n_test_project() }}
}
}
}
}
}
post {
success {
rocketSend ":thumbsup: SCC test run passed, results at ${env.RUN_DISPLAY_URL} "

2
Modulefile
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@ -7,7 +7,7 @@ proc ModulesHelp { } {
puts stderr "\tThis module loads PATHs and variables for SCC tests."
}
set distro [exec /bin/lsb_release -i -s]
set distro [exec /usr/bin/lsb_release -i -s]
if { $distro == "CentOS" && ![info exists ::env(PROJECT)] && ![info exists ::env(PCP_DIR)] } {
puts stderr "Don't forget to execute 'scl enable devtoolset-7 llvm-toolset-7 bash'"
}

148
examples/ahb_bfm/sc_main.cpp Normal file
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@ -0,0 +1,148 @@
#include <ahb/pin/initiator.h>
#include <ahb/pin/target.h>
#include <cci_utils/broker.h>
#include <fstream>
#include <scc/configurable_tracer.h>
#include <scc/configurer.h>
#include <scc/report.h>
#include <scc/traceable.h>
#include <scc/tracer.h>
#include <tlm/scc/initiator_mixin.h>
#include <tlm/scc/target_mixin.h>
using namespace sc_core;
using namespace scc;
class testbench : public sc_module, public scc::traceable {
public:
enum { WIDTH = 64 };
tlm::scc::initiator_mixin<tlm::tlm_initiator_socket<WIDTH>> isck{"isck"};
ahb::pin::initiator<WIDTH> intor{"intor"};
sc_core::sc_clock HCLK{"HCLK", 10_ns};
sc_core::sc_signal<bool> HRESETn{"HRESETn"};
sc_core::sc_signal<sc_dt::sc_uint<32>> HADDR{"HADDR"};
sc_core::sc_signal<sc_dt::sc_uint<3>> HBURST{"HBURST"};
sc_core::sc_signal<bool> HMASTLOCK{"HMASTLOCK"};
sc_core::sc_signal<sc_dt::sc_uint<4>> HPROT{"HPROT"};
sc_core::sc_signal<sc_dt::sc_uint<3>> HSIZE{"HSIZE"};
sc_core::sc_signal<sc_dt::sc_uint<2>> HTRANS{"HTRANS"};
sc_core::sc_signal<sc_dt::sc_uint<WIDTH>> HWDATA{"HWDATA"};
sc_core::sc_signal<bool> HWRITE{"HWRITE"};
sc_core::sc_signal<sc_dt::sc_uint<WIDTH>> HRDATA{"HRDATA"};
sc_core::sc_signal<bool> HREADY{"HREADY"};
sc_core::sc_signal<bool> HRESP{"HRESP"};
sc_core::sc_signal<bool> HSEL{"HSEL"};
ahb::pin::target<WIDTH> target{"target"};
tlm::scc::target_mixin<tlm::tlm_target_socket<WIDTH>> tsck{"tsck"};
testbench(sc_module_name nm)
: sc_module(nm) {
SC_HAS_PROCESS(testbench);
isck(intor.tsckt);
intor.HCLK_i(HCLK);
intor.HRESETn_i(HRESETn);
intor.HADDR_o(HADDR);
intor.HBURST_o(HBURST);
intor.HMASTLOCK_o(HMASTLOCK);
intor.HPROT_o(HPROT);
intor.HSIZE_o(HSIZE);
intor.HTRANS_o(HTRANS);
intor.HWDATA_o(HWDATA);
intor.HWRITE_o(HWRITE);
intor.HRDATA_i(HRDATA);
intor.HREADY_i(HREADY);
intor.HRESP_i(HRESP);
target.HCLK_i(HCLK);
target.HRESETn_i(HRESETn);
target.HADDR_i(HADDR);
target.HBURST_i(HBURST);
target.HMASTLOCK_i(HMASTLOCK);
target.HPROT_i(HPROT);
target.HSIZE_i(HSIZE);
target.HTRANS_i(HTRANS);
target.HWDATA_i(HWDATA);
target.HWRITE_i(HWRITE);
target.HSEL_i(HSEL);
target.HRDATA_o(HRDATA);
target.HREADY_o(HREADY);
target.HRESP_o(HRESP);
target.isckt(tsck);
SC_THREAD(run);
tsck.register_b_transport([this](tlm::tlm_generic_payload& gp, sc_time& delay) {
gp.set_response_status(tlm::TLM_OK_RESPONSE);
if(gp.is_write()) {
SCCINFO(SCMOD) << "Received write access to addr 0x" << std::hex << gp.get_address();
} else {
memset(gp.get_data_ptr(), 0x55, gp.get_data_length());
SCCINFO(SCMOD) << "Received read access from addr 0x" << std::hex << gp.get_address();
}
});
}
void run() {
HRESETn.write(false);
for(size_t i = 0; i < 10; ++i)
wait(HCLK.posedge_event());
HRESETn.write(true);
wait(HCLK.posedge_event());
HSEL.write(true);
tlm::tlm_generic_payload gp;
uint8_t data[8];
data[0] = 2;
data[1] = 4;
gp.set_address(0x1000);
gp.set_data_length(8);
gp.set_data_ptr(data);
gp.set_streaming_width(8);
gp.set_command(tlm::TLM_WRITE_COMMAND);
sc_time delay;
isck->b_transport(gp, delay);
gp.set_address(0x1020);
gp.set_data_length(8);
gp.set_data_ptr(data);
gp.set_streaming_width(8);
gp.set_command(tlm::TLM_READ_COMMAND);
delay = SC_ZERO_TIME;
isck->b_transport(gp, delay);
for(size_t i = 0; i < 10; ++i)
wait(HCLK.posedge_event());
sc_stop();
}
};
int sc_main(int argc, char* argv[]) {
sc_core::sc_report_handler::set_actions("/IEEE_Std_1666/deprecated", sc_core::SC_DO_NOTHING);
sc_report_handler::set_actions(SC_ID_MORE_THAN_ONE_SIGNAL_DRIVER_, SC_DO_NOTHING);
///////////////////////////////////////////////////////////////////////////
// configure logging
///////////////////////////////////////////////////////////////////////////
scc::init_logging(scc::log::DEBUG);
///////////////////////////////////////////////////////////////////////////
// set up configuration and tracing
///////////////////////////////////////////////////////////////////////////
scc::configurer cfg("ahb_bfm.json");
scc::configurable_tracer trace("ahb_bfm", tracer::TEXT, true, true);
///////////////////////////////////////////////////////////////////////////
// create modules/channels and trace
///////////////////////////////////////////////////////////////////////////
testbench tb("tb");
trace.add_control();
{
std::ofstream of{"ahb_test.default.json"};
if(of.is_open())
cfg.dump_configuration(of);
}
cfg.configure();
///////////////////////////////////////////////////////////////////////////
// run the simulation
///////////////////////////////////////////////////////////////////////////
try {
sc_core::sc_start(1_us);
if(!sc_core::sc_end_of_simulation_invoked())
sc_core::sc_stop();
} catch(sc_core::sc_report& rep) {
sc_core::sc_report_handler::get_handler()(rep, sc_core::SC_DISPLAY | sc_core::SC_STOP);
}
return 0;
}

24
tests/io-redirector/main.cpp Normal file
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@ -0,0 +1,24 @@
/*
* main.cpp
*
* Created on: 01.01.2019
* Author: eyck
*/
#include <cassert>
#include <cstdio>
#include <iostream>
#include <util/io-redirector.h>
using namespace util;
int main(int arcg, char* argv[]) {
IoRedirector::get().start();
auto result1 = IoRedirector::get().get_output();
assert(result1 == "");
printf("Some output");
std::cout << "Some other output" << std::endl;
auto result2 = IoRedirector::get().get_output();
assert(result2 == "Some outputSome other output\n");
IoRedirector::get().stop();
}