lib: utils/hsm: wake sleeping Andes harts with an IPI

An IPI wakes a hart from light sleep and, once MSIP is kept as an SMU
wakeup event, from deep sleep too. Drop the WAKEUP_CMD path and the boot
state, hart type and sleep type conditions that selected it.

Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20260728081041.2724668-6-ben717@andestech.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Ben Zong-You Xie
2026-09-01 10:46:23 +05:30
committed by Anup Patel
parent 9ceaf4738a
commit e01bd7926b
3 changed files with 9 additions and 21 deletions
@@ -36,6 +36,7 @@
#define PCS_WAKEUP_RTC_ALARM_MASK BIT(2)
#define PCS_WAKEUP_UART2_MASK BIT(9)
#define PCS_WAKEUP_MSIP_MASK BIT(29)
#define PCS_WAKEUP_MEIP_MASK BIT(31)
#define PCS0_CTL_OFFSET 0x94
#define PCSm_CTL_OFFSET(i) ((i + 3) * 0x20 + PCS0_CTL_OFFSET)
+5 -16
View File
@@ -116,20 +116,8 @@ bool atcsmu_pcs_is_sleep(u32 hartid, bool deep_sleep)
static int ae350_hart_start(u32 hartid, ulong saddr)
{
u32 hartindex = sbi_hartid_to_hartindex(hartid);
u32 sleep_type = atcsmu_get_sleep_type(hartid);
/*
* Don't send wakeup command when:
* 1) boot time
* 2) the target hart is non-sleepable 25-series hart0
* 3) light sleep
*/
if (!sbi_init_count(hartindex) || (is_andes(25) && hartid == 0) ||
sleep_type == SBI_SUSP_AE350_LIGHT_SLEEP)
return sbi_ipi_raw_send(hartindex, false);
atcsmu_set_command(WAKEUP_CMD, hartid);
return 0;
return sbi_ipi_raw_send(hartindex, false);
}
static int ae350_hart_stop(void)
@@ -152,12 +140,13 @@ static int ae350_hart_stop(void)
/* Prevent the core leaving the WFI mode unexpectedly */
csr_write(CSR_MIE, 0);
atcsmu_set_wakeup_events(PCS_WAKEUP_MSIP_MASK | PCS_WAKEUP_MEIP_MASK, hartid);
if (sleep_type == SBI_SUSP_AE350_LIGHT_SLEEP) {
csr_write(CSR_MIE, MIP_MSIP);
atcsmu_set_wakeup_events(PCS_WAKEUP_MSIP_MASK, hartid);
/* Clock-gated only: needs MSI or MEI set to resume past the WFI */
csr_set(CSR_MIE, MIP_MSIP | MIP_MEIP);
atcsmu_set_command(LIGHT_SLEEP_CMD, hartid);
} else if (sleep_type == SBI_SUSP_SLEEP_TYPE_SUSPEND) {
atcsmu_set_wakeup_events(0x0, hartid);
/* Power-gated: SMU wakes it via cold reset, interrupts not needed */
atcsmu_set_command(DEEP_SLEEP_CMD, hartid);
rc = atcsmu_set_reset_vector((ulong)ae350_enable_coherency_warmboot, hartid);
if (rc)
+3 -5
View File
@@ -47,11 +47,7 @@ static int ae350_system_suspend(u32 sleep_type, unsigned long addr)
/* Prevent the core leaving the WFI mode unexpectedly */
csr_write(CSR_MIE, 0);
/*
* Only allow the S-mode external interrupts (UART2 and RTC alarm) to
* wake up the primary hart
*/
csr_set(CSR_SIE, MIP_SEIP);
/* SMU wakes the primary hart on RTC alarm / UART2 */
atcsmu_set_wakeup_events(PCS_WAKEUP_RTC_ALARM_MASK | PCS_WAKEUP_UART2_MASK, hartid);
if (sleep_type == SBI_SUSP_AE350_LIGHT_SLEEP) {
@@ -59,6 +55,8 @@ static int ae350_system_suspend(u32 sleep_type, unsigned long addr)
if (rc)
return rc;
/* Clock-gated only: enable SEI to resume past the WFI */
csr_set(CSR_MIE, MIP_SEIP);
atcsmu_set_command(LIGHT_SLEEP_CMD, hartid);
} else if (sleep_type == SBI_SUSP_SLEEP_TYPE_SUSPEND) {
rc = check_secondary_harts_sleep(hartid, true);