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lib: utils/hsm: wake sleeping Andes harts with an IPI
An IPI wakes a hart from light sleep and, once MSIP is kept as an SMU wakeup event, from deep sleep too. Drop the WAKEUP_CMD path and the boot state, hart type and sleep type conditions that selected it. Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260728081041.2724668-6-ben717@andestech.com Signed-off-by: Anup Patel <anup@brainfault.org>
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committed by
Anup Patel
parent
9ceaf4738a
commit
e01bd7926b
@@ -36,6 +36,7 @@
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#define PCS_WAKEUP_RTC_ALARM_MASK BIT(2)
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#define PCS_WAKEUP_UART2_MASK BIT(9)
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#define PCS_WAKEUP_MSIP_MASK BIT(29)
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#define PCS_WAKEUP_MEIP_MASK BIT(31)
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#define PCS0_CTL_OFFSET 0x94
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#define PCSm_CTL_OFFSET(i) ((i + 3) * 0x20 + PCS0_CTL_OFFSET)
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@@ -116,20 +116,8 @@ bool atcsmu_pcs_is_sleep(u32 hartid, bool deep_sleep)
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static int ae350_hart_start(u32 hartid, ulong saddr)
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{
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u32 hartindex = sbi_hartid_to_hartindex(hartid);
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u32 sleep_type = atcsmu_get_sleep_type(hartid);
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/*
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* Don't send wakeup command when:
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* 1) boot time
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* 2) the target hart is non-sleepable 25-series hart0
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* 3) light sleep
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*/
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if (!sbi_init_count(hartindex) || (is_andes(25) && hartid == 0) ||
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sleep_type == SBI_SUSP_AE350_LIGHT_SLEEP)
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return sbi_ipi_raw_send(hartindex, false);
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atcsmu_set_command(WAKEUP_CMD, hartid);
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return 0;
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return sbi_ipi_raw_send(hartindex, false);
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}
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static int ae350_hart_stop(void)
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@@ -152,12 +140,13 @@ static int ae350_hart_stop(void)
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/* Prevent the core leaving the WFI mode unexpectedly */
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csr_write(CSR_MIE, 0);
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atcsmu_set_wakeup_events(PCS_WAKEUP_MSIP_MASK | PCS_WAKEUP_MEIP_MASK, hartid);
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if (sleep_type == SBI_SUSP_AE350_LIGHT_SLEEP) {
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csr_write(CSR_MIE, MIP_MSIP);
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atcsmu_set_wakeup_events(PCS_WAKEUP_MSIP_MASK, hartid);
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/* Clock-gated only: needs MSI or MEI set to resume past the WFI */
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csr_set(CSR_MIE, MIP_MSIP | MIP_MEIP);
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atcsmu_set_command(LIGHT_SLEEP_CMD, hartid);
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} else if (sleep_type == SBI_SUSP_SLEEP_TYPE_SUSPEND) {
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atcsmu_set_wakeup_events(0x0, hartid);
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/* Power-gated: SMU wakes it via cold reset, interrupts not needed */
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atcsmu_set_command(DEEP_SLEEP_CMD, hartid);
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rc = atcsmu_set_reset_vector((ulong)ae350_enable_coherency_warmboot, hartid);
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if (rc)
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@@ -47,11 +47,7 @@ static int ae350_system_suspend(u32 sleep_type, unsigned long addr)
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/* Prevent the core leaving the WFI mode unexpectedly */
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csr_write(CSR_MIE, 0);
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/*
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* Only allow the S-mode external interrupts (UART2 and RTC alarm) to
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* wake up the primary hart
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*/
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csr_set(CSR_SIE, MIP_SEIP);
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/* SMU wakes the primary hart on RTC alarm / UART2 */
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atcsmu_set_wakeup_events(PCS_WAKEUP_RTC_ALARM_MASK | PCS_WAKEUP_UART2_MASK, hartid);
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if (sleep_type == SBI_SUSP_AE350_LIGHT_SLEEP) {
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@@ -59,6 +55,8 @@ static int ae350_system_suspend(u32 sleep_type, unsigned long addr)
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if (rc)
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return rc;
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/* Clock-gated only: enable SEI to resume past the WFI */
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csr_set(CSR_MIE, MIP_SEIP);
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atcsmu_set_command(LIGHT_SLEEP_CMD, hartid);
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} else if (sleep_type == SBI_SUSP_SLEEP_TYPE_SUSPEND) {
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rc = check_secondary_harts_sleep(hartid, true);
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