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lib: sbi_pmu: Add FW counter index validation when reading high bits on RV64

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Currently, when we attempt to read the upper 32 bits of a firmware
counter on RV64 or higher, we just set `sbiret.value` to 0 without
validating the counter index. The SBI specification requires us to set
`sbiret.error` to `SBI_ERR_INVALID_PARAM` if the counter index points to
a hardware counter or an invalid counter. Add a validation check to
ensure compliance with the specification on RV64 or higher.

Fixes: 51951d9e9a ("lib: sbi_pmu: Implement sbi_pmu_counter_fw_read_hi")
Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20260125090643.190748-1-jamestiotio@gmail.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
James Raphael Tiovalen
2026-01-25 17:06:43 +08:00
committed by Anup Patel
parent a95c36f165
commit 9656943bd3
3 changed files with 12 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
include/sbi/sbi_pmu.h
View File

@@ -136,7 +136,7 @@ int sbi_pmu_add_hw_event_counter_map(u32 eidx_start, u32 eidx_end, u32 cmap);
int sbi_pmu_add_raw_event_counter_map(uint64_t select, uint64_t select_mask, u32 cmap);
int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval);
int sbi_pmu_ctr_fw_read(unsigned long cidx, uint64_t *cval, bool high_bits);
int sbi_pmu_ctr_stop(unsigned long cidx_base, unsigned long cidx_mask,
unsigned long flag);

4
lib/sbi/sbi_ecall_pmu.c
View File

@@ -50,12 +50,12 @@ static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
break;
case SBI_EXT_PMU_COUNTER_FW_READ:
ret = sbi_pmu_ctr_fw_read(regs->a0, &temp);
ret = sbi_pmu_ctr_fw_read(regs->a0, &temp, false);
out->value = temp;
break;
case SBI_EXT_PMU_COUNTER_FW_READ_HI:
ret = sbi_pmu_ctr_fw_read(regs->a0, &temp, true);
#if __riscv_xlen == 32
ret = sbi_pmu_ctr_fw_read(regs->a0, &temp);
out->value = temp >> 32;
#else
out->value = 0;

10
lib/sbi/sbi_pmu.c
View File

@@ -227,7 +227,7 @@ static bool pmu_ctr_idx_validate(unsigned long cbase, unsigned long cmask)
return cmask && cbase + sbi_fls(cmask) < total_ctrs;
}
int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval)
int sbi_pmu_ctr_fw_read(unsigned long cidx, uint64_t *cval, bool high_bits)
{
int event_idx_type;
uint32_t event_code;
@@ -236,6 +236,14 @@ int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval)
if (unlikely(!phs))
return SBI_EINVAL;
if (cidx < num_hw_ctrs || cidx >= total_ctrs)
return SBI_EINVAL;
#if __riscv_xlen > 32
if (high_bits)
return 0;
#endif
event_idx_type = pmu_ctr_validate(phs, cidx, &event_code);
if (event_idx_type != SBI_PMU_EVENT_TYPE_FW)
return SBI_EINVAL;