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https://github.com/Minres/RISCV-VP.git
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adds 2GB DRAM and changes addr map
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2
scc
2
scc
Submodule scc updated: 2d5b268615...9fca1a7895
@@ -29,7 +29,7 @@ using namespace vpvper::minres;
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system::system(sc_core::sc_module_name nm)
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: sc_core::sc_module(nm)
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, NAMED(ahb_router, 5, 2)
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, NAMED(ahb_router, 6, 2)
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, NAMED(apbBridge, PipelinedMemoryBusToApbBridge_map.size(), 1) {
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mtime_clk = (1.0 / 32768) * 1_sec;
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@@ -39,11 +39,12 @@ system::system(sc_core::sc_module_name nm)
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core_complex.mtime_i(mtime_s);
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core_complex.clint_irq_i(clint_int_s);
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ahb_router.bind_target(mem_ram.target, 1, 0x00000000, 128_kB);
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ahb_router.bind_target(apbBridge.target[0], 2, 0x10000000, 128_MB);
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ahb_router.bind_target(eth0.socket, 3, 0x18000000, 4_KiB);
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ahb_router.bind_target(eth1.socket, 4, 0x18001000, 4_KiB);
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ahb_router.bind_target(qspi.xip_sck, 0, 0x20000000, 16_MB);
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ahb_router.bind_target(mem_dram.target, 0, 0x00000000, mem_dram.getSize());
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ahb_router.bind_target(mem_ram.target, 1, 0xE0000000, mem_ram.getSize());
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ahb_router.bind_target(apbBridge.target[0], 2, 0xF0000000, 16_MB);
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ahb_router.bind_target(eth0.socket, 3, 0xF1000000, 4_KiB);
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ahb_router.bind_target(eth1.socket, 4, 0xF1001000, 4_KiB);
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ahb_router.bind_target(qspi.xip_sck, 5, 0xF2000000, 16_MB);
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size_t i = 0;
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for(const auto& e : PipelinedMemoryBusToApbBridge_map) {
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apbBridge.initiator.at(i)(e.target);
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@@ -66,6 +66,7 @@ private:
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vpvper::minres::ethmac_tl eth1{"eth1"};
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scc::memory<128_kB, scc::LT> mem_ram{"mem_ram"};
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scc::memory<2_GB, scc::LT> mem_dram{"mem_dram"};
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scc::memory<8_kB, scc::LT> boot_rom{"boot_rom"};
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sc_core::sc_signal<sc_core::sc_time> mtime_clk{"mtime_clk"};
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