updates README.md, FW, some names and does some cleanup

This commit is contained in:
2024-06-30 20:22:19 +02:00
parent 15144ca608
commit c15fd95d4c
16 changed files with 81 additions and 153 deletions

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@@ -12,7 +12,7 @@
</extensions> </extensions>
</storageModule> </storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0"> <storageModule moduleId="cdtBuildSystem" version="4.0.0">
<configuration artifactName="${ProjName}" buildProperties="" description="" id="cdt.managedbuild.toolchain.gnu.base.1730410661" name="Debug" optionalBuildProperties="org.eclipse.cdt.docker.launcher.containerbuild.property.volumes=,org.eclipse.cdt.docker.launcher.containerbuild.property.selectedvolumes=" parent="org.eclipse.cdt.build.core.emptycfg"> <configuration artifactName="${ProjName}" buildProperties="" description="" id="cdt.managedbuild.toolchain.gnu.base.1730410661" name="Debug" optionalBuildProperties="org.eclipse.cdt.docker.launcher.containerbuild.property.selectedvolumes=,org.eclipse.cdt.docker.launcher.containerbuild.property.volumes=" parent="org.eclipse.cdt.build.core.emptycfg">
<folderInfo id="cdt.managedbuild.toolchain.gnu.base.1730410661.218663890" name="/" resourcePath=""> <folderInfo id="cdt.managedbuild.toolchain.gnu.base.1730410661.218663890" name="/" resourcePath="">
<toolChain id="cdt.managedbuild.toolchain.gnu.base.953157788" name="Linux GCC" superClass="cdt.managedbuild.toolchain.gnu.base"> <toolChain id="cdt.managedbuild.toolchain.gnu.base.953157788" name="Linux GCC" superClass="cdt.managedbuild.toolchain.gnu.base">
<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.GNU_ELF" id="cdt.managedbuild.target.gnu.platform.base.1034252621" name="Debug Platform" osList="linux,hpux,aix,qnx" superClass="cdt.managedbuild.target.gnu.platform.base"/> <targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.GNU_ELF" id="cdt.managedbuild.target.gnu.platform.base.1034252621" name="Debug Platform" osList="linux,hpux,aix,qnx" superClass="cdt.managedbuild.target.gnu.platform.base"/>
@@ -99,11 +99,12 @@
<def name="BUILD_SHARED_LIBS" type="STRING" val="ON"/> <def name="BUILD_SHARED_LIBS" type="STRING" val="ON"/>
</defs> </defs>
</storageModule> </storageModule>
<storageModule buildDir="build/${ConfigName}" dirtyTs="1719761878745" moduleId="de.marw.cmake4eclipse.mbs.settings"> <storageModule buildDir="build/${ConfigName}" dirtyTs="1719771199774" moduleId="de.marw.cmake4eclipse.mbs.settings">
<options otherArguments="--preset Release"/> <options otherArguments="--preset Release"/>
<defs> <defs>
<def name="FW_BUILD" type="BOOL" val="ON"/> <def name="FW_BUILD" type="BOOL" val="ON"/>
<def name="WITH_LLVM" type="BOOL" val="OFF"/> <def name="WITH_LLVM" type="BOOL" val="OFF"/>
<def name="BUILD_SHARED_LIBS" type="BOOL" val="ON"/>
</defs> </defs>
</storageModule> </storageModule>
</cconfiguration> </cconfiguration>

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@@ -9,10 +9,10 @@ tasks:
python3 -m venv /workspace/venv python3 -m venv /workspace/venv
python3 -m pip install --upgrade pip python3 -m pip install --upgrade pip
source /workspace/venv/bin/activate source /workspace/venv/bin/activate
pip install 'conan<2.0' pip install conan
command: | command: |
source /workspace/venv/bin/activate source /workspace/venv/bin/activate
cmake -B build -DCMAKE_BUILD_TYPE=Release -DBUILD_SHARED_LIBS=ON cmake -B build --preset=Release -DBUILD_SHARED_LIBS=ON
cmake --build build cmake --build build
vscode: vscode:
extensions: extensions:

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@@ -84,6 +84,6 @@ if(FW_BUILD)
if(NOT riscvfw_POPULATED) if(NOT riscvfw_POPULATED)
FetchContent_Populate(riscvfw) FetchContent_Populate(riscvfw)
endif() endif()
set(BOARD tgc_vp) set(BOARD ehrenberg)
add_subdirectory(${riscvfw_SOURCE_DIR}) add_subdirectory(${riscvfw_SOURCE_DIR})
endif() endif()

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@@ -1,5 +1,6 @@
# TGC-VP # RISCV-VP
The Scale4Edge ecosystem VP using VP-VIBES peripherals.
A RISC-V VP using VP-VIBES peripherals.
This VP is based in MINRES TGC series cores and uses CoreDSL to generate the concrete ISS This VP is based in MINRES TGC series cores and uses CoreDSL to generate the concrete ISS
of a particular ISA + extensions. The generator approach makes it very flexible and adaptable. of a particular ISA + extensions. The generator approach makes it very flexible and adaptable.
@@ -8,7 +9,7 @@ provides a comprehensive and consistent solution to develop processor cores.
## Ultra Quick start ## Ultra Quick start
Using gitpod you can run the VP in the cloud. Just visit [Gitpod.io](https://www.gitpod.io/#https://github.com/Minres/TGC-VP/tree/develop) Using gitpod you can run the VP in the cloud. Just visit [Gitpod.io](https://www.gitpod.io/#https://github.com/Minres/RISCV-VP/tree/develop)
and follow the instructions. After the build finished you can run and follow the instructions. After the build finished you can run
``` ```
@@ -31,96 +32,29 @@ You will see on console the prints of the hello world firmware at fw/hello-world
[![Open in Gitpod](https://gitpod.io/button/open-in-gitpod.svg)](https://gitpod.io/#https://github.com/Minres/TGC-VP) [![Open in Gitpod](https://gitpod.io/button/open-in-gitpod.svg)](https://gitpod.io/#https://github.com/Minres/TGC-VP)
## Quick start ## Build instructions for Linux
* you need to have a C++14 capable compiler, make, python, and cmake installed You need to have a C++17 capable compiler, make or Ninja, Python 3, and CMake installed.
* install conan.io (see also http://docs.conan.io/en/latest/installation.html): To install conan.io version 2.0 and above (see also http://docs.conan.io/en/latest/installation.html) execute the following:
``` ```
python3 -m venv .venv
pip3 install --user conan . .venv/bin/activate
pip3 install conan
conan profile new default --detect
``` ```
It is advised to use conan version 1.36 or newer. In case of an older version please run Building the VP is as simple as:
```sh
pip3 install --user --upgrade conan
``` ```
cmake -S . -B build/Release --preset Release && cmake --build build/Release -j24
Installing conan for the first time you need to create a profile:
``` ```
conan profile create default --detect Building a debug version is analogous:
``` ```
cmake -S . -B build/Debug --preset Debug && cmake --build build/Debug -j24
* checkout source from git
```sh
git clone --recursive -b develop https://github.com/Minres/TGC-VP.git
``` ```
* start an out-of-source build: To build some firmware you need to install a RISC-V toolchain like https://github.com/riscv/riscv-tools.
```
cd TGC-VP
mkdir build
cd build
cmake ..
make -j tgc-vp
```
* run the VP with pre-built firmware
```
ctest
```
or
```
src/tgc-vp -f ../fw/hello-world/prebuild/hello.elf
```
To rebuild the firmware you need to install a RISC-V toolchain like https://github.com/riscv/riscv-tools.
# Windows/Visual Studio build
TGC-VP supports VS2019/MSVC 16 and has been tested only with this version
## Prerequisites
You need to have to following installed:
* Visual Studio 2019 (community edition is sufficient) with C/C++ support
* Python 3.6 or newer
* SystemC 2.3.3 and SystemC-CCI 1.0.0. Both should be installed into the same location and the
environment variable SYSTEMC_HOME should point to it
* Conan (https://conan.io/) version 1.36 or newer. If python is installed this can be installed using pip
(see above in [Quick start](#quick-start))
## build step
Create a project at the location of the git workarea. This can be done
```
devenv <path to checkout>
```
The build steps are as described in the VS documentation for CMake based projects.

1
fw/.gitignore vendored Normal file
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@@ -0,0 +1 @@
/fir

3
fw/hello-world/.gitignore vendored Normal file
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@@ -0,0 +1,3 @@
/hello
/hello.dis
/firmware.map

17
fw/hello-world/Makefile Normal file
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@@ -0,0 +1,17 @@
TARGET = hello
C_SRCS = $(wildcard *.c)
HEADERS = $(wildcard *.h)
CFLAGS += -O0 -g
BOARD=tgc_vp
LINK_TARGET=link
RISCV_ARCH:=rv32imc
RISCV_ABI:=ilp32
LDFLAGS := -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI)
compiler := $(shell which riscv32-unknown-elf-gcc)
TOOL_DIR=$(dir $(compiler))
BSP_BASE = ../bsp
include $(BSP_BASE)/env/common-gcc.mk

24
fw/hello-world/hello.c Normal file
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@@ -0,0 +1,24 @@
#include <stdint.h>
#include <stdio.h>
#include <unistd.h>
#include <platform.h>
#include "encoding.h"
int factorial(int i){
volatile int result = 1;
for (int ii = 1; ii <= i; ii++) {
result = result * ii;
}
return result;
}
int main()
{
volatile int result = factorial (10);
printf("Factorial is %d\n", result);
printf("End of execution");
return 0;
}

BIN
fw/hello-world/prebuilt/hello.elf Executable file

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@@ -83,7 +83,7 @@ void CLIParser::build() {
"enable gdb server and specify port to use") "enable gdb server and specify port to use")
("backend", po::value<std::string>()->default_value("interp"), ("backend", po::value<std::string>()->default_value("interp"),
"the ISS backend to use, options are: interp, tcc") "the ISS backend to use, options are: interp, tcc")
("isa", po::value<std::string>()->default_value("tgc5c"), ("isa", po::value<std::string>()->default_value("rv32imac"),
"core or isa name to use for simulation, use '?' to get list") "core or isa name to use for simulation, use '?' to get list")
("dump-ir", ("dump-ir",
"dump the intermediate representation") "dump the intermediate representation")

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@@ -10,12 +10,12 @@
#pragma once #pragma once
// need double braces, see https://stackoverflow.com/questions/6893700/how-to-construct-stdarray-object-with-initializer-list#6894191 // need double braces, see https://stackoverflow.com/questions/6893700/how-to-construct-stdarray-object-with-initializer-list#6894191
const std::array<scc::target_memory_map_entry<scc::LT>, 6> PipelinedMemoryBusToApbBridge_map = {{ const std::array<scc::target_memory_map_entry<scc::LT>, 7> PipelinedMemoryBusToApbBridge_map = {{
{ gpio0.socket, 0x0, 0xc }, { gpio0.socket, 0x0, 0xc },
{ uart0.socket, 0x1000, 0x14 }, { uart0.socket, 0x1000, 0x14 },
{ timer0.socket, 0x20000, 0x1c }, { timer0.socket, 0x20000, 0x1c },
{ aclint.socket, 0x30000, 0xc000 }, { aclint.socket, 0x30000, 0xc000 },
{ irq_ctrl.socket, 0x40000, 0x8 }, { irq_ctrl.socket, 0x40000, 0x8 },
{ qspi.socket, 0x50000, 0x5c }, { qspi.socket, 0x50000, 0x5c },
//{ bootloader.socket, 0x80000, 0x400 }, { boot_rom.target, 0x80000, 0x2000 },
}} ; }} ;

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@@ -1,26 +0,0 @@
/*
* Copyright (c) 2019 -2021 MINRES Technolgies GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _PLATFORM_MMAP_H_
#define _PLATFORM_MMAP_H_
// need double braces, see
// https://stackoverflow.com/questions/6893700/how-to-construct-stdarray-object-with-initializer-list#6894191
const std::array<scc::target_memory_map_entry<scc::LT>, 13> platfrom_mmap = {{
{clint.socket, 0x2000000, 0xc000},
{plic.socket, 0xc000000, 0x200008},
{aon.socket, 0x10000000, 0x150},
{prci.socket, 0x10008000, 0x14},
{gpio0.socket, 0x10012000, 0x44},
{uart0.socket, 0x10013000, 0x1c},
{qspi0.socket, 0x10014000, 0x78},
{pwm0.socket, 0x10015000, 0x30},
{uart1.socket, 0x10023000, 0x1c},
{qspi1.socket, 0x10024000, 0x78},
{pwm1.socket, 0x10025000, 0x30},
{qspi2.socket, 0x10034000, 0x78},
{pwm2.socket, 0x10035000, 0x30},
}};
#endif /* _PLATFORM_MMAP_H_ */

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@@ -1,25 +0,0 @@
`include "gpio.rdl"
`include "uart.rdl"
`include "spi.rdl"
`include "pwm.rdl"
`include "plic.rdl"
`include "aon.rdl"
`include "prci.rdl"
`include "clint.rdl"
addrmap e300_plat_t {
lsb0;
clint_regs clint @0x02000000;
plic_regs plic @0x0C000000;
aon_regs aon @0x10000000;
prci_regs prci @0x10008000;
gpio_regs gpio0 @0x10012000;
uart_regs uart0 @0x10013000;
spi_regs qspi0 @0x10014000;
pwm_regs pwm0 @0x10015000;
uart_regs uart1 @0x10023000;
spi_regs qspi1 @0x10024000;
pwm_regs pwm1 @0x10025000;
spi_regs qspi2 @0x10034000;
pwm_regs pwm2 @0x10035000;
} e300_plat;

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@@ -13,7 +13,6 @@
namespace tgc_vp { namespace tgc_vp {
using namespace sc_core; using namespace sc_core;
using namespace vpvper::minres; using namespace vpvper::minres;
using namespace sysc::tgfs;
system::system(sc_core::sc_module_name nm) system::system(sc_core::sc_module_name nm)
: sc_core::sc_module(nm) : sc_core::sc_module(nm)

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@@ -52,7 +52,7 @@ public:
system(sc_core::sc_module_name nm); system(sc_core::sc_module_name nm);
private: private:
sysc::tgfs::core_complex core_complex{"core_complex"}; sysc::riscv_vp::core_complex core_complex{"core_complex"};
scc::router<> ahb_router, apbBridge; scc::router<> ahb_router, apbBridge;
vpvper::minres::gpio_tl gpio0{"gpio0"}; vpvper::minres::gpio_tl gpio0{"gpio0"};
vpvper::minres::uart_tl uart0{"uart0"}; vpvper::minres::uart_tl uart0{"uart0"};
@@ -61,8 +61,8 @@ private:
vpvper::minres::irq_tl irq_ctrl{"irq_ctrl"}; vpvper::minres::irq_tl irq_ctrl{"irq_ctrl"};
vpvper::minres::qspi_tl qspi{"qspi"}; vpvper::minres::qspi_tl qspi{"qspi"};
//scc::memory<1_kB, scc::LT> bootloader{"bootloader"}; scc::memory<128_kB, scc::LT> mem_ram {"mem_ram"};
scc::memory<32_kB, scc::LT> mem_ram {"mem_ram"}; scc::memory<8_kB, scc::LT> boot_rom {"boot_rom"};
sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> rst_s{"rst_s"}, mtime_int_s{"mtime_int_s"}, msip_int_s{"msip_int_s"}; sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> rst_s{"rst_s"}, mtime_int_s{"mtime_int_s"}, msip_int_s{"msip_int_s"};