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updates README.md, FW, some names and does some cleanup

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This commit is contained in:
Eyck Jentzsch
2024-06-30 20:22:19 +02:00
parent 15144ca608
commit c15fd95d4c
16 changed files with 81 additions and 153 deletions
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2
src/CLIParser.cpp
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@@ -83,7 +83,7 @@ void CLIParser::build() {
"enable gdb server and specify port to use")
("backend", po::value<std::string>()->default_value("interp"),
"the ISS backend to use, options are: interp, tcc")
("isa", po::value<std::string>()->default_value("tgc5c"),
("isa", po::value<std::string>()->default_value("rv32imac"),
"core or isa name to use for simulation, use '?' to get list")
("dump-ir",
"dump the intermediate representation")

6
src/vp/gen/PipelinedMemoryBusToApbBridge.h
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@@ -10,12 +10,12 @@
#pragma once
// need double braces, see https://stackoverflow.com/questions/6893700/how-to-construct-stdarray-object-with-initializer-list#6894191
const std::array<scc::target_memory_map_entry<scc::LT>, 6> PipelinedMemoryBusToApbBridge_map = {{
const std::array<scc::target_memory_map_entry<scc::LT>, 7> PipelinedMemoryBusToApbBridge_map = {{
{ gpio0.socket, 0x0, 0xc },
{ uart0.socket, 0x1000, 0x14 },
{ timer0.socket, 0x20000, 0x1c },
{ aclint.socket, 0x30000, 0xc000 },
{ irq_ctrl.socket, 0x40000, 0x8 },
{ qspi.socket, 0x50000, 0x5c },
//{ bootloader.socket, 0x80000, 0x400 },
}} ;
{ boot_rom.target, 0x80000, 0x2000 },
}} ;

26
src/vp/gen/platform_mmap.h
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@@ -1,26 +0,0 @@
/*
* Copyright (c) 2019 -2021 MINRES Technolgies GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _PLATFORM_MMAP_H_
#define _PLATFORM_MMAP_H_
// need double braces, see
// https://stackoverflow.com/questions/6893700/how-to-construct-stdarray-object-with-initializer-list#6894191
const std::array<scc::target_memory_map_entry<scc::LT>, 13> platfrom_mmap = {{
{clint.socket, 0x2000000, 0xc000},
{plic.socket, 0xc000000, 0x200008},
{aon.socket, 0x10000000, 0x150},
{prci.socket, 0x10008000, 0x14},
{gpio0.socket, 0x10012000, 0x44},
{uart0.socket, 0x10013000, 0x1c},
{qspi0.socket, 0x10014000, 0x78},
{pwm0.socket, 0x10015000, 0x30},
{uart1.socket, 0x10023000, 0x1c},
{qspi1.socket, 0x10024000, 0x78},
{pwm1.socket, 0x10025000, 0x30},
{qspi2.socket, 0x10034000, 0x78},
{pwm2.socket, 0x10035000, 0x30},
}};
#endif /* _PLATFORM_MMAP_H_ */

25
src/vp/platform.rdl
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@@ -1,25 +0,0 @@
`include "gpio.rdl"
`include "uart.rdl"
`include "spi.rdl"
`include "pwm.rdl"
`include "plic.rdl"
`include "aon.rdl"
`include "prci.rdl"
`include "clint.rdl"
addrmap e300_plat_t {
lsb0;
clint_regs clint @0x02000000;
plic_regs plic @0x0C000000;
aon_regs aon @0x10000000;
prci_regs prci @0x10008000;
gpio_regs gpio0 @0x10012000;
uart_regs uart0 @0x10013000;
spi_regs qspi0 @0x10014000;
pwm_regs pwm0 @0x10015000;
uart_regs uart1 @0x10023000;
spi_regs qspi1 @0x10024000;
pwm_regs pwm1 @0x10025000;
spi_regs qspi2 @0x10034000;
pwm_regs pwm2 @0x10035000;
} e300_plat;

1
src/vp/system.cpp
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@@ -13,7 +13,6 @@
namespace tgc_vp {
using namespace sc_core;
using namespace vpvper::minres;
using namespace sysc::tgfs;
system::system(sc_core::sc_module_name nm)
: sc_core::sc_module(nm)

6
src/vp/system.h
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@@ -52,7 +52,7 @@ public:
system(sc_core::sc_module_name nm);
private:
sysc::tgfs::core_complex core_complex{"core_complex"};
sysc::riscv_vp::core_complex core_complex{"core_complex"};
scc::router<> ahb_router, apbBridge;
vpvper::minres::gpio_tl gpio0{"gpio0"};
vpvper::minres::uart_tl uart0{"uart0"};
@@ -61,8 +61,8 @@ private:
vpvper::minres::irq_tl irq_ctrl{"irq_ctrl"};
vpvper::minres::qspi_tl qspi{"qspi"};
//scc::memory<1_kB, scc::LT> bootloader{"bootloader"};
scc::memory<32_kB, scc::LT> mem_ram {"mem_ram"};
scc::memory<128_kB, scc::LT> mem_ram {"mem_ram"};
scc::memory<8_kB, scc::LT> boot_rom {"boot_rom"};
sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> rst_s{"rst_s"}, mtime_int_s{"mtime_int_s"}, msip_int_s{"msip_int_s"};