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Anup Patel 8a4088c3af plat: clint: Reduce use of atomic operation on IPI registers

Currently, we aggresively use atomic operation on CLINT IPI
register. This patch simplify CLINT IPI APIs by reducing use
of atomic operations. In future, we will gradually increase
use of atomic operations for CLINT IPI APIs.

Signed-off-by: Anup Patel <anup.patel@wdc.com>

2018-12-16 13:51:16 +05:30

blob

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2018-12-11 19:24:06 +05:30

include/sbi

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2018-12-11 19:24:06 +05:30

lib

lib: Don't emulate CSR read for misa and mhartid

2018-12-16 10:15:55 +05:30

plat

plat: clint: Reduce use of atomic operation on IPI registers

2018-12-16 13:51:16 +05:30

LICENSE

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2018-12-11 19:24:06 +05:30

Makefile

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2018-12-11 19:24:06 +05:30

README.md

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2018-12-11 19:24:06 +05:30

README.md

RISC-V Open Source Supervisor Binary Interface (OpenSBI)

The RISC-V Supervisor Binary Interface (SBI) is a recommended interface between:

platform specific firmware running in M-mode and bootloader running in S-mode
platform specific firmware running in M-mode and general purpose operating system running in S-mode
hypervisor runnng in HS-mode and general purpose operating system running in VS-mode.

The RISC-V SBI spec is maintained as independent project by RISC-V Foundation at https://github.com/riscv/riscv-sbi-doc

The RISC-V OpenSBI project aims to provides an open-source and extensible implementation of the SBI spec. This project can be easily extended by RISC-V platform or RISC-V System-on-Chip vendors.

How to Build?

Below are the steps to cross-compile and install RISC-V OpenSBI:

Setup build environment $ CROSS_COMPILE=riscv64-unknown-linux-gnu-
Build sources $ make PLAT=<platform_name> OR $ make PLAT=<platform_name> O=<build_directory>
Install blobs $ make PLAT=<platform_name> install OR $ make PLAT=<platform_name> I=<install_directory> install

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