Commit Graph

920 Commits

Author SHA1 Message Date
Atish Patra
b8845e4204 lib: sbi: Fix initial value mask while updating the counters
The first 32 bits of the initial value for the counter should be
preserved while updating the mhpmcounter for 32bit.

Fixes: 13d40f21d5 ("lib: sbi: Add PMU support")
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-11-11 17:57:17 +05:30
Atish Patra
15906a3984 lib: utils: Rename the prefix in PMU DT properties
As per the DT schema rules, the prefix should be vendor. As the PMU
properties are generic for all vendors, change the prefix to riscv
instead of pmu.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-11-11 17:54:46 +05:30
Atish Patra
b28f07005c lib: sbi: Enable PMU extension for platforms without mcountinhibit
Some platforms such as hifive unmatched doesn't implement mcountinhibit
csr. However, it has hardware events that can be monitored using 2
hpmcounter it has (i.e. mhpmcounter3 & mhpmcounter4).

Currently, PMU extension disabled if mcountinhibit is absent. That's not
really necessary as long as the supervisor OS keeps track of the delta
value of the counters. Without mcountinhibit, the delta value won't be
entirely accurate because the counters are freely running. However, that
should be fine to produce an approximate counter value which can help
performance analysis. Perf sampling won't work though as sscof extension
is not present in hifive unmatched.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-11-11 17:54:01 +05:30
Atish Patra
b628cfd6a0 lib: sbi: Counter info width should be zero indexed
The mhpm bits represent the number of bits available in mhpmcounter
while counter width describes a zero indexed value. Fix the counter width
calculation.

Fixes: 13d40f21d5 ("lib: sbi: Add PMU support")
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-11-11 17:52:19 +05:30
Atish Patra
1e147324f0 lib: sbi: Reset the mhpmevent value upon counter reset
The hardware solely relies on the event selector value in mhpmevent
to figure out what event to monitor using that counter. It should be
reset when counter reset happens.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-11-11 17:50:32 +05:30
Atish Patra
0c304b6619 lib: sbi: Allow programmable counters to monitor cycle/instret events
A platform may use programmable counters for cycle/instret events.
The priv spec allows that provided that cycle/instret also report those
events in addition to the programmable counters. We should allow that
functionality in OpenSBI.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-11-11 17:48:45 +05:30
Atish Patra
2363f950bc lib: sbi: Always enable access for all counters
OpenSBI doesn't use any counters for its own usage. Thus, all the counters
can be made accessible for lower privilege mode always. However, the
mcountinhibit must be set so that the counter doesn't increment.
As a result, we don't have to enable/disable mcounteren at every start/stop.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-11-11 17:47:52 +05:30
Atish Patra
730f01bb41 lib: sbi: Support sscofpmf extension in OpenSBI
This patch adds sscofpmf extension in pmu module which includes
following things.

1. Enable overflow irq when starting a counter.
2. Setting the correct event filters passed from supervisor.
3. Delegating the overflow interrupt to the supervisor.
4. Add RV32 support for sscofpmf.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-11-11 17:46:57 +05:30
Atish Patra
9134c3643e lib: sbi: Delegate PMU counter overflow interrupt to S mode
OpenSBI doesn't handle PMU counters for now.

Delegate the overflow counter to S-mode always.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-11-11 17:45:12 +05:30
Atish Patra
867c65360d lib: sbi: Detect Sscofpmf extension at run time
Sscofpmf ISA extension introduces PMU counter overflow and filtering support.
It introduces a read only `scountovf` csr that can be used to detect if
a hart supports this extension at runtime. However, this feature is only
useful if the hart already supports mcounteren and mcountinhibit.

Add a dynamic detection mechanism and boot time print message if sscofpmf
is present.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-11-11 17:42:59 +05:30
Atish Patra
7084ad9f42 lib: sbi: Update csr_read/write_num for PMU
The Sscofpmf extension introduces mhpmevent[h] csrs to handle filtering
/overflow bits in RV32. There is no way to read/write mcountinhibit
using mcountinhibit csr using a variable.

Updated the support to read/write mhpmevent[h] and mcountinhibit csr.

Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-11-11 17:39:38 +05:30
Atish Patra
a74daf2cb9 riscv: Add new CSRs introduced by Sscofpmf[1] extension
[1] https://drive.google.com/file/d/1KcjgbLM5L1ZKY8934aJl8aQwGlMz6Cbo/view

Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-11-11 17:37:34 +05:30
Heinrich Schuchardt
be245acfff lib: sbi: error handling in fdt_reset_init()
The initialization of a reset driver may fail for various reasons, like
a PMIC based reset driver not finding the required I2C driver. The return
code of the init routine may take other error values than -ENODEV.

If the initialization of a reset driver fails, this should not lead to the
board hanging. It is enough that the reset driver does not call
sbi_system_reset_add_device() to avoid invoking the driver for a device
that could not be initialized.

Change the return type of fdt_reset_init() to void.
Print a message if an error occurs.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-11-08 10:50:48 +05:30
Heinrich Schuchardt
57f094e67e platform: generic: move fdt_reset_init to final_init
Move the fdt_reset_init() invocation from generic_early_init() to
generic_final_init(). This allows to print error messages.

Ignore the return value of fdt_reset_init() as we should not stop booting
due to failure to initialize reset drivers.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-11-08 10:42:05 +05:30
Heinrich Schuchardt
2fe2f55d50 lib: sbi: move sbi_boot_print_general()
Moving the sbi_boot_print_general() call after the
sbi_platform_final_init() call allows to print devices initialized in the
latter.

To keep the overall print sequence the same also move
sbi_boot_print_domains().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-11-08 10:39:31 +05:30
Nikita Shubin
0979ffda12 lib: utils/gpio: use list for drivers
Convert static array to sbi_list.

This removes size limitation, makes add/remove more efficient and
saves space.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-11-03 15:57:56 +05:30
Anup Patel
013ba4ef3d lib: sbi: Fix GPA passed to __sbi_hfence_gvma_xyz() functions
The parameter passed to HFENCE.GVMA instruction in rs1 register
is guest physical address right shifted by 2 (i.e. divided by 4).

Unfortunately, we overlooked the semantics of rs1 registers for
HFENCE.GVMA instruction and never right shifted guest physical
address by 2. This issue did not manifest for hypervisors till
now because all H-extension implementations (such as QEMU, Spike,
Rocket Core FPGA, etc) we tried till now were conservatively
flushing everything upon any HFENCE.GVMA instruction.

This patch fixes GPA passed to __sbi_hfence_gvma_vmid_gpa()
and __sbi_hfence_gvma_gpa() functions.

Fixes: 331ff6a162 ("lib: Support stage1 and stage2 tlb flushing")
Reported-by: Ian Huang <ihuang@ventanamicro.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
2021-11-02 16:02:08 +05:30
Alexandre Ghiti
c891acca17 include: sbi_utils: Introduce an helper to get fdt base address
This simply adds an helper to get fdt address which is more explicit than
sbi_scratch_thishart_arg1_ptr.

Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-11-02 11:23:16 +05:30
Dong Du
723aa88ff4 lib: sbi: Refine addr format in sbi_printf
Although we have PRILX to help us print unsigned long without
considering the 32bit/64bit differences, there are still some
places using 08lx and 016lx manually --- leading to redundant code.

This commit fixes the issue by using PRILX all the time.

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-11-02 10:42:01 +05:30
Anup Patel
309e8bdf85 lib: utils/reset: Register separate GPIO system reset devices
Now that sbi_system support multiple system reset devices, we should
register separate devices for GPIO restart and GPIO poweroff because
DT describes these as separate devices with different compatible
strings.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
2021-11-02 09:14:11 +05:30
Samuel Holland
78c2b19218 lib: utils/irqchip: Automatically delegate T-HEAD PLIC access
The T-HEAD PLIC implementation requires setting a delegation bit
to allow access from S-mode. Now that the T-HEAD PLIC has its own
compatible string, set this bit automatically from the PLIC driver,
instead of reaching into the PLIC's MMIO space from another driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-10-21 10:06:00 +05:30
Wei Fu
422eda499c Makefile: Add build time and compiler info string
When we are doing opensbi development, we want to know the build time
and compiler info for debug purpose.

To enable this message, please add "BUILD_INFO=y", like:

```
make BUILD_INFO=y
```

NOTE: Using `BUILD_INFO=y` without specifying SOURCE_DATE_EPOCH will
violate "reproducible builds". So it's ONLY for development and debug
purpose, and should NOT be used in a product which follows "reproducible
builds".

Signed-off-by: Wei Fu <wefu@redhat.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-10-20 15:10:52 +05:30
Heinrich Schuchardt
67cbbcb100 lib: sbi: system reset with invalid parameters
The SBI specification requires that sbi_system_reset() returns
SBI_ERR_INVALID_PARAM if reset_type or reset_reason are not valid.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-10-18 16:07:21 +05:30
Anup Patel
c38973e087 lib: sbi: Save context for all non-retentive suspend types
Instead of saving context only for default non-retentive suspend,
we should save context for all non-retentive suspend types.

Fixes: 74756891cc ("lib: sbi: Implement SBI HSM suspend function")
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-10-18 16:07:16 +05:30
Nikita Shubin
9283d503bd lib: sbi: add priority for reset handler
Let's make system_reset_check returning priority instead of only
true/false. In that case 0 - means not supported, and anything above
means priority that makes existing reset handlers being used in first
place, unless it is decided to lower their priority.

The handler with the most priority wins.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-10-11 10:32:26 +05:30
Nikita Shubin
516161c46f lib: sbi: convert reset to list
To support different handlers for different types of resets, we are
adding a sbi_list of restart handlers.

Instead of sbi_system_reset_set_device we use
sbi_system_reset_add_device to reflect the actual meaning.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-10-11 09:59:29 +05:30
Heinrich Schuchardt
754d51192b lib: utils: identify supported GPIO reset methods
The GPIO reset driver supports reset and poweroff. But not all boards
support both. gpio_system_reset_check() must detect this situation.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-10-01 10:24:43 +05:30
Anup Patel
fa59dd317a lib: utils/reset: use sbi_timer_mdelay() in gpio reset driver
We should use sbi_timer_mdelay() instead of custom gpio_mdelay() in
the gpio reset driver.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-09-26 19:52:18 +05:30
Anup Patel
9d0ab35ab4 lib: sbi: Add generic timer delay loop function
We now have frequency of the timer device provided by the platform
support so we can emulate desired delay using a loop where the number
loop iterations are based on timer frequency.

This patch provides sbi_timer_delay_loop() for above purpose.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-09-26 19:52:15 +05:30
Anup Patel
6355155f51 lib: sbi: Print timer frequency at boot time
We now have frequency in timer device instance provided by platform
so let's print timer frequency as part of the boot prints.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-09-26 19:52:12 +05:30
Anup Patel
12e7af9ab7 lib: sbi: Add timer frequency to struct sbi_timer_device
Generic mdelay() and udelay() functions can be provided by the
sbi_timer framework if timer frequency is available in the timer
instance provided by the platform support or timer driver.

This patch adds timer frequency (timer_freq) member in the
struct sbi_timer_device for above purpose.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-09-26 19:52:10 +05:30
Anup Patel
72154f4708 lib: utils/fdt: Add fdt_parse_timebase_frequency() function
We add fdt_parse_timebase_frequency() function which can be used
by ACLINT mtimer driver and platform code to get timebase frequency.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-09-26 19:52:07 +05:30
Xiang W
51113fe2a5 lib: sbi: Add BUG() macro for csr_read/write_num() and misa_string()
We use BUG() macro in csr_read_num(), csr_write_num(), and
misa_string() functions for unhandled cases.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-09-22 13:38:39 +05:30
Xiang W
12753d2256 lib: sbi: add some macros to detect BUG at runtime
Three macros are added. One is called BUG, which is used to put in an
unreachable branch. One is called BUG_ON, which is used to check bugs
and assert conditions are opposite. One is called SBI_ASSERT, used for
assertion checking.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-09-22 13:35:30 +05:30
Xiang W
3477f08b08 lib: sbi: fix ctz bug
The original version of ctz will cause an endless loop, if the parameter
passed in is 0. This commit fixes this bug.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-09-22 13:26:23 +05:30
Samuel Holland
395ff7eede lib: utils/reset: Add a sunxi watchdog reset driver
One of the watchdogs in the D1 SoC provides a "soft reset" function,
which allows software to immediately reset the entire SoC. Add a driver
so it can implement the SBI system reset function.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-09-14 13:24:53 +05:30
Samuel Holland
0274a96004 lib: utils/reset: Sort fdt_reset driver list
In preparation for adding a new fdt_reset driver, ensure the existing
lists are sorted alphabetically.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-09-14 12:13:55 +05:30
Dong Du
bd355213bf lib: sbi: Refine the way to construct platform features
sbi_platform_get_features_str() uses sbi_snprintf() to construct the
features_str. However, it passes the wrong length value (i.e., the nfstr),
which should be (nfstr-offset) as the starting point of str (i.e.,
features_str + offset) changes.

This commit also checks the return value of snprintf, and handles the
corner case that the string buffer is full.

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-09-03 12:16:01 +05:30
Dong Du
1718b1642e lib: sbi: Checking fifo validness in sbi_fifo_is_empty and is_full
As other exported fifo functions, we should check whether the fifo is
valid in sbi_fifo_is_empty and sbi_fifo_is_full. To this end, this patch
changes the retval from bool to int, and the two functions will return
SBI_EINVAL in the case the fifo is invalid.

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-09-03 11:59:35 +05:30
Dong Du
c262306533 lib: sbi: protect dprintf output with spinlock
Avoid getting messages from multiple harts (using dprintf and printf)
concurrently with a spinlock serializaing calls to sbi_dprintf(),
sbi_printf() and sbi_puts()

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-08-30 09:12:37 +05:30
Rahul Pathak
bd316e2c9b lib: sbi: Correct typo in faults delegation CSR name
Correcting the name of faults delegation CSR
%s/mfdeleg/medeleg

Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-08-30 09:07:47 +05:30
Samuel Holland
b1d3e91e9a payloads/test: Add support for SBI v0.2 ecalls
It can be useful to make SBI v0.2 or newer ecalls from this payload
for testing purposes. To support this, convert the macros to use the
extension/function parameter convention.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-08-20 09:48:45 +05:30
Samuel Holland
ee274377b2 lib: sbi_trap: Restore redirect for access faults
commit 764a17d852 ("lib: sbi: Implement firmware counters") added
switch cases for CAUSE_LOAD_ACCESS and CAUSE_STORE_ACCESS. This caused
them to stop being redirected to U or S mode, as that is handled in the
default switch case. As a result, an error in userspace could cause the
system to hang. Fix this by allowing the acces fault case to fall
through to the default case.

Fixes: 764a17d852 ("lib: sbi: Implement firmware counters")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-08-20 09:47:40 +05:30
Dong Du
33eac764f2 lib: sbi: Fix bug in sbi_ecall_rfence that misses checking
In sbi_ecall_rfence_handler, it will compare the funcid with
REMOTE_HFENCE_GVMA and REMOTE_HFENCE_VVMA_ASID. Later it check
whether the misa includes H-extension. This checking is incomplete
which misses REMOTE_HFENCE_GVMA_VMID and REMOTE_HFENCE_VVMA.

Fix the issue by updating the checking range.

Signed-off-by: Dong Du <Dd_nirvana@sjtu.edu.cn>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-08-20 09:42:39 +05:30
Anup Patel
7aa6c9aa96 lib: utils/timer: Simplify MTIMER synchronization
We simplify MTIMER synchronization as follows:

1) Detect MTIMER devices with unique (or non-shared) MTIME
   register at boot-time
2) Select first MTIMER device with no associated HART as our
   reference MTIMER device
3) Only synchronize MTIMER devices with unique (or non-shared)
   MTIME register using reference MTIMER device
4) Directly update the MTIME register at time of synchronization
   because MTIME is a read/write register.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-08-14 09:07:42 +05:30
Anup Patel
b35f7826b0 lib: utils/timer: Allow ACLINT MTIMER supporting only 32-bit MMIO
We can have ACLINT MTIMER devices which only support 32-bit MMIO
accesses on RV64 system so this patch adds a boolean DT property
"mtimer,no-64bit-mmio" to detect this from MTIMER DT node.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-08-14 09:02:44 +05:30
Anup Patel
f3a0eb8583 lib: utils/fdt: Extend fdt_parse_aclint_node() function
The fdt_parse_aclint_node() is used to parse DT node for SiFive
CLINT, ACLINT MTIMER, and ACLINT MSWI devices.

The ACLINT MTIMER has undergone following changes:
1) MTIMER DT node now requires separate addresses in for MTIME
   register and MTIMECMPx registers in the reg DT property.
2) MTIMER DT node might have no interrupts-extended DT property
   when the MTIMER device has no associated HARTs (i.e. the
   MTIMER device has no MTIMECMPx registers)

This patch extends fdt_parse_aclint_node() to handle above
mentioned changes in ACLINT MTIMER DT bindings.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-08-14 09:02:39 +05:30
Anup Patel
7a3a0cce4d lib: utils: Extend fdt_get_node_addr_size() for multiple register sets
We add "index" parameter to fdt_get_node_addr_size() API so that
calling function can specify index of desired register set. This
will allow fdt_get_node_addr_size() to handle DT nodes with
multiple register sets.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-08-14 09:02:36 +05:30
Anup Patel
e0d1b9db8a lib: utils/timer: Allow separate base addresses for MTIME and MTIMECMP
We extend the ACLINT library to support separate base addresses
for MTIME and MTIMECMP registers.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-08-14 09:02:33 +05:30
Bin Meng
47a47654e8 lib: utils/fdt: Change addr and size to uint64_t
The maximum address and size encoded in DT are 64-bit numbers, so we
should use uint64_t for 'addr' and 'size' in fdt_get_node_addr_size().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-08-07 17:26:51 +05:30