The drivers and libfdt are built as libsbiutils.a
instead of libplatsbi.a.
libsbiutils.a are not built per platform specific. Thus,
enable all drivers by default.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
All string functions are part of libsbi. It makes more sense
to rename them to sbi_string.x as the libsbi can be linked
with external libraries that can have similar implementation.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
Currently, platform/common contains platform/non-platform specific
common minimal drivers and libraries. This is helpful is all platforms
are built within opensbi framework.
Move them to lib/utils so that any external platform code also can
reuse the minimalistic drivers or other common libraries.
This patch doesn't introduce any functional changes.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
libsbi needs some of the custom libc functions. It should be directly
included in libsbi instead of platform specific libraries.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
The unpriv load/store instruction from M-mode can cause page/access
fault to M-mode if S-mode page table did not have mappings OR it did
not have PMP access permission.
To tackle this, we redirect trap back to S-mode if unpriv load/store
instruction traps in M-mode.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch adds per-HART trap info pointer which can be used to
communicate trap information to sbi_trap_handler().
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Currently, the unprivilege load/store functions are inline functions.
We will be extending these functions to track whether a page/access
fault occurs when we execute unprivilege load/store instruction.
To make things simpler and debugable, we reduce number of places which
can potentially generate a page/access fault by making all unprivilege
load/store functions as regular (non-inline) functions.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch factor-out TLB management from IPI management to separate
sources sbi_tlb.c and sbi_tlb.h.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We have extra space above scratch space (sbi_scratch) which we are
currently using to manage per-HART IPI data and TLB request management.
In future, more parts of OpenSBI will use the extra scratch space so
it will become difficult to manage extra scratch space using just
defines and macros.
This patch adds a simple brain-dead allocator to manage extra scratch
space. This allocator never expects anything to be free-ed hence it
keeps incrementing to next allocation offset until it runs-out of space.
In future, we can have more sophisticated allocator which will allow
us to re-claim free-ed space and also allows us to track owner of
allocated space.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
On latest Linux kernel (i.e. 5.2-rc1), we get large TLB flush
request for user space addresses (typically, start=x and end=-1).
This is caused by Linux kernel commit a21344dfc6 ("riscv: fix
sbi_remote_sfence_vma{,_asid}").
It's not practical to execute large number of sfence instructions
for a large TLB flush range because it takes too much time and
eventually causes CPU stall in Linux kernel.
This patch addresses above issue by upgrading TLB flush range to
TLB flush all whenever TLB flush range is greater than 1GB.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Noisy commit, no functional changes.
Generated with an current upstream clang-format and:
clang-format -i $(find . -name \*.[ch])
Signed-off-by: Olof Johansson <olof@lixom.net>
In case we didn't handle a trap with one of the available
handlers, check if the trap comes from S or U mode and
redirect it to S mode's trap handler.
Signed-off-by: Nick Kossifidis <mick@ics.forth.gr>
Simulatenous requests for tlbflush IPIs can have overlapping address
ranges.
Ignore if address range is same or within already existing fifo entries.
Update the tlb flush info in fifo directly if the one of the existing
entry lies within the new flush request.
Delete all entries if flush all request is recieved for the vma.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Implement a lock enabled iteration for fifo so that
caller can determine if next entry can be skipped or
any existing entries in fifo can be updated before enqueue.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
This patch reduces memory consumed by struct sbi_fifo by droping
redundant "head" member and using u16 in-place of "unsigned long".
Signed-off-by: Anup Patel <anup.patel@wdc.com>
This patch does following improvements to sbi_fifo:
1. Use valid SBI_Exxxx error codes instead of -1
2. The sbi_fifo_is_full() and sbi_fifo_is_empty() did
not acquire qlock before accessing head and tail
hence fixed it
3. Added avail member for ease in debugging and simplifying
head/tail updates.
Due to above changes size of sbi_fifo changes from 48 bytes
to 56 bytes.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Currently, there is no provision for tracking multiple IPIs sent
to a single hart at the same time by different harts.
Use a fifo manage the outstanding requests. While dequeueing, read all
the entries once, because we have only 1 bit to track the type of IPI.
Once the queue is full, busy wait until the there is space available in
queue. This is not the most elegant approach. It should be changed in
favor of a wakeup event once available in opensbi.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
The mstatus parameter of get_insn() is used to return MSTATUS CSR
value which get_insn() saw. Most of the get_insn() callers don't
use the value returned in mstatus so this patch makes mstatus
parameter optional for get_insn().
Signed-off-by: Anup Patel <anup.patel@wdc.com>
The sbi_unpriv.h has quite a few load_xyz() and store_xyz() helper
routines based on RISC-V inline assembly for unpriviledged accesses
from M-mode. These helper routines are similar to helper routines
present in riscv_locks.h, riscv_io.h, and riscv_atomic.h so let's
rename sbi_unpriv.h to riscv_unpriv.h.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
OpenSBI should show error trace only if any valid SBI function
does not perform as expected.
However, OpenSBI should show notify the caller with a negative
error if given SBI function ID is not valid.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Currently, global page mappings are not flushed if start and size
arguments are zero.
Flush entire TLB if both size and start argument is passed as zero.
Fixes : 90cb491 (lib: Implement sfence.vma correctly)
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Currently, OpenSBI doesn't distinguish between sfence.vma
and sfence.vm asid calls. Moreover, it ignores the page
ranges and just flush entire TLB everytime.
Fix the sfence implementation by keeping all the tlb flush
info in scratch area.
The relevant Linux kernel code was added by
https://patchwork.kernel.org/project/linux-riscv/list/?series=89695
However, this patch is backward compatible with older version kernel
that doesn't have the above patches as well.
Fixes#87
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Create a sbi_ipi_data structure that holds unpacked IPI information. At
the same time remove ipi_type from the sbi_scratch struct and use a
fixed offset to access it.
This structure fits in behind the sbi_scratch structure.
This fixes https://github.com/riscv/opensbi/issues/81
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
As per the current SBI specification, sbi_getc should return
an int instead of char.
In case of FIFO is empty, return -1 as per the specification.
Reported-by: Sergi Granell <xerpi.g.12@gmail.com>
Suggested-by:Thadeu Lima de Souza Cascardo <cascardo@cascardo.eti.br>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
The unsigned long is always machine word size. This means it is
4 bytes on 32bit system and 8 bytes on 64bit system.
This patch adds PRILX define for sbi_printf() which will help us
print unsigned long without worrying whether it is 32bit or 64bit
system.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
The mask shift in for-loop of sbi_ipi_send_many() is
broken with commit 918c1354b7
("lib: Improve delivery of SBI_IPI_EVENT_HALT")
This patch fix it.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
When sbi_ipi_send_many gets called with the current hartid
included on pmask (or when pmask is NULL), and we send
a HALT event, since the for loop works sequentially over
all hartids on the mask, we may send a HALT event to the
current hart before the loop finishes. So we will halt
the current hart before it can deliver a HALT IPI to the
rest and some harts will remain active.
Make sure we send an IPI to the current hart after we've
finished with everybody else.
Signed-off-by: Nick Kossifidis <mick@ics.forth.gr>
In case the platform specific method for shutting down
the system fails (or is not implemented), at least make
sure that all harts hang instead of just the current hart.
Signed-off-by: Nick Kossifidis <mick@ics.forth.gr>
Some older toolchains may not have all the csr's defined. Update all
the csr functions to use the CSR_ #define values instead of the
toolchain defined values.
Suggested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
csr_val is a tartget length based variable, so on 32-bit devices it's
only 32-bits. To avoid clearing the entire register perform both steps
in a single line.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Some toolchains might not have all the CSRs available (as seen with
GCC 7.2). So, instead use the defined CSR_ values.
Signed-off-by: Olof Johansson <olof@lixom.net>
Currently, the OpenSBI version is in top-level Makefile so
firmware linking to OpenSBI static library have no-way to
know OpenSBI version.
This patch moves OpenSBI version from top-level Makefile to
sbi/sbi_version.h header which provides OPENSBI_VERSION_MAJOR
and OPENSBI_VERSION_MINOR defines.
NOTE: the SBI spec (or SBI ecall interface) version is
different. The SBI spec version is provided by functions
sbi_ecall_version_major() and sbi_ecall_version_minor().
Signed-off-by: Anup Patel <anup.patel@wdc.com>
This patch updates copyright header in all files as follows:
1. Makes "SPDX-License-Identifier: BSD-2-Clause" as first line
2. Change copyright year to 2019 for Western Digital
Signed-off-by: Anup Patel <anup.patel@wdc.com>
For better naming, we rename ipi_inject() to ipi_send() in
struct sbi_platform. We also replace term "inject" with
"send" in all related places.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
It is not necessary that platform has MMIO-based timer value
register. It can also have some custom (implementation specific)
CSR for timer value.
This patch renames SBI_PLATFORM_HAS_MMIO_TIMER_VALUE to
SBI_PLATFORM_HAS_TIMER_VALUE to imply "platform timer value"
instead of "mmio timer value".
Signed-off-by: Anup Patel <anup.patel@wdc.com>
The target_hart and hartid paramter of TIMER callbacks is not
required because it always current hartid which can be obtained
using sbi_current_hartid() API.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
The hartid parameter in IRQCHIP callbacks of sbi_platform
is not required because current hartid can be determined
using sbi_current_hartid() API.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
The source_hart and hartid parameter is really not required in
IPI callbacks of sbi_platform because current hartid can always
be obtained by calling sbi_current_hartid() API.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
This patch adds doxygen style documenation for struct sbi_platform
and related functions/macros/defines.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
We don't need to pre-enable MSIP in MIE CSR when
calling sbi_init() from firmware. This patch updates
documentation accordingly.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
As per the RISC-V ISA, mideleg and medeleg registers should not exist
if S-mode is not present for a hart.
We shouldn't access these CSRs if non S-mode harts.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
