forked from Mirrors/opensbi
		
	lib: sbi: Detect mcountinihibit support at runtime
RISC-V ISA specification v1.11 defined mcountinhibit CSR that allows software to stop any counter from incrementing. The SBI PMU extension depends on this CSR support in hardware. Define mcountinhibit as a hart specific feature and detect it at runtime. Reviewed-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Atish Patra <atish.patra@wdc.com>
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		@@ -18,8 +18,10 @@ enum sbi_hart_features {
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	SBI_HART_HAS_SCOUNTEREN = (1 << 0),
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	/** Hart has M-mode counter enable */
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	SBI_HART_HAS_MCOUNTEREN = (1 << 1),
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	/** Hart has counter inhibit CSR */
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	SBI_HART_HAS_MCOUNTINHIBIT = (1 << 2),
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	/** HART has timer csr implementation in hardware */
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	SBI_HART_HAS_TIME = (1 << 2),
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	SBI_HART_HAS_TIME = (1 << 3),
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	/** Last index of Hart features*/
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	SBI_HART_HAS_LAST_FEATURE = SBI_HART_HAS_TIME,
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@@ -259,6 +259,9 @@ static inline char *sbi_hart_feature_id2string(unsigned long feature)
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	case SBI_HART_HAS_MCOUNTEREN:
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		fstr = "mcounteren";
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		break;
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	case SBI_HART_HAS_MCOUNTINHIBIT:
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		fstr = "mcountinhibit";
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		break;
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	case SBI_HART_HAS_TIME:
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		fstr = "time";
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		break;
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@@ -421,6 +424,14 @@ __mhpm_skip:
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			hfeatures->features |= SBI_HART_HAS_MCOUNTEREN;
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	}
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	/* Detect if hart supports MCOUNTINHIBIT feature */
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	val = csr_read_allowed(CSR_MCOUNTINHIBIT, (unsigned long)&trap);
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	if (!trap.cause) {
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		csr_write_allowed(CSR_MCOUNTINHIBIT, (unsigned long)&trap, val);
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		if (!trap.cause)
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			hfeatures->features |= SBI_HART_HAS_MCOUNTINHIBIT;
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	}
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	/* Detect if hart supports time CSR */
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	csr_read_allowed(CSR_TIME, (unsigned long)&trap);
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	if (!trap.cause)
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