forked from Mirrors/opensbi
platform: Add AE350 platform specific SBI handler
We add AE350 platform specific SBI handler to implement AE350 specific SBI calls. Signed-off-by: Nylon Chen <nylon7@andestech.com> Reviewed-by: Anup Patel <Anup.Patel@wdc.com> Reviewed-by: Atish Patra <Atish.Patra@wdc.com>
This commit is contained in:
@@ -29,8 +29,19 @@
|
||||
#define AE350_UART_REG_SHIFT 2
|
||||
#define AE350_UART_REG_WIDTH 0
|
||||
|
||||
/* nds mcache_ctl register*/
|
||||
#define CSR_MCACHECTL 0x7ca
|
||||
|
||||
enum sbi_ext_andes_fid {
|
||||
SBI_EXT_ANDES_GET_MCACHE_CTL_STATUS = 0,
|
||||
SBI_EXT_ANDES_GET_MMISC_CTL_STATUS,
|
||||
SBI_EXT_ANDES_SET_MCACHE_CTL,
|
||||
SBI_EXT_ANDES_SET_MMISC_CTL,
|
||||
SBI_EXT_ANDES_ICACHE_OP,
|
||||
SBI_EXT_ANDES_DCACHE_OP,
|
||||
SBI_EXT_ANDES_L1CACHE_I_PREFETCH,
|
||||
SBI_EXT_ANDES_L1CACHE_D_PREFETCH,
|
||||
SBI_EXT_ANDES_NON_BLOCKING_LOAD_STORE,
|
||||
SBI_EXT_ANDES_WRITE_AROUND,
|
||||
};
|
||||
|
||||
#define V5_MCACHE_CTL_IC_EN_OFFSET 0
|
||||
#define V5_MCACHE_CTL_DC_EN_OFFSET 1
|
||||
|
Reference in New Issue
Block a user