Firmware/opensbi
8
0
Fork 0
forked from Mirrors/opensbi
Code Pull Requests Activity

lib: utils/gpio: Add minimal SiFive GPIO driver

Browse Source 
We add a minimal SiFive GPIO driver so that we can do GPIO based
system power-off and reset.

Signed-off-by: Green Wan <green.wan@sifive.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
Green Wan
2021-07-13 11:23:44 +08:00
committed by Anup Patel
parent c14f1fe0df
commit 4c3df2ab96
3 changed files with 109 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
lib/utils/gpio/fdt_gpio.c
View File

@@ -12,7 +12,10 @@
#include <sbi_utils/fdt/fdt_helper.h>
#include <sbi_utils/gpio/fdt_gpio.h>
extern struct fdt_gpio fdt_gpio_sifive;
static struct fdt_gpio *gpio_drivers[] = {
&fdt_gpio_sifive
};
static struct fdt_gpio *fdt_gpio_driver(struct gpio_chip *chip)

105
lib/utils/gpio/fdt_gpio_sifive.c Normal file
View File

@@ -0,0 +1,105 @@
/*
* SPDX-License-Identifier: BSD-2-Clause
*
* Copyright (c) 2021 SiFive
*
* Authors:
* Green Wan <green.wan@sifive.com>
*/
#include <sbi/riscv_io.h>
#include <sbi/sbi_error.h>
#include <sbi_utils/fdt/fdt_helper.h>
#include <sbi_utils/gpio/fdt_gpio.h>
#define SIFIVE_GPIO_CHIP_MAX 2
#define SIFIVE_GPIO_PINS_MIN 1
#define SIFIVE_GPIO_PINS_MAX 32
#define SIFIVE_GPIO_PINS_DEF 16
#define SIFIVE_GPIO_OUTEN 0x8
#define SIFIVE_GPIO_OUTVAL 0xc
#define SIFIVE_GPIO_BIT(b) (1U << (b))
struct sifive_gpio_chip {
unsigned long addr;
struct gpio_chip chip;
};
static unsigned int sifive_gpio_chip_count;
static struct sifive_gpio_chip sifive_gpio_chip_array[SIFIVE_GPIO_CHIP_MAX];
static int sifive_gpio_direction_output(struct gpio_pin *gp, int value)
{
unsigned int v;
struct sifive_gpio_chip *chip =
container_of(gp->chip, struct sifive_gpio_chip, chip);
v = readl((volatile void *)(chip->addr + SIFIVE_GPIO_OUTEN));
v |= SIFIVE_GPIO_BIT(gp->offset);
writel(v, (volatile void *)(chip->addr + SIFIVE_GPIO_OUTEN));
v = readl((volatile void *)(chip->addr + SIFIVE_GPIO_OUTVAL));
if (!value)
v &= ~SIFIVE_GPIO_BIT(gp->offset);
else
v |= SIFIVE_GPIO_BIT(gp->offset);
writel(v, (volatile void *)(chip->addr + SIFIVE_GPIO_OUTVAL));
return 0;
}
static void sifive_gpio_set(struct gpio_pin *gp, int value)
{
unsigned int v;
struct sifive_gpio_chip *chip =
container_of(gp->chip, struct sifive_gpio_chip, chip);
v = readl((volatile void *)(chip->addr + SIFIVE_GPIO_OUTVAL));
if (!value)
v &= ~SIFIVE_GPIO_BIT(gp->offset);
else
v |= SIFIVE_GPIO_BIT(gp->offset);
writel(v, (volatile void *)(chip->addr + SIFIVE_GPIO_OUTVAL));
}
extern struct fdt_gpio fdt_gpio_sifive;
static int sifive_gpio_init(void *fdt, int nodeoff, u32 phandle,
const struct fdt_match *match)
{
int rc;
struct sifive_gpio_chip *chip;
if (SIFIVE_GPIO_CHIP_MAX <= sifive_gpio_chip_count)
return SBI_ENOSPC;
chip = &sifive_gpio_chip_array[sifive_gpio_chip_count];
rc = fdt_get_node_addr_size(fdt, nodeoff, &chip->addr, NULL);
if (rc)
return rc;
chip->chip.driver = &fdt_gpio_sifive;
chip->chip.id = phandle;
chip->chip.ngpio = SIFIVE_GPIO_PINS_DEF;
chip->chip.direction_output = sifive_gpio_direction_output;
chip->chip.set = sifive_gpio_set;
rc = gpio_chip_add(&chip->chip);
if (rc)
return rc;
sifive_gpio_chip_count++;
return 0;
}
static const struct fdt_match sifive_gpio_match[] = {
{ .compatible = "sifive,gpio0" },
{ },
};
struct fdt_gpio fdt_gpio_sifive = {
.match_table = sifive_gpio_match,
.xlate = fdt_gpio_simple_xlate,
.init = sifive_gpio_init,
};

1
lib/utils/gpio/objects.mk
View File

@@ -8,4 +8,5 @@
#
libsbiutils-objs-y += gpio/fdt_gpio.o
libsbiutils-objs-y += gpio/fdt_gpio_sifive.o
libsbiutils-objs-y += gpio/gpio.o