forked from Mirrors/opensbi
lib: sbi: abstract out insn decoding to unify mem fault handlers
This patch abstracts out the instruction decoding part of misaligned ld/st fault handlers, so it can be reused by ld/st access fault handlers. Also Added lb/lbu/sb decoding. (previously unreachable by misaligned fault) sbi_trap_emulate_load/store is now the common handler which takes a `emu` parameter that is responsible for emulating the misaligned or access fault. The `emu` callback is expected to fixup the fault, and based on the return code of `emu`, sbi_trap_emulate_load/store will: r/wlen => the fixup is successful and regs/mepc needs to be updated. 0 => the fixup is successful, but regs/mepc should be left untouched (this is usually used if `emu` does `sbi_trap_redirect`) -err => failed, sbi_trap_error will be called For now, load/store access faults are blindly redirected. It will be enhanced in the following patches. Signed-off-by: Bo Gan <ganboing@gmail.com> Reviewed-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
@@ -13,7 +13,12 @@
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#include <sbi/sbi_types.h>
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#include <sbi/sbi_trap.h>
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struct sbi_trap_regs;
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union sbi_ldst_data {
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u64 data_u64;
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u32 data_u32;
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u8 data_bytes[8];
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ulong data_ulong;
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};
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int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap);
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@@ -21,4 +26,10 @@ int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
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int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap);
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int sbi_load_access_handler(struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap);
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int sbi_store_access_handler(struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap);
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#endif
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@@ -299,10 +299,12 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
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msg = "illegal instruction handler failed";
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break;
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case CAUSE_MISALIGNED_LOAD:
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sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_LOAD);
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rc = sbi_misaligned_load_handler(regs, &trap);
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msg = "misaligned load handler failed";
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break;
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case CAUSE_MISALIGNED_STORE:
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sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_STORE);
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rc = sbi_misaligned_store_handler(regs, &trap);
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msg = "misaligned store handler failed";
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break;
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@@ -312,10 +314,15 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
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msg = "ecall handler failed";
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break;
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case CAUSE_LOAD_ACCESS:
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sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ACCESS_LOAD);
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rc = sbi_load_access_handler(regs, &trap);
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msg = "load fault handler failed";
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break;
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case CAUSE_STORE_ACCESS:
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sbi_pmu_ctr_incr_fw(mcause == CAUSE_LOAD_ACCESS ?
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SBI_PMU_FW_ACCESS_LOAD : SBI_PMU_FW_ACCESS_STORE);
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/* fallthrough */
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sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ACCESS_STORE);
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rc = sbi_store_access_handler(regs, &trap);
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msg = "store fault handler failed";
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break;
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default:
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/* If the trap came from S or U mode, redirect it there */
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msg = "trap redirect failed";
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@@ -16,11 +16,23 @@
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#include <sbi/sbi_trap.h>
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#include <sbi/sbi_unpriv.h>
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union reg_data {
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u8 data_bytes[8];
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ulong data_ulong;
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u64 data_u64;
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};
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/**
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* Load emulator callback:
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*
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* @return rlen=success, 0=success w/o regs modification, or negative error
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*/
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typedef int (*sbi_trap_ld_emulator)(int rlen, union sbi_ldst_data *out_val,
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struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap);
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/**
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* Store emulator callback:
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*
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* @return wlen=success, 0=success w/o regs modification, or negative error
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*/
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typedef int (*sbi_trap_st_emulator)(int wlen, union sbi_ldst_data in_val,
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struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap);
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static ulong sbi_misaligned_tinst_fixup(ulong orig_tinst, ulong new_tinst,
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ulong addr_offset)
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@@ -34,15 +46,14 @@ static ulong sbi_misaligned_tinst_fixup(ulong orig_tinst, ulong new_tinst,
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return orig_tinst | (addr_offset << SH_RS1);
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}
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int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap)
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static int sbi_trap_emulate_load(struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap,
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sbi_trap_ld_emulator emu)
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{
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ulong insn, insn_len;
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union reg_data val;
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union sbi_ldst_data val = { 0 };
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struct sbi_trap_info uptrap;
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int i, fp = 0, shift = 0, len = 0;
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sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_LOAD);
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int rc, fp = 0, shift = 0, len = 0;
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if (orig_trap->tinst & 0x1) {
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/*
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@@ -64,7 +75,12 @@ int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
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insn_len = INSN_LEN(insn);
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}
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if ((insn & INSN_MASK_LW) == INSN_MATCH_LW) {
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if ((insn & INSN_MASK_LB) == INSN_MATCH_LB) {
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len = 1;
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shift = 8 * (sizeof(ulong) - len);
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} else if ((insn & INSN_MASK_LBU) == INSN_MATCH_LBU) {
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len = 1;
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} else if ((insn & INSN_MASK_LW) == INSN_MATCH_LW) {
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len = 4;
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shift = 8 * (sizeof(ulong) - len);
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#if __riscv_xlen == 64
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@@ -134,17 +150,10 @@ int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
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return sbi_trap_redirect(regs, orig_trap);
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}
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val.data_u64 = 0;
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for (i = 0; i < len; i++) {
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val.data_bytes[i] =
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sbi_load_u8((void *)(orig_trap->tval + i), &uptrap);
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if (uptrap.cause) {
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uptrap.epc = regs->mepc;
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uptrap.tinst = sbi_misaligned_tinst_fixup(
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orig_trap->tinst, uptrap.tinst, i);
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return sbi_trap_redirect(regs, &uptrap);
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}
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}
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rc = emu(len, &val, regs, orig_trap);
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if (rc <= 0)
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return rc;
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if (!fp)
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SET_RD(insn, regs, ((long)(val.data_ulong << shift)) >> shift);
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@@ -160,15 +169,14 @@ int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
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return 0;
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}
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int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap)
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static int sbi_trap_emulate_store(struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap,
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sbi_trap_st_emulator emu)
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{
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ulong insn, insn_len;
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union reg_data val;
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union sbi_ldst_data val;
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struct sbi_trap_info uptrap;
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int i, len = 0;
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sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_STORE);
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int rc, len = 0;
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if (orig_trap->tinst & 0x1) {
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/*
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@@ -192,7 +200,9 @@ int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
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val.data_ulong = GET_RS2(insn, regs);
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if ((insn & INSN_MASK_SW) == INSN_MATCH_SW) {
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if ((insn & INSN_MASK_SB) == INSN_MATCH_SB) {
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len = 1;
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} else if ((insn & INSN_MASK_SW) == INSN_MATCH_SW) {
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len = 4;
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#if __riscv_xlen == 64
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} else if ((insn & INSN_MASK_SD) == INSN_MATCH_SD) {
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@@ -245,9 +255,26 @@ int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
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return sbi_trap_redirect(regs, orig_trap);
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}
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for (i = 0; i < len; i++) {
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sbi_store_u8((void *)(orig_trap->tval + i), val.data_bytes[i],
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&uptrap);
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rc = emu(len, val, regs, orig_trap);
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if (rc <= 0)
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return rc;
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regs->mepc += insn_len;
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return 0;
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}
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static int sbi_misaligned_ld_emulator(int rlen, union sbi_ldst_data *out_val,
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struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap)
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{
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struct sbi_trap_info uptrap;
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int i;
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for (i = 0; i < rlen; i++) {
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out_val->data_bytes[i] =
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sbi_load_u8((void *)(orig_trap->tval + i), &uptrap);
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if (uptrap.cause) {
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uptrap.epc = regs->mepc;
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uptrap.tinst = sbi_misaligned_tinst_fixup(
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@@ -255,8 +282,51 @@ int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
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return sbi_trap_redirect(regs, &uptrap);
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}
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}
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regs->mepc += insn_len;
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return 0;
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return rlen;
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}
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int sbi_misaligned_load_handler(struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap)
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{
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return sbi_trap_emulate_load(regs, orig_trap,
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sbi_misaligned_ld_emulator);
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}
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static int sbi_misaligned_st_emulator(int wlen, union sbi_ldst_data in_val,
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struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap)
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{
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struct sbi_trap_info uptrap;
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int i;
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for (i = 0; i < wlen; i++) {
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sbi_store_u8((void *)(orig_trap->tval + i),
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in_val.data_bytes[i], &uptrap);
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if (uptrap.cause) {
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uptrap.epc = regs->mepc;
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uptrap.tinst = sbi_misaligned_tinst_fixup(
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orig_trap->tinst, uptrap.tinst, i);
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return sbi_trap_redirect(regs, &uptrap);
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}
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}
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return wlen;
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}
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int sbi_misaligned_store_handler(struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap)
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{
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return sbi_trap_emulate_store(regs, orig_trap,
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sbi_misaligned_st_emulator);
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}
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int sbi_load_access_handler(struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap)
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{
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return sbi_trap_redirect(regs, orig_trap);
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}
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int sbi_store_access_handler(struct sbi_trap_regs *regs,
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const struct sbi_trap_info *orig_trap)
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{
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return sbi_trap_redirect(regs, orig_trap);
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}
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