rework structure

bare-metal-bsp/env/.gitignore

@@ -0,0 +1 @@
+/*.o

bare-metal-bsp/env/common-clang.mk

@@ -22,7 +22,7 @@ INCLUDES += -I$(BSP_BASE)/drivers/
 INCLUDES += -I$(ENV_DIR)
 INCLUDES += -I$(PLATFORM_DIR)
 
-TOOL_DIR ?= $(BSP_BASE)/../toolchain/bin
+TOOL_DIR ?= $(BSP_BASE)/../toolchain/bin/
 
 LDFLAGS += -T $(LINKER_SCRIPT) -nostartfiles
 LDFLAGS += -L$(ENV_DIR) --specs=nano.specs
@@ -40,15 +40,17 @@ CFLAGS += -march=$(RISCV_ARCH)
 CFLAGS += -mabi=$(RISCV_ABI)
 CFLAGS += -mcmodel=medany
 
-TRIPLET?=riscv64-unknown-elf
+TRIPLET?=riscv32
-CXX=$(TOOL_DIR)/$(TRIPLET)-c++
+CXX=$(LLVM_TOOL_DIR)clang++ --target=$(TRIPLET) -isystem $(TOOL_DIR)/../$(TRIPLET)/include
-CC=$(TOOL_DIR)/$(TRIPLET)-gcc
+CC=$(LLVM_TOOL_DIR)clang --target=$(TRIPLET) -isystem $(TOOL_DIR)/../$(TRIPLET)/include
-LD=$(TOOL_DIR)/$(TRIPLET)-gcc
+LD=$(TOOL_DIR)$(TRIPLET)-gcc
-AR=$(TOOL_DIR)/$(TRIPLET)-ar
+AR=$(TOOL_DIR)$(TRIPLET)-ar
+OBJDUMP := $(TOOL_DIR)/$(TRIPLET)-objdump
 
 
 $(TARGET): $(LINK_OBJS) $(LINK_DEPS)
 	$(LD) $(LINK_OBJS) $(LDFLAGS) $(LIBWRAP) -o $@
+	$(OBJDUMP) -d -S $(TARGET) > $(TARGET).dis
 	
 $(ASM_OBJS): %.o: %.S $(HEADERS)
 	$(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $<
@@ -61,6 +63,10 @@ $(CXX_OBJS): %.o: %.cpp $(HEADERS)
 
 .PHONY: clean
 clean:
+	rm -f $(TARGET) $(LINK_OBJS)
+
+.PHONY: clean-all
+clean-all:
 	rm -f $(CLEAN_OBJS) $(LIBWRAP)
 
-endif # _SIFIVE_MK_COMMON
+endif

bare-metal-bsp/env/common-gcc.mk

@@ -0,0 +1,74 @@
+ifndef _MK_COMMON
+_MK_COMMON := # defined
+
+.PHONY: all
+all: $(TARGET)
+
+include $(BSP_BASE)/libwrap/libwrap.mk
+
+BOARD?=iss
+ENV_DIR = $(BSP_BASE)/env
+PLATFORM_DIR = $(ENV_DIR)/$(BOARD)
+
+ASM_SRCS += $(ENV_DIR)/start.S
+ASM_SRCS += $(ENV_DIR)/entry.S
+C_SRCS += $(PLATFORM_DIR)/init.c
+
+LINKER_SCRIPT := $(PLATFORM_DIR)/$(LINK_TARGET).lds
+
+INCLUDES += -I$(BSP_BASE)/include
+INCLUDES += -I$(BSP_BASE)/drivers/
+INCLUDES += -I$(ENV_DIR)
+INCLUDES += -I$(PLATFORM_DIR)
+
+TOOL_DIR ?= $(BSP_BASE)/../toolchain/bin/
+
+LDFLAGS += -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI)
+LDFLAGS += -T $(LINKER_SCRIPT) -Wl,-Map=$(TARGET).map  -nostartfiles
+LDFLAGS += -L$(ENV_DIR)
+# --specs=nano.specs
+
+ASM_OBJS := $(ASM_SRCS:.S=.o)
+C_OBJS   := $(C_SRCS:.c=.o)
+CXX_OBJS := $(CXX_SRCS:.cpp=.o)
+
+LINK_OBJS += $(ASM_OBJS) $(C_OBJS) $(CXX_OBJS)
+LINK_DEPS += $(LINKER_SCRIPT)
+
+CLEAN_OBJS += $(TARGET) $(LINK_OBJS)
+
+GCCVERSION = $(shell $(CC) --version | grep gcc | awk '{print($NF);}')
+ifeq ($(GCCVERSION),9.2)
+  CFLAGS += -march=$(RISCV_ARCH)
+else
+  CFLAGS += -march=$(RISCV_ARCH)_zicsr_zifencei
+endif
+CFLAGS += -mabi=$(RISCV_ABI)
+CFLAGS += -mcmodel=medany
+
+TRIPLET?=riscv64-unknown-elf
+CXX=$(TOOL_DIR)$(TRIPLET)-c++
+CC=$(TOOL_DIR)$(TRIPLET)-gcc
+LD=$(TOOL_DIR)$(TRIPLET)-gcc
+AR=$(TOOL_DIR)$(TRIPLET)-ar
+OBJDUMP := $(TOOL_DIR)$(TRIPLET)-objdump
+
+
+$(TARGET): $(LINK_OBJS) $(LINK_DEPS)
+	$(LD) $(LINK_OBJS) $(LDFLAGS) $(LIBWRAP) -o $@
+	$(OBJDUMP) -d -S $(TARGET) > $(TARGET).dis
+	
+$(ASM_OBJS): %.o: %.S $(HEADERS)
+	$(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $<
+
+$(C_OBJS): %.o: %.c $(HEADERS)
+	$(CC) $(CFLAGS) $(INCLUDES) -include sys/cdefs.h -c -o $@ $<
+
+$(CXX_OBJS): %.o: %.cpp $(HEADERS)
+	$(CXX) $(CFLAGS) $(CXXFLAGS) $(INCLUDES) -include sys/cdefs.h -c -o $@ $<
+
+.PHONY: clean
+clean:
+	rm -f $(CLEAN_OBJS) $(LIBWRAP)
+
+endif

bare-metal-bsp/env/entry.S

@@ -4,11 +4,10 @@
 #define ENTRY_S
 
 #include "encoding.h"
-#include "sifive/bits.h"
+#include "rtl/bits.h"
 
   .section      .text.entry	
   .align 2
-  .weak trap_entry
   .global trap_entry
 trap_entry:
   addi sp, sp, -32*REGBYTES
@@ -28,6 +27,7 @@ trap_entry:
   STORE x13, 13*REGBYTES(sp)
   STORE x14, 14*REGBYTES(sp)
   STORE x15, 15*REGBYTES(sp)
+#ifndef __riscv_abi_rve
   STORE x16, 16*REGBYTES(sp)
   STORE x17, 17*REGBYTES(sp)
   STORE x18, 18*REGBYTES(sp)
@@ -44,7 +44,7 @@ trap_entry:
   STORE x29, 29*REGBYTES(sp)
   STORE x30, 30*REGBYTES(sp)
   STORE x31, 31*REGBYTES(sp)
-
+#endif
   csrr a0, mcause
   csrr a1, mepc
   mv a2, sp
@@ -70,6 +70,7 @@ trap_entry:
   LOAD x13, 13*REGBYTES(sp)
   LOAD x14, 14*REGBYTES(sp)
   LOAD x15, 15*REGBYTES(sp)
+#ifndef __riscv_abi_rve
   LOAD x16, 16*REGBYTES(sp)
   LOAD x17, 17*REGBYTES(sp)
   LOAD x18, 18*REGBYTES(sp)
@@ -86,7 +87,7 @@ trap_entry:
   LOAD x29, 29*REGBYTES(sp)
   LOAD x30, 30*REGBYTES(sp)
   LOAD x31, 31*REGBYTES(sp)
-
+#endif
   addi sp, sp, 32*REGBYTES
   mret
 

bare-metal-bsp/env/iss/.gitignore

@@ -0,0 +1 @@
+/*.o

bare-metal-bsp/env/iss/init.c

@@ -1,4 +1,3 @@
-//See LICENSE for license details.
 #include <stdint.h>
 #include <stdio.h>
 #include <unistd.h>
@@ -9,38 +8,55 @@
 extern int main(int argc, char** argv);
 extern void trap_entry();
 
-static unsigned long get_cpu_freq()
+static unsigned long mtime_lo(void)
 {
-  return 65000000;
+    unsigned long ret;
+    __asm volatile("rdtime %0":"=r"(ret));
+    return ret;
 }
 
-unsigned long get_timer_freq()
+
+#if __riscv_xlen==32
+
+static uint32_t mtime_hi(void)
 {
-  return get_cpu_freq();
+    unsigned long ret;
+    __asm volatile("rdtimeh %0":"=r"(ret));
+    return ret;
 }
 
 uint64_t get_timer_value()
 {
-#if __riscv_xlen == 32
   while (1) {
-    uint32_t hi = read_csr(mcycleh);
+    uint32_t hi = mtime_hi();
-    uint32_t lo = read_csr(mcycle);
+    uint32_t lo = mtime_lo();
-    if (hi == read_csr(mcycleh))
+    if (hi == mtime_hi())
       return ((uint64_t)hi << 32) | lo;
   }
-#else
-  return read_csr(mcycle);
-#endif
 }
 
-static void uart_init(size_t baud_rate)
+#elif __riscv_xlen==64
+
+uint64_t get_timer_value()
 {
-  GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
+  return mtime_lo();
-  GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
-  UART0_REG(UART_REG_DIV) = get_cpu_freq() / baud_rate - 1;
-  UART0_REG(UART_REG_TXCTRL) |= UART_TXEN;
 }
 
+#endif
+
+unsigned long get_timer_freq()
+{
+  return 32768;
+}
+
+unsigned long get_cpu_freq()
+{
+  return 10000000;
+}
+
+void init_pll(void){
+
+}
 
 #ifdef USE_PLIC
 extern void handle_m_ext_interrupt();
@@ -65,7 +81,7 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
 #endif
   }
   else {
-    write(1, "Unhandled Trap:\n", 16);
+    write(1, "trap\n", 5);
     _exit(1 + mcause);
   }
   return epc;
@@ -73,13 +89,17 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
 
 void _init()
 {
-  #ifndef NO_INIT
-  uart_init(115200);
   
+#ifndef NO_INIT
+  init_pll();
   printf("core freq at %d Hz\n", get_cpu_freq());
-
   write_csr(mtvec, &trap_entry);
-  #endif
+  if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
+    write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
+    write_csr(fcsr, 0); // initialize rounding mode, undefined at reset
+  }
+#endif
+  
 }
 
 void _fini()

bare-metal-bsp/env/iss/link.lds

@@ -4,8 +4,8 @@ ENTRY( _start )
 
 MEMORY
 {
-  flash (rxai!w) : ORIGIN = 0x20400000, LENGTH = 512M
+  flash (rxai!w) : ORIGIN = 0x00000020, LENGTH = 1M
-  ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 16K
+  ram (wxa!ri) :   ORIGIN = 0x10000000, LENGTH = 16K
 }
 
 PHDRS
@@ -19,7 +19,7 @@ SECTIONS
 {
   __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
 
-  .init           :
+  .init ORIGIN(flash)        :
   {
     KEEP (*(SORT_NONE(.init)))
   } >flash AT>flash :flash
@@ -118,6 +118,7 @@ SECTIONS
 
   .data          :
   {
+    __DATA_BEGIN__ = .;
     *(.data .data.*)
     *(.gnu.linkonce.d.*)
   } >ram AT>flash :ram_init
@@ -134,6 +135,7 @@ SECTIONS
 
   .sdata          :
   {
+    __SDATA_BEGIN__ = .;
     *(.sdata .sdata.*)
     *(.gnu.linkonce.s.*)
   } >ram AT>flash :ram_init
@@ -155,6 +157,8 @@ SECTIONS
   } >ram AT>ram :ram
 
   . = ALIGN(8);
+  __BSS_END__ = .;
+  __global_pointer$ = MIN(__SDATA_BEGIN__ + 0x800,  MAX(__DATA_BEGIN__ + 0x800, __BSS_END__ - 0x800));
   PROVIDE( _end = . );
   PROVIDE( end = . );
 
@@ -164,4 +168,7 @@ SECTIONS
     . = __stack_size;
     PROVIDE( _sp = . );
   } >ram AT>ram :ram
+
+  PROVIDE( tohost = 0xfffffff0 );
+  PROVIDE( fromhost = 0xfffffff8 );
 }

bare-metal-bsp/env/iss/platform.h

@@ -0,0 +1,30 @@
+// See LICENSE for license details.
+
+#ifndef _ISS_PLATFORM_H
+#define _ISS_PLATFORM_H
+
+// Some things missing from the official encoding.h
+#define MCAUSE_INT         0x80000000
+#define MCAUSE_CAUSE       0x7FFFFFFF
+
+#include "rtl/const.h"
+/****************************************************************************
+ * Platform definitions
+ *****************************************************************************/
+
+#define MEM_BASE_ADDR _AC(0x00000000,UL)
+
+// Helper functions
+#define _REG32(p, i) (*(volatile uint32_t *) ((p) + (i)))
+#define _REG32P(p, i) ((volatile uint32_t *) ((p) + (i)))
+
+// Misc
+
+#include <stdint.h>
+
+void init_pll(void);
+unsigned long get_cpu_freq(void);
+unsigned long get_timer_freq(void);
+uint64_t get_timer_value(void);
+
+#endif /* _ISS_PLATFORM_H */

bare-metal-bsp/env/rtl/.gitignore

@@ -0,0 +1 @@
+/*.o

bare-metal-bsp/env/rtl/init.c

@@ -1,4 +1,3 @@
-//See LICENSE for license details.
 #include <stdint.h>
 #include <stdio.h>
 #include <unistd.h>
@@ -9,38 +8,55 @@
 extern int main(int argc, char** argv);
 extern void trap_entry();
 
-static unsigned long get_cpu_freq()
+static unsigned long mtime_lo(void)
 {
-  return 65000000;
+    unsigned long ret;
+    __asm volatile("rdtime %0":"=r"(ret));
+    return ret;
 }
 
-unsigned long get_timer_freq()
+
+#if __riscv_xlen==32
+
+static uint32_t mtime_hi(void)
 {
-  return get_cpu_freq();
+    unsigned long ret;
+    __asm volatile("rdtimeh %0":"=r"(ret));
+    return ret;
 }
 
 uint64_t get_timer_value()
 {
-#if __riscv_xlen == 32
   while (1) {
-    uint32_t hi = read_csr(mcycleh);
+    uint32_t hi = mtime_hi();
-    uint32_t lo = read_csr(mcycle);
+    uint32_t lo = mtime_lo();
-    if (hi == read_csr(mcycleh))
+    if (hi == mtime_hi())
       return ((uint64_t)hi << 32) | lo;
   }
-#else
-  return read_csr(mcycle);
-#endif
 }
 
-static void uart_init(size_t baud_rate)
+#elif __riscv_xlen==64
+
+uint64_t get_timer_value()
 {
-  GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
+  return mtime_lo();
-  GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
-  UART0_REG(UART_REG_DIV) = get_cpu_freq() / baud_rate - 1;
-  UART0_REG(UART_REG_TXCTRL) |= UART_TXEN;
 }
 
+#endif
+
+unsigned long get_timer_freq()
+{
+  return 32768;
+}
+
+unsigned long get_cpu_freq()
+{
+  return 10000000;
+}
+
+void init_pll(void){
+
+}
 
 #ifdef USE_PLIC
 extern void handle_m_ext_interrupt();
@@ -65,7 +81,7 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
 #endif
   }
   else {
-    write(1, "Unhandled Trap:\n", 16);
+    write(1, "trap\n", 5);
     _exit(1 + mcause);
   }
   return epc;
@@ -73,13 +89,17 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
 
 void _init()
 {
-  #ifndef NO_INIT
-  uart_init(115200);
   
+#ifndef NO_INIT
+  init_pll();
   printf("core freq at %d Hz\n", get_cpu_freq());
-
   write_csr(mtvec, &trap_entry);
-  #endif
+  if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
+    write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
+    write_csr(fcsr, 0); // initialize rounding mode, undefined at reset
+  }
+#endif
+  
 }
 
 void _fini()

bare-metal-bsp/env/rtl/link.lds

@@ -4,9 +4,8 @@ ENTRY( _start )
 
 MEMORY
 {
-  /*flash (rxai!w) : ORIGIN = 0x00000000, LENGTH = 1M*/
+  flash (rxai!w) : ORIGIN = 0x00000000, LENGTH = 1M
-  flash (rxai!w) : ORIGIN = 0x20400000, LENGTH = 512M
+  ram (wxa!ri) :   ORIGIN = 0x10000000, LENGTH = 16K
-  ram (wxa!ri) :   ORIGIN = 0x80000000, LENGTH = 16K
 }
 
 PHDRS
@@ -20,7 +19,7 @@ SECTIONS
 {
   __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
 
-  .init           :
+  .init ORIGIN(flash)        :
   {
     KEEP (*(SORT_NONE(.init)))
   } >flash AT>flash :flash
@@ -165,4 +164,7 @@ SECTIONS
     . = __stack_size;
     PROVIDE( _sp = . );
   } >ram AT>ram :ram
+
+  PROVIDE( tohost = 0x00018000 );
+  PROVIDE( fromhost = 0xfffffff8 );
 }

bare-metal-bsp/env/rtl/platform.h

@@ -0,0 +1,30 @@
+// See LICENSE for license details.
+
+#ifndef _ISS_PLATFORM_H
+#define _ISS_PLATFORM_H
+
+// Some things missing from the official encoding.h
+#define MCAUSE_INT         0x80000000
+#define MCAUSE_CAUSE       0x7FFFFFFF
+
+#include "rtl/const.h"
+/****************************************************************************
+ * Platform definitions
+ *****************************************************************************/
+
+#define MEM_BASE_ADDR _AC(0x00000000,UL)
+
+// Helper functions
+#define _REG32(p, i) (*(volatile uint32_t *) ((p) + (i)))
+#define _REG32P(p, i) ((volatile uint32_t *) ((p) + (i)))
+
+// Misc
+
+#include <stdint.h>
+
+void init_pll(void);
+unsigned long get_cpu_freq(void);
+unsigned long get_timer_freq(void);
+uint64_t get_timer_value(void);
+
+#endif /* _ISS_PLATFORM_H */

bare-metal-bsp/env/start.S

@@ -5,7 +5,10 @@
 	.type _start,@function
 
 _start:
-	la gp, _gp
+.option push
+.option norelax
+    la gp, __global_pointer$
+.option pop
 	la sp, _sp
 
 	/* Load data section */
@@ -32,10 +35,11 @@ _start:
 2:
 
 	/* Call global constructors */
+#ifdef HAVE_INIT_FINI
 	la a0, __libc_fini_array
 	call atexit
 	call __libc_init_array
-
+#endif
 #ifndef __riscv_float_abi_soft
 	/* Enable FPU */
 	li t0, MSTATUS_FS
@@ -51,4 +55,4 @@ _start:
 	li a0, 0
 	li a1, 0
 	call main
-	tail exit
+	tail _exit

bare-metal-bsp/include/rtl/const.h

@@ -0,0 +1,27 @@
+#ifndef _RTL_CONST_H
+#define _RTL_CONST_H
+
+#ifdef __ASSEMBLER__
+#define _AC(X,Y)        X
+#define _AT(T,X)        X
+#else
+#define _AC(X,Y)        (X##Y)
+#define _AT(T,X)        ((T)(X))
+#endif /* !__ASSEMBLER__*/
+
+#define _BITUL(x)       (_AC(1,UL) << (x))
+#define _BITULL(x)      (_AC(1,ULL) << (x))
+
+#define UART0_BASE_ADDR 0xffff0000ULL
+
+#define UART_REG_TXFIFO         0x00
+#define UART_REG_RXFIFO         0x04
+#define UART_REG_TXCTRL         0x08
+#define UART_REG_RXCTRL         0x0c
+#define UART_REG_IE             0x10
+#define UART_REG_IP             0x14
+#define UART_REG_DIV            0x18
+#define UART_TXEN               0x1
+
+#define UART0_REG(ADDR) *((volatile uint32_t*) (UART0_BASE_ADDR + ADDR))
+#endif /* _RTL_CONST_H */

bare-metal-bsp/libwrap/libwrap.mk

@@ -1,7 +1,5 @@
-# See LICENSE for license details.
+ifndef _MK_LIBWRAP
-
+_MK_LIBWRAP := # defined
-ifndef _SIFIVE_MK_LIBWRAP
-_SIFIVE_MK_LIBWRAP := # defined
 
 LIBWRAP_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
 LIBWRAP_DIR := $(LIBWRAP_DIR:/=)
@@ -26,7 +24,8 @@ LIBWRAP_SRCS := \
 	sys/times.c \
 	sys/sbrk.c \
 	sys/_exit.c \
-	misc/write_hex.c
+	misc/write_hex.c \
+	sys/printf.c
 
 LIBWRAP_SRCS := $(foreach f,$(LIBWRAP_SRCS),$(LIBWRAP_DIR)/$(f))
 LIBWRAP_OBJS := $(LIBWRAP_SRCS:.c=.o)
@@ -51,4 +50,4 @@ $(LIBWRAP_OBJS): %.o: %.c $(HEADERS)
 $(LIBWRAP): $(LIBWRAP_OBJS)
 	$(AR) rcs $@ $^
 
-endif # _SIFIVE_MK_LIBWRAP
+endif # _MK_LIBWRAP

bare-metal-bsp/libwrap/misc/.gitignore

@@ -0,0 +1 @@
+/*.o

bare-metal-bsp/libwrap/stdlib/.gitignore

@@ -0,0 +1 @@
+/*.o

bare-metal-bsp/libwrap/sys/.gitignore

@@ -0,0 +1 @@
+/*.o

bare-metal-bsp/libwrap/sys/_exit.c

@@ -3,6 +3,9 @@
 #include <unistd.h>
 #include "platform.h"
 
+extern volatile uint32_t tohost;
+extern volatile uint32_t fromhost;
+
 void __wrap__exit(int code)
 {
 //volatile uint32_t* leds = (uint32_t*) (GPIO_BASE_ADDR + GPIO_OUT_OFFSET);
@@ -12,6 +15,7 @@ void __wrap__exit(int code)
   write(STDERR_FILENO, message, sizeof(message) - 1);
   write_hex(STDERR_FILENO, code);
   write(STDERR_FILENO, "\n", 1);
-
+  tohost = code+1;
+  write(STDERR_FILENO, "\x04", 1);
   for (;;);
 }

bare-metal-bsp/libwrap/sys/printf.c

@@ -14,6 +14,13 @@ int putchar(int ch)
   return write(STDOUT_FILENO, &ch, 1) == 1 ? ch : -1;
 }
 
+size_t strnlen (const char *str, size_t n)
+{
+  const char *start = str;
+  while (n-- > 0 && *str) str++;
+  return str - start;
+}
+
 static void sprintf_putch(int ch, void** data)
 {
   char** pstr = (char**)data;

benchmarks/coremark/cm

@@ -0,0 +1 @@
+Subproject commit 0000000000000000000000000000000000000000

benchmarks/coremark/tgc/core_portme.c

@@ -0,0 +1,197 @@
+/*
+Copyright 2018 Embedded Microprocessor Benchmark Consortium (EEMBC)
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+Original Author: Shay Gal-on
+*/
+#include "coremark.h"
+#include "core_portme.h"
+//Read cycle CSR
+unsigned long long _read_cycle()
+{
+    unsigned long long result;
+    unsigned long lower;
+    unsigned long upper1;
+    unsigned long upper2;
+
+    asm volatile (
+        "repeat_cycle_%=: csrr %0, cycleh;\n"
+        "        csrr %1, cycle;\n"
+        "        csrr %2, cycleh;\n"
+        "        bne %0, %2, repeat_cycle_%=;\n"
+        : "=r" (upper1),"=r" (lower),"=r" (upper2)    // Outputs   : temp variable for load result
+        :
+        :
+    );
+    *(unsigned long *)(&result) = lower;
+    *((unsigned long *)(&result)+1) = upper1;
+
+    return result;
+}
+
+volatile int tohost;
+volatile int fromhost;
+
+void exit(int n){
+      tohost = 0x1;
+      for (;;);
+}
+
+void __libc_init_array (void) {
+/*
+    size_t count;
+    size_t i;
+    count = __preinit_array_end - __preinit_array_start;
+    for (i = 0; i < count; i++)
+        __preinit_array_start[i] ();
+
+#ifdef HAVE_INIT_FINI
+    _init ();
+#endif
+
+    count = __init_array_end - __init_array_start;
+    for (i = 0; i < count; i++)
+    __init_array_start[i] ();
+*/
+}
+#if VALIDATION_RUN
+volatile ee_s32 seed1_volatile = 0x3415;
+volatile ee_s32 seed2_volatile = 0x3415;
+volatile ee_s32 seed3_volatile = 0x66;
+#endif
+#if PERFORMANCE_RUN
+volatile ee_s32 seed1_volatile = 0x0;
+volatile ee_s32 seed2_volatile = 0x0;
+volatile ee_s32 seed3_volatile = 0x66;
+#endif
+#if PROFILE_RUN
+volatile ee_s32 seed1_volatile = 0x8;
+volatile ee_s32 seed2_volatile = 0x8;
+volatile ee_s32 seed3_volatile = 0x8;
+#endif
+volatile ee_s32 seed4_volatile = ITERATIONS;
+volatile ee_s32 seed5_volatile = 0;
+/* Porting : Timing functions
+        How to capture time and convert to seconds must be ported to whatever is
+   supported by the platform. e.g. Read value from on board RTC, read value from
+   cpu clock cycles performance counter etc. Sample implementation for standard
+   time.h and windows.h definitions included.
+*/
+CORETIMETYPE
+barebones_clock()
+{
+    return (CORETIMETYPE)_read_cycle();
+}
+/* Define : TIMER_RES_DIVIDER
+        Divider to trade off timer resolution and total time that can be
+   measured.
+
+        Use lower values to increase resolution, but make sure that overflow
+   does not occur. If there are issues with the return value overflowing,
+   increase this value.
+        */
+#define GETMYTIME(_t)              (*_t = barebones_clock())
+#define MYTIMEDIFF(fin, ini)       ((fin) - (ini))
+#define TIMER_RES_DIVIDER          1
+#define SAMPLE_TIME_IMPLEMENTATION 1
+#define EE_TICKS_PER_SEC           (CLOCKS_PER_SEC / TIMER_RES_DIVIDER)
+
+/** Define Host specific (POSIX), or target specific global time variables. */
+static CORETIMETYPE start_time_val, stop_time_val;
+
+/* Function : start_time
+        This function will be called right before starting the timed portion of
+   the benchmark.
+
+        Implementation may be capturing a system timer (as implemented in the
+   example code) or zeroing some system parameters - e.g. setting the cpu clocks
+   cycles to 0.
+*/
+void
+start_time(void)
+{
+    GETMYTIME(&start_time_val);
+}
+/* Function : stop_time
+        This function will be called right after ending the timed portion of the
+   benchmark.
+
+        Implementation may be capturing a system timer (as implemented in the
+   example code) or other system parameters - e.g. reading the current value of
+   cpu cycles counter.
+*/
+void
+stop_time(void)
+{
+    GETMYTIME(&stop_time_val);
+}
+/* Function : get_time
+        Return an abstract "ticks" number that signifies time on the system.
+
+        Actual value returned may be cpu cycles, milliseconds or any other
+   value, as long as it can be converted to seconds by <time_in_secs>. This
+   methodology is taken to accomodate any hardware or simulated platform. The
+   sample implementation returns millisecs by default, and the resolution is
+   controlled by <TIMER_RES_DIVIDER>
+*/
+CORE_TICKS
+get_time(void)
+{
+    CORE_TICKS elapsed
+        = (CORE_TICKS)(MYTIMEDIFF(stop_time_val, start_time_val));
+    return elapsed;
+}
+/* Function : time_in_secs
+        Convert the value returned by get_time to seconds.
+
+        The <secs_ret> type is used to accomodate systems with no support for
+   floating point. Default implementation implemented by the EE_TICKS_PER_SEC
+   macro above.
+*/
+secs_ret
+time_in_secs(CORE_TICKS ticks)
+{
+    secs_ret retval = ((secs_ret)ticks) / (secs_ret)EE_TICKS_PER_SEC;
+    return retval;
+}
+
+ee_u32 default_num_contexts = 1;
+
+/* Function : portable_init
+        Target specific initialization code
+        Test for some common mistakes.
+*/
+void
+portable_init(core_portable *p, int *argc, char *argv[])
+{
+    if (sizeof(ee_ptr_int) != sizeof(ee_u8 *))
+    {
+        ee_printf(
+            "ERROR! Please define ee_ptr_int to a type that holds a "
+            "pointer!\n");
+    }
+    if (sizeof(ee_u32) != 4)
+    {
+        ee_printf("ERROR! Please define ee_u32 to a 32b unsigned type!\n");
+    }
+    p->portable_id = 1;
+}
+/* Function : portable_fini
+        Target specific final code
+*/
+void
+portable_fini(core_portable *p)
+{
+    p->portable_id = 0;
+}

benchmarks/coremark/tgc/core_portme.h

@@ -0,0 +1,210 @@
+/*
+Copyright 2018 Embedded Microprocessor Benchmark Consortium (EEMBC)
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+Original Author: Shay Gal-on
+*/
+/* Topic : Description
+        This file contains configuration constants required to execute on
+   different platforms
+*/
+#ifndef CORE_PORTME_H
+#define CORE_PORTME_H
+/************************/
+/* Data types and settings */
+/************************/
+/* Configuration : HAS_FLOAT
+        Define to 1 if the platform supports floating point.
+*/
+#ifndef HAS_FLOAT
+#define HAS_FLOAT 0
+#endif
+/* Configuration : HAS_TIME_H
+        Define to 1 if platform has the time.h header file,
+        and implementation of functions thereof.
+*/
+#ifndef HAS_TIME_H
+#define HAS_TIME_H 0
+#endif
+/* Configuration : USE_CLOCK
+        Define to 1 if platform has the time.h header file,
+        and implementation of functions thereof.
+*/
+#ifndef USE_CLOCK
+#define USE_CLOCK 0
+#endif
+/* Configuration : HAS_STDIO
+        Define to 1 if the platform has stdio.h.
+*/
+#ifndef HAS_STDIO
+#define HAS_STDIO 0
+#endif
+/* Configuration : HAS_PRINTF
+        Define to 1 if the platform has stdio.h and implements the printf
+   function.
+*/
+#ifndef HAS_PRINTF
+#define HAS_PRINTF 0
+#endif
+
+/* Definitions : COMPILER_VERSION, COMPILER_FLAGS, MEM_LOCATION
+        Initialize these strings per platform
+*/
+#ifndef COMPILER_VERSION
+#ifdef __GNUC__
+#define COMPILER_VERSION "GCC"__VERSION__
+#else
+#define COMPILER_VERSION "Please put compiler version here (e.g. gcc 4.1)"
+#endif
+#endif
+#ifndef COMPILER_FLAGS
+#define COMPILER_FLAGS \
+    FLAGS_STR /* "Please put compiler flags here (e.g. -o3)" */
+#endif
+#ifndef MEM_LOCATION
+#define MEM_LOCATION "STACK"
+#endif
+
+/* Data Types :
+        To avoid compiler issues, define the data types that need ot be used for
+   8b, 16b and 32b in <core_portme.h>.
+
+        *Imprtant* :
+        ee_ptr_int needs to be the data type used to hold pointers, otherwise
+   coremark may fail!!!
+*/
+typedef signed short   ee_s16;
+typedef unsigned short ee_u16;
+typedef signed int     ee_s32;
+typedef double         ee_f32;
+typedef unsigned char  ee_u8;
+typedef unsigned int   ee_u32;
+typedef ee_u32         ee_ptr_int;
+typedef ee_u32         ee_size_t;
+#define NULL ((void *)0)
+/* align_mem :
+        This macro is used to align an offset to point to a 32b value. It is
+   used in the Matrix algorithm to initialize the input memory blocks.
+*/
+#define align_mem(x) (void *)(4 + (((ee_ptr_int)(x)-1) & ~3))
+
+/* Configuration : CORE_TICKS
+        Define type of return from the timing functions.
+ */
+#define CORETIMETYPE ee_u32
+typedef ee_u32 CORE_TICKS;
+
+/* Configuration : SEED_METHOD
+        Defines method to get seed values that cannot be computed at compile
+   time.
+
+        Valid values :
+        SEED_ARG - from command line.
+        SEED_FUNC - from a system function.
+        SEED_VOLATILE - from volatile variables.
+*/
+#ifndef SEED_METHOD
+#define SEED_METHOD SEED_VOLATILE
+#endif
+
+/* Configuration : MEM_METHOD
+        Defines method to get a block of memry.
+
+        Valid values :
+        MEM_MALLOC - for platforms that implement malloc and have malloc.h.
+        MEM_STATIC - to use a static memory array.
+        MEM_STACK - to allocate the data block on the stack (NYI).
+*/
+#ifndef MEM_METHOD
+#define MEM_METHOD MEM_STACK
+#endif
+
+/* Configuration : MULTITHREAD
+        Define for parallel execution
+
+        Valid values :
+        1 - only one context (default).
+        N>1 - will execute N copies in parallel.
+
+        Note :
+        If this flag is defined to more then 1, an implementation for launching
+   parallel contexts must be defined.
+
+        Two sample implementations are provided. Use <USE_PTHREAD> or <USE_FORK>
+   to enable them.
+
+        It is valid to have a different implementation of <core_start_parallel>
+   and <core_end_parallel> in <core_portme.c>, to fit a particular architecture.
+*/
+#ifndef MULTITHREAD
+#define MULTITHREAD 1
+#define USE_PTHREAD 0
+#define USE_FORK    0
+#define USE_SOCKET  0
+#endif
+
+/* Configuration : MAIN_HAS_NOARGC
+        Needed if platform does not support getting arguments to main.
+
+        Valid values :
+        0 - argc/argv to main is supported
+        1 - argc/argv to main is not supported
+
+        Note :
+        This flag only matters if MULTITHREAD has been defined to a value
+   greater then 1.
+*/
+#ifndef MAIN_HAS_NOARGC
+#define MAIN_HAS_NOARGC 0
+#endif
+
+/* Configuration : MAIN_HAS_NORETURN
+        Needed if platform does not support returning a value from main.
+
+        Valid values :
+        0 - main returns an int, and return value will be 0.
+        1 - platform does not support returning a value from main
+*/
+#ifndef MAIN_HAS_NORETURN
+#define MAIN_HAS_NORETURN 0
+#endif
+
+/* Variable : default_num_contexts
+        Not used for this simple port, must cintain the value 1.
+*/
+extern ee_u32 default_num_contexts;
+
+typedef struct CORE_PORTABLE_S
+{
+    ee_u8 portable_id;
+} core_portable;
+
+/* target specific init/fini */
+void portable_init(core_portable *p, int *argc, char *argv[]);
+void portable_fini(core_portable *p);
+
+#if !defined(PROFILE_RUN) && !defined(PERFORMANCE_RUN) \
+    && !defined(VALIDATION_RUN)
+#if (TOTAL_DATA_SIZE == 1200)
+#define PROFILE_RUN 1
+#elif (TOTAL_DATA_SIZE == 2000)
+#define PERFORMANCE_RUN 1
+#else
+#define VALIDATION_RUN 1
+#endif
+#endif
+
+int ee_printf(const char *fmt, ...);
+
+#endif /* CORE_PORTME_H */

benchmarks/coremark/tgc/core_portme.mak

@@ -0,0 +1,94 @@
+# Copyright 2018 Embedded Microprocessor Benchmark Consortium (EEMBC)
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#    http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+# 
+# Original Author: Shay Gal-on
+
+#File : core_portme.mak
+ISA?=imc
+RISCV_ARCH:=rv32$(ISA)
+RISCV_ABI:=ilp32
+
+# Flag : OUTFLAG
+#	Use this flag to define how to to get an executable (e.g -o)
+OUTFLAG= -o
+# Flag : CC
+#	Use this flag to define compiler to use
+CC 		= riscv32-unknown-elf-gcc
+# Flag : LD
+#	Use this flag to define compiler to use
+LD		= riscv32-unknown-elf-gcc
+# Flag : AS
+#	Use this flag to define compiler to use
+AS		= riscv32-unknown-elf-as
+# Flag : CFLAGS
+#	Use this flag to define compiler options. Note, you can add compiler options from the command line using XCFLAGS="other flags"
+PORT_CFLAGS = -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI) -O3 -DCLOCKS_PER_SEC=10000000 -nostdlib -nostartfiles -nodefaultlibs \
+ -funroll-loops -fpeel-loops -fgcse-sm -fgcse-las -flto
+FLAGS_STR = "$(PORT_CFLAGS) $(XCFLAGS) $(XLFLAGS) $(LFLAGS_END)"
+CFLAGS = $(PORT_CFLAGS) -I$(PORT_DIR) -I. -DFLAGS_STR=\"$(FLAGS_STR)\" 
+#Flag : LFLAGS_END
+#	Define any libraries needed for linking or other flags that should come at the end of the link line (e.g. linker scripts). 
+#	Note : On certain platforms, the default clock_gettime implementation is supported but requires linking of librt.
+SEPARATE_COMPILE=1
+# Flag : SEPARATE_COMPILE
+# You must also define below how to create an object file, and how to link.
+OBJOUT 	= -o
+LFLAGS 	= 
+#--specs=nano.specs -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI) 
+ASFLAGS =
+OFLAG 	= -o
+COUT 	= -c
+
+LFLAGS_END = 
+# Flag : PORT_SRCS
+# 	Port specific source files can be added here
+#	You may also need cvt.c if the fcvt functions are not provided as intrinsics by your compiler!
+PORT_SRCS = $(PORT_DIR)/core_portme.c $(PORT_DIR)/ee_printf.c
+vpath %.c $(PORT_DIR)
+vpath %.s $(PORT_DIR)
+PORT_OBJS = core_portme.o ee_printf.o
+# Flag : LOAD
+#	For a simple port, we assume self hosted compile and run, no load needed.
+
+# Flag : RUN
+#	For a simple port, we assume self hosted compile and run, simple invocation of the executable
+
+LOAD = echo ""
+RUN = echo ""
+
+OEXT = .o
+EXE = .elf
+
+$(OPATH)$(PORT_DIR)/%$(OEXT) : %.c
+	$(CC) $(CFLAGS) $(XCFLAGS) $(COUT) $< $(OBJOUT) $@
+
+$(OPATH)%$(OEXT) : %.c
+	$(CC) $(CFLAGS) $(XCFLAGS) $(COUT) $< $(OBJOUT) $@
+
+$(OPATH)$(PORT_DIR)/%$(OEXT) : %.s
+	$(AS) $(ASFLAGS) $< $(OBJOUT) $@
+
+# Target : port_pre% and port_post%
+# For the purpose of this simple port, no pre or post steps needed.
+
+.PHONY : port_prebuild port_postbuild port_prerun port_postrun port_preload port_postload
+port_pre% port_post% : 
+
+# FLAG : OPATH
+# Path to the output folder. Default - current folder.
+OPATH = ./
+MKDIR = mkdir -p
+
+dist-clean: clean
+	rm -f *.o

benchmarks/coremark/tgc/cvt.c

@@ -0,0 +1,127 @@
+/*
+Copyright 2018 Embedded Microprocessor Benchmark Consortium (EEMBC)
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+*/
+#include <math.h>
+#define CVTBUFSIZE 80
+static char CVTBUF[CVTBUFSIZE];
+
+static char *
+cvt(double arg, int ndigits, int *decpt, int *sign, char *buf, int eflag)
+{
+    int    r2;
+    double fi, fj;
+    char * p, *p1;
+
+    if (ndigits < 0)
+        ndigits = 0;
+    if (ndigits >= CVTBUFSIZE - 1)
+        ndigits = CVTBUFSIZE - 2;
+    r2    = 0;
+    *sign = 0;
+    p     = &buf[0];
+    if (arg < 0)
+    {
+        *sign = 1;
+        arg   = -arg;
+    }
+    arg = modf(arg, &fi);
+    p1  = &buf[CVTBUFSIZE];
+
+    if (fi != 0)
+    {
+        p1 = &buf[CVTBUFSIZE];
+        while (fi != 0)
+        {
+            fj    = modf(fi / 10, &fi);
+            *--p1 = (int)((fj + .03) * 10) + '0';
+            r2++;
+        }
+        while (p1 < &buf[CVTBUFSIZE])
+            *p++ = *p1++;
+    }
+    else if (arg > 0)
+    {
+        while ((fj = arg * 10) < 1)
+        {
+            arg = fj;
+            r2--;
+        }
+    }
+    p1 = &buf[ndigits];
+    if (eflag == 0)
+        p1 += r2;
+    *decpt = r2;
+    if (p1 < &buf[0])
+    {
+        buf[0] = '\0';
+        return buf;
+    }
+    while (p <= p1 && p < &buf[CVTBUFSIZE])
+    {
+        arg *= 10;
+        arg  = modf(arg, &fj);
+        *p++ = (int)fj + '0';
+    }
+    if (p1 >= &buf[CVTBUFSIZE])
+    {
+        buf[CVTBUFSIZE - 1] = '\0';
+        return buf;
+    }
+    p = p1;
+    *p1 += 5;
+    while (*p1 > '9')
+    {
+        *p1 = '0';
+        if (p1 > buf)
+            ++*--p1;
+        else
+        {
+            *p1 = '1';
+            (*decpt)++;
+            if (eflag == 0)
+            {
+                if (p > buf)
+                    *p = '0';
+                p++;
+            }
+        }
+    }
+    *p = '\0';
+    return buf;
+}
+
+char *
+ecvt(double arg, int ndigits, int *decpt, int *sign)
+{
+    return cvt(arg, ndigits, decpt, sign, CVTBUF, 1);
+}
+
+char *
+ecvtbuf(double arg, int ndigits, int *decpt, int *sign, char *buf)
+{
+    return cvt(arg, ndigits, decpt, sign, buf, 1);
+}
+
+char *
+fcvt(double arg, int ndigits, int *decpt, int *sign)
+{
+    return cvt(arg, ndigits, decpt, sign, CVTBUF, 0);
+}
+
+char *
+fcvtbuf(double arg, int ndigits, int *decpt, int *sign, char *buf)
+{
+    return cvt(arg, ndigits, decpt, sign, buf, 0);
+}

benchmarks/coremark/tgc/ee_printf.c

@@ -0,0 +1,701 @@
+/*
+Copyright 2018 Embedded Microprocessor Benchmark Consortium (EEMBC)
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+*/
+
+#include <coremark.h>
+#include <stdarg.h>
+
+#define ZEROPAD   (1 << 0) /* Pad with zero */
+#define SIGN      (1 << 1) /* Unsigned/signed long */
+#define PLUS      (1 << 2) /* Show plus */
+#define SPACE     (1 << 3) /* Spacer */
+#define LEFT      (1 << 4) /* Left justified */
+#define HEX_PREP  (1 << 5) /* 0x */
+#define UPPERCASE (1 << 6) /* 'ABCDEF' */
+
+#define is_digit(c) ((c) >= '0' && (c) <= '9')
+
+static char *    digits       = "0123456789abcdefghijklmnopqrstuvwxyz";
+static char *    upper_digits = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ";
+static ee_size_t strnlen(const char *s, ee_size_t count);
+
+static ee_size_t
+strnlen(const char *s, ee_size_t count)
+{
+    const char *sc;
+    for (sc = s; *sc != '\0' && count--; ++sc)
+        ;
+    return sc - s;
+}
+
+static int
+skip_atoi(const char **s)
+{
+    int i = 0;
+    while (is_digit(**s))
+        i = i * 10 + *((*s)++) - '0';
+    return i;
+}
+
+static char *
+number(char *str, long num, int base, int size, int precision, int type)
+{
+    char  c, sign, tmp[66];
+    char *dig = digits;
+    int   i;
+
+    if (type & UPPERCASE)
+        dig = upper_digits;
+    if (type & LEFT)
+        type &= ~ZEROPAD;
+    if (base < 2 || base > 36)
+        return 0;
+
+    c    = (type & ZEROPAD) ? '0' : ' ';
+    sign = 0;
+    if (type & SIGN)
+    {
+        if (num < 0)
+        {
+            sign = '-';
+            num  = -num;
+            size--;
+        }
+        else if (type & PLUS)
+        {
+            sign = '+';
+            size--;
+        }
+        else if (type & SPACE)
+        {
+            sign = ' ';
+            size--;
+        }
+    }
+
+    if (type & HEX_PREP)
+    {
+        if (base == 16)
+            size -= 2;
+        else if (base == 8)
+            size--;
+    }
+
+    i = 0;
+
+    if (num == 0)
+        tmp[i++] = '0';
+    else
+    {
+        while (num != 0)
+        {
+            tmp[i++] = dig[((unsigned long)num) % (unsigned)base];
+            num      = ((unsigned long)num) / (unsigned)base;
+        }
+    }
+
+    if (i > precision)
+        precision = i;
+    size -= precision;
+    if (!(type & (ZEROPAD | LEFT)))
+        while (size-- > 0)
+            *str++ = ' ';
+    if (sign)
+        *str++ = sign;
+
+    if (type & HEX_PREP)
+    {
+        if (base == 8)
+            *str++ = '0';
+        else if (base == 16)
+        {
+            *str++ = '0';
+            *str++ = digits[33];
+        }
+    }
+
+    if (!(type & LEFT))
+        while (size-- > 0)
+            *str++ = c;
+    while (i < precision--)
+        *str++ = '0';
+    while (i-- > 0)
+        *str++ = tmp[i];
+    while (size-- > 0)
+        *str++ = ' ';
+
+    return str;
+}
+
+static char *
+eaddr(char *str, unsigned char *addr, int size, int precision, int type)
+{
+    char  tmp[24];
+    char *dig = digits;
+    int   i, len;
+
+    if (type & UPPERCASE)
+        dig = upper_digits;
+    len = 0;
+    for (i = 0; i < 6; i++)
+    {
+        if (i != 0)
+            tmp[len++] = ':';
+        tmp[len++] = dig[addr[i] >> 4];
+        tmp[len++] = dig[addr[i] & 0x0F];
+    }
+
+    if (!(type & LEFT))
+        while (len < size--)
+            *str++ = ' ';
+    for (i = 0; i < len; ++i)
+        *str++ = tmp[i];
+    while (len < size--)
+        *str++ = ' ';
+
+    return str;
+}
+
+static char *
+iaddr(char *str, unsigned char *addr, int size, int precision, int type)
+{
+    char tmp[24];
+    int  i, n, len;
+
+    len = 0;
+    for (i = 0; i < 4; i++)
+    {
+        if (i != 0)
+            tmp[len++] = '.';
+        n = addr[i];
+
+        if (n == 0)
+            tmp[len++] = digits[0];
+        else
+        {
+            if (n >= 100)
+            {
+                tmp[len++] = digits[n / 100];
+                n          = n % 100;
+                tmp[len++] = digits[n / 10];
+                n          = n % 10;
+            }
+            else if (n >= 10)
+            {
+                tmp[len++] = digits[n / 10];
+                n          = n % 10;
+            }
+
+            tmp[len++] = digits[n];
+        }
+    }
+
+    if (!(type & LEFT))
+        while (len < size--)
+            *str++ = ' ';
+    for (i = 0; i < len; ++i)
+        *str++ = tmp[i];
+    while (len < size--)
+        *str++ = ' ';
+
+    return str;
+}
+
+#if HAS_FLOAT
+
+char *      ecvtbuf(double arg, int ndigits, int *decpt, int *sign, char *buf);
+char *      fcvtbuf(double arg, int ndigits, int *decpt, int *sign, char *buf);
+static void ee_bufcpy(char *d, char *s, int count);
+
+void
+ee_bufcpy(char *pd, char *ps, int count)
+{
+    char *pe = ps + count;
+    while (ps != pe)
+        *pd++ = *ps++;
+}
+
+static void
+parse_float(double value, char *buffer, char fmt, int precision)
+{
+    int   decpt, sign, exp, pos;
+    char *digits = NULL;
+    char  cvtbuf[80];
+    int   capexp = 0;
+    int   magnitude;
+
+    if (fmt == 'G' || fmt == 'E')
+    {
+        capexp = 1;
+        fmt += 'a' - 'A';
+    }
+
+    if (fmt == 'g')
+    {
+        digits    = ecvtbuf(value, precision, &decpt, &sign, cvtbuf);
+        magnitude = decpt - 1;
+        if (magnitude < -4 || magnitude > precision - 1)
+        {
+            fmt = 'e';
+            precision -= 1;
+        }
+        else
+        {
+            fmt = 'f';
+            precision -= decpt;
+        }
+    }
+
+    if (fmt == 'e')
+    {
+        digits = ecvtbuf(value, precision + 1, &decpt, &sign, cvtbuf);
+
+        if (sign)
+            *buffer++ = '-';
+        *buffer++ = *digits;
+        if (precision > 0)
+            *buffer++ = '.';
+        ee_bufcpy(buffer, digits + 1, precision);
+        buffer += precision;
+        *buffer++ = capexp ? 'E' : 'e';
+
+        if (decpt == 0)
+        {
+            if (value == 0.0)
+                exp = 0;
+            else
+                exp = -1;
+        }
+        else
+            exp = decpt - 1;
+
+        if (exp < 0)
+        {
+            *buffer++ = '-';
+            exp       = -exp;
+        }
+        else
+            *buffer++ = '+';
+
+        buffer[2] = (exp % 10) + '0';
+        exp       = exp / 10;
+        buffer[1] = (exp % 10) + '0';
+        exp       = exp / 10;
+        buffer[0] = (exp % 10) + '0';
+        buffer += 3;
+    }
+    else if (fmt == 'f')
+    {
+        digits = fcvtbuf(value, precision, &decpt, &sign, cvtbuf);
+        if (sign)
+            *buffer++ = '-';
+        if (*digits)
+        {
+            if (decpt <= 0)
+            {
+                *buffer++ = '0';
+                *buffer++ = '.';
+                for (pos = 0; pos < -decpt; pos++)
+                    *buffer++ = '0';
+                while (*digits)
+                    *buffer++ = *digits++;
+            }
+            else
+            {
+                pos = 0;
+                while (*digits)
+                {
+                    if (pos++ == decpt)
+                        *buffer++ = '.';
+                    *buffer++ = *digits++;
+                }
+            }
+        }
+        else
+        {
+            *buffer++ = '0';
+            if (precision > 0)
+            {
+                *buffer++ = '.';
+                for (pos = 0; pos < precision; pos++)
+                    *buffer++ = '0';
+            }
+        }
+    }
+
+    *buffer = '\0';
+}
+
+static void
+decimal_point(char *buffer)
+{
+    while (*buffer)
+    {
+        if (*buffer == '.')
+            return;
+        if (*buffer == 'e' || *buffer == 'E')
+            break;
+        buffer++;
+    }
+
+    if (*buffer)
+    {
+        int n = strnlen(buffer, 256);
+        while (n > 0)
+        {
+            buffer[n + 1] = buffer[n];
+            n--;
+        }
+
+        *buffer = '.';
+    }
+    else
+    {
+        *buffer++ = '.';
+        *buffer   = '\0';
+    }
+}
+
+static void
+cropzeros(char *buffer)
+{
+    char *stop;
+
+    while (*buffer && *buffer != '.')
+        buffer++;
+    if (*buffer++)
+    {
+        while (*buffer && *buffer != 'e' && *buffer != 'E')
+            buffer++;
+        stop = buffer--;
+        while (*buffer == '0')
+            buffer--;
+        if (*buffer == '.')
+            buffer--;
+        while (buffer != stop)
+            *++buffer = 0;
+    }
+}
+
+static char *
+flt(char *str, double num, int size, int precision, char fmt, int flags)
+{
+    char tmp[80];
+    char c, sign;
+    int  n, i;
+
+    // Left align means no zero padding
+    if (flags & LEFT)
+        flags &= ~ZEROPAD;
+
+    // Determine padding and sign char
+    c    = (flags & ZEROPAD) ? '0' : ' ';
+    sign = 0;
+    if (flags & SIGN)
+    {
+        if (num < 0.0)
+        {
+            sign = '-';
+            num  = -num;
+            size--;
+        }
+        else if (flags & PLUS)
+        {
+            sign = '+';
+            size--;
+        }
+        else if (flags & SPACE)
+        {
+            sign = ' ';
+            size--;
+        }
+    }
+
+    // Compute the precision value
+    if (precision < 0)
+        precision = 6; // Default precision: 6
+
+    // Convert floating point number to text
+    parse_float(num, tmp, fmt, precision);
+
+    if ((flags & HEX_PREP) && precision == 0)
+        decimal_point(tmp);
+    if (fmt == 'g' && !(flags & HEX_PREP))
+        cropzeros(tmp);
+
+    n = strnlen(tmp, 256);
+
+    // Output number with alignment and padding
+    size -= n;
+    if (!(flags & (ZEROPAD | LEFT)))
+        while (size-- > 0)
+            *str++ = ' ';
+    if (sign)
+        *str++ = sign;
+    if (!(flags & LEFT))
+        while (size-- > 0)
+            *str++ = c;
+    for (i = 0; i < n; i++)
+        *str++ = tmp[i];
+    while (size-- > 0)
+        *str++ = ' ';
+
+    return str;
+}
+
+#endif
+
+static int
+ee_vsprintf(char *buf, const char *fmt, va_list args)
+{
+    int           len;
+    unsigned long num;
+    int           i, base;
+    char *        str;
+    char *        s;
+
+    int flags; // Flags to number()
+
+    int field_width; // Width of output field
+    int precision;   // Min. # of digits for integers; max number of chars for
+                     // from string
+    int qualifier;   // 'h', 'l', or 'L' for integer fields
+
+    for (str = buf; *fmt; fmt++)
+    {
+        if (*fmt != '%')
+        {
+            *str++ = *fmt;
+            continue;
+        }
+
+        // Process flags
+        flags = 0;
+    repeat:
+        fmt++; // This also skips first '%'
+        switch (*fmt)
+        {
+            case '-':
+                flags |= LEFT;
+                goto repeat;
+            case '+':
+                flags |= PLUS;
+                goto repeat;
+            case ' ':
+                flags |= SPACE;
+                goto repeat;
+            case '#':
+                flags |= HEX_PREP;
+                goto repeat;
+            case '0':
+                flags |= ZEROPAD;
+                goto repeat;
+        }
+
+        // Get field width
+        field_width = -1;
+        if (is_digit(*fmt))
+            field_width = skip_atoi(&fmt);
+        else if (*fmt == '*')
+        {
+            fmt++;
+            field_width = va_arg(args, int);
+            if (field_width < 0)
+            {
+                field_width = -field_width;
+                flags |= LEFT;
+            }
+        }
+
+        // Get the precision
+        precision = -1;
+        if (*fmt == '.')
+        {
+            ++fmt;
+            if (is_digit(*fmt))
+                precision = skip_atoi(&fmt);
+            else if (*fmt == '*')
+            {
+                ++fmt;
+                precision = va_arg(args, int);
+            }
+            if (precision < 0)
+                precision = 0;
+        }
+
+        // Get the conversion qualifier
+        qualifier = -1;
+        if (*fmt == 'l' || *fmt == 'L')
+        {
+            qualifier = *fmt;
+            fmt++;
+        }
+
+        // Default base
+        base = 10;
+
+        switch (*fmt)
+        {
+            case 'c':
+                if (!(flags & LEFT))
+                    while (--field_width > 0)
+                        *str++ = ' ';
+                *str++ = (unsigned char)va_arg(args, int);
+                while (--field_width > 0)
+                    *str++ = ' ';
+                continue;
+
+            case 's':
+                s = va_arg(args, char *);
+                if (!s)
+                    s = "<NULL>";
+                len = strnlen(s, precision);
+                if (!(flags & LEFT))
+                    while (len < field_width--)
+                        *str++ = ' ';
+                for (i = 0; i < len; ++i)
+                    *str++ = *s++;
+                while (len < field_width--)
+                    *str++ = ' ';
+                continue;
+
+            case 'p':
+                if (field_width == -1)
+                {
+                    field_width = 2 * sizeof(void *);
+                    flags |= ZEROPAD;
+                }
+                str = number(str,
+                             (unsigned long)va_arg(args, void *),
+                             16,
+                             field_width,
+                             precision,
+                             flags);
+                continue;
+
+            case 'A':
+                flags |= UPPERCASE;
+
+            case 'a':
+                if (qualifier == 'l')
+                    str = eaddr(str,
+                                va_arg(args, unsigned char *),
+                                field_width,
+                                precision,
+                                flags);
+                else
+                    str = iaddr(str,
+                                va_arg(args, unsigned char *),
+                                field_width,
+                                precision,
+                                flags);
+                continue;
+
+            // Integer number formats - set up the flags and "break"
+            case 'o':
+                base = 8;
+                break;
+
+            case 'X':
+                flags |= UPPERCASE;
+
+            case 'x':
+                base = 16;
+                break;
+
+            case 'd':
+            case 'i':
+                flags |= SIGN;
+
+            case 'u':
+                break;
+
+#if HAS_FLOAT
+
+            case 'f':
+                str = flt(str,
+                          va_arg(args, double),
+                          field_width,
+                          precision,
+                          *fmt,
+                          flags | SIGN);
+                continue;
+
+#endif
+
+            default:
+                if (*fmt != '%')
+                    *str++ = '%';
+                if (*fmt)
+                    *str++ = *fmt;
+                else
+                    --fmt;
+                continue;
+        }
+
+        if (qualifier == 'l')
+            num = va_arg(args, unsigned long);
+        else if (flags & SIGN)
+            num = va_arg(args, int);
+        else
+            num = va_arg(args, unsigned int);
+
+        str = number(str, num, base, field_width, precision, flags);
+    }
+
+    *str = '\0';
+    return str - buf;
+}
+
+#define UART0_BASE_ADDR 0xffff0000ULL
+
+#define UART_REG_TXFIFO         0x00
+#define UART_REG_RXFIFO         0x04
+#define UART_REG_TXCTRL         0x08
+#define UART_REG_RXCTRL         0x0c
+#define UART_REG_IE             0x10
+#define UART_REG_IP             0x14
+#define UART_REG_DIV            0x18
+#define UART_TXEN               0x1
+
+#define UART0_REG(ADDR) *((ee_u32*) (UART0_BASE_ADDR + ADDR))
+
+void
+uart_send_char(char c)
+{
+      while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
+      UART0_REG(UART_REG_TXFIFO) = (unsigned char)c;
+}
+
+int
+ee_printf(const char *fmt, ...)
+{
+    char    buf[1024], *p;
+    va_list args;
+    int     n = 0;
+
+    va_start(args, fmt);
+    ee_vsprintf(buf, fmt, args);
+    va_end(args);
+    p = buf;
+    while (*p)
+    {
+        uart_send_char(*p);
+        n++;
+        p++;
+    }
+
+    return n;
+}

benchmarks/coremark/tgc/tgc.lds

@@ -0,0 +1,241 @@
+OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv", "elf32-littleriscv")
+OUTPUT_ARCH(riscv)
+MEMORY
+{
+   RAM (rwx)  : ORIGIN = 0x0, LENGTH = 128M 
+}
+
+ENTRY(_start)
+
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  .interp         : { *(.interp) }
+  .note.gnu.build-id  : { *(.note.gnu.build-id) }
+  .hash           : { *(.hash) }
+  .gnu.hash       : { *(.gnu.hash) }
+  .dynsym         : { *(.dynsym) }
+  .dynstr         : { *(.dynstr) }
+  .gnu.version    : { *(.gnu.version) }
+  .gnu.version_d  : { *(.gnu.version_d) }
+  .gnu.version_r  : { *(.gnu.version_r) }
+  .rela.dyn       :
+    {
+      *(.rela.init)
+      *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
+      *(.rela.fini)
+      *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
+      *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
+      *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
+      *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
+      *(.rela.ctors)
+      *(.rela.dtors)
+      *(.rela.got)
+      *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*)
+      *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*)
+      *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*)
+      *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*)
+      *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
+      PROVIDE_HIDDEN (__rela_iplt_start = .);
+      *(.rela.iplt)
+      PROVIDE_HIDDEN (__rela_iplt_end = .);
+    }
+  .rela.plt       :
+    {
+      *(.rela.plt)
+    }
+  .plt            : { *(.plt) }
+  .iplt           : { *(.iplt) }
+  .init           :
+  {
+    KEEP (*(SORT_NONE(.init)))
+    *crt0.o(.text .text.*)
+  } > RAM
+  .text      :
+  {
+    *(.text.init)
+    *(.text.unlikely .text.*_unlikely .text.unlikely.*)
+    *(.text.exit .text.exit.*)
+    *(.text.startup .text.startup.*)
+    *(.text.hot .text.hot.*)
+    *(.text .stub .text.* .gnu.linkonce.t.*)
+    /* .gnu.warning sections are handled specially by elf32.em.  */
+    *(.gnu.warning)
+  }
+  .fini           :
+  {
+    KEEP (*(SORT_NONE(.fini)))
+  }
+  PROVIDE (__etext = .);
+  PROVIDE (_etext = .);
+  PROVIDE (etext = .);
+  .rodata         : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
+  .rodata1        : { *(.rodata1) }
+  .sdata2         :
+  {
+    *(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
+  }
+  .sbss2          : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) }
+  .eh_frame_hdr   : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) }
+  .eh_frame       : ONLY_IF_RO { KEEP (*(.eh_frame)) *(.eh_frame.*) }
+  .gcc_except_table   : ONLY_IF_RO { *(.gcc_except_table .gcc_except_table.*) }
+  .gnu_extab   : ONLY_IF_RO { *(.gnu_extab*) }
+  /* These sections are generated by the Sun/Oracle C++ compiler.  */
+  .exception_ranges   : ONLY_IF_RO { *(.exception_ranges*) }
+  /* Adjust the address for the data segment.  We want to adjust up to
+     the same address within the page on the next page up.  */
+  . = DATA_SEGMENT_ALIGN (CONSTANT (MAXPAGESIZE), CONSTANT (COMMONPAGESIZE));
+  /* Exception handling  */
+  .eh_frame       : ONLY_IF_RW { KEEP (*(.eh_frame)) *(.eh_frame.*) }
+  .gnu_extab      : ONLY_IF_RW { *(.gnu_extab) }
+  .gcc_except_table   : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) }
+  .exception_ranges   : ONLY_IF_RW { *(.exception_ranges*) }
+  /* Thread Local Storage sections  */
+  .tdata	  :
+   {
+     PROVIDE_HIDDEN (__tdata_start = .);
+     *(.tdata .tdata.* .gnu.linkonce.td.*)
+   }
+  .tbss		  : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
+  .preinit_array    :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  }
+  .init_array    :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
+    KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  }
+  .fini_array    :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
+    KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  }
+  .ctors          :
+  {
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    /* We don't want to include the .ctor section from
+       the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+  }
+  .dtors          :
+  {
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+  }
+  .jcr            : { KEEP (*(.jcr)) }
+  .data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) }
+  .dynamic        : { *(.dynamic) }
+  . = DATA_SEGMENT_RELRO_END (0, .);
+  .data           :
+  {
+    __DATA_BEGIN__ = .;
+    *(.data .data.* .gnu.linkonce.d.*)
+    SORT(CONSTRUCTORS)
+  }
+  .data1          : { *(.data1) }
+  .got            : { *(.got.plt) *(.igot.plt) *(.got) *(.igot) }
+  /* We want the small data sections together, so single-instruction offsets
+     can access them all, and initialized data all before uninitialized, so
+     we can shorten the on-disk segment size.  */
+  .sdata          :
+  {
+    __SDATA_BEGIN__ = .;
+    *(.srodata.cst16) *(.srodata.cst8) *(.srodata.cst4) *(.srodata.cst2) *(.srodata .srodata.*)
+    *(.sdata .sdata.* .gnu.linkonce.s.*)
+  }
+  _edata = .; PROVIDE (edata = .);
+  . = .;
+  __bss_start = .;
+  .sbss           :
+  {
+    *(.dynsbss)
+    *(.sbss .sbss.* .gnu.linkonce.sb.*)
+    *(.scommon)
+  }
+  .bss            :
+  {
+   *(.dynbss)
+   *(.bss .bss.* .gnu.linkonce.b.*)
+   *(COMMON)
+   /* Align here to ensure that the .bss section occupies space up to
+      _end.  Align after .bss to ensure correct alignment even if the
+      .bss section disappears because there are no input sections.
+      FIXME: Why do we need it? When there is no .bss section, we do not
+      pad the .data section.  */
+   . = ALIGN(. != 0 ? 32 / 8 : 1);
+  }
+  . = ALIGN(32 / 8);
+  . = SEGMENT_START("ldata-segment", .);
+  . = ALIGN(32 / 8);
+  __BSS_END__ = .;
+    __global_pointer$ = MIN(__SDATA_BEGIN__ + 0x800,
+		            MAX(__DATA_BEGIN__ + 0x800, __BSS_END__ - 0x800));
+  _end = .; PROVIDE (end = .);
+  . = DATA_SEGMENT_END (.);
+  /* Stabs debugging sections.  */
+  .stab          0 : { *(.stab) }
+  .stabstr       0 : { *(.stabstr) }
+  .stab.excl     0 : { *(.stab.excl) }
+  .stab.exclstr  0 : { *(.stab.exclstr) }
+  .stab.index    0 : { *(.stab.index) }
+  .stab.indexstr 0 : { *(.stab.indexstr) }
+  .comment       0 : { *(.comment) }
+  .gnu.build.attributes : { *(.gnu.build.attributes .gnu.build.attributes.*) }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line .debug_line.* .debug_line_end) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+  /* DWARF 3 */
+  .debug_pubtypes 0 : { *(.debug_pubtypes) }
+  .debug_ranges   0 : { *(.debug_ranges) }
+  /* DWARF Extension.  */
+  .debug_macro    0 : { *(.debug_macro) }
+  .debug_addr     0 : { *(.debug_addr) }
+  .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
+  /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
+}

benchmarks/dhrystone/Makefile

@@ -0,0 +1,25 @@
+TARGET := dhrystone
+ISA?=imc
+
+ASM_SRCS := 
+C_SRCS := dhry_stubs.c dhry_printf.c dhry_1.c dhry_2.c
+HEADERS := dhry.h
+
+BOARD=iss
+LINK_TARGET=link
+RISCV_ARCH:=rv32$(ISA)
+ifeq ($(ISA),e)
+    RISCV_ABI:=ilp32e
+else
+    RISCV_ABI:=ilp32
+endif
+# '-lgcc -lm' are needed to add softfloat routines
+CFLAGS  := -g -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI) -mcmodel=medlow -O3 -DHZ=32768 -DTIME -DNO_INIT -fno-inline -fno-builtin-printf -fno-common -Wno-implicit \
+ -funroll-loops -fpeel-loops -fgcse-sm -fgcse-las
+LDFLAGS := -g -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI) -mcmodel=medlow -Wl,--wrap=scanf -Wl,--wrap=printf -Wl,--wrap=exit -lgcc -lm
+
+TOOL_DIR=$(dir $(compiler))
+
+TRIPLET=riscv32-unknown-elf
+BSP_BASE = ../../bare-metal-bsp
+include $(BSP_BASE)/env/common-gcc.mk

benchmarks/dhrystone/dhry_1.c

@@ -16,6 +16,7 @@
  */
 
 #include "dhry.h"
+extern char* strcpy(char* dest, const char* src);
 
 /* Global Variables: */
 
@@ -258,9 +259,9 @@ main ()
   else
   {
 #ifdef TIME
-    Microseconds = (float) User_Time * Mic_secs_Per_Second 
+    Microseconds = ((float) User_Time/(float)HZ) * Mic_secs_Per_Second
                         / (float) Number_Of_Runs;
-    Dhrystones_Per_Second = (float) Number_Of_Runs / (float) User_Time;
+    Dhrystones_Per_Second = (float) Number_Of_Runs / ((float) User_Time/(float)HZ);
 #else
     Microseconds = (float) User_Time * Mic_secs_Per_Second 
                         / ((float) HZ * ((float) Number_Of_Runs));

benchmarks/dhrystone/dhry_printf.c

@@ -0,0 +1,15 @@
+/* The functions in this file are only meant to support Dhrystone on an
+ * embedded RV32 system and are obviously incorrect in general. */
+
+#include <stdarg.h>
+#include <stddef.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include <unistd.h>
+
+//#undef putchar
+//int putchar(int ch)
+//{
+//  return write(1, &ch, 1) == 1 ? ch : -1;
+//}

benchmarks/dhrystone/dhry_stubs.c

@@ -5,18 +5,16 @@
 
 long time(void)
 {
-  return get_timer_value() / get_timer_freq();
+  return get_timer_value();
 }
 
 // set the number of dhrystone iterations
 void __wrap_scanf(const char* fmt, int* n)
 {
-//  *n = 100000000;
+  *n = 200000;
-  *n = 1000000;
 }
 
-volatile uint64_t tohost;
+extern volatile uint32_t tohost;
-volatile uint64_t fromhost;
 
 void __wrap_exit(int n){
       tohost = 0x1;

demo_gpio/.cproject

@@ -1,168 +0,0 @@
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-				<externalSettings/>
-				<extensions>
-					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
-					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="org.eclipse.cdt.autotools.core.ErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
-					<extension id="de.marw.cdt.cmake.core.CMakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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-								<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.1714150627" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input"/>
-							</tool>
-							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler.669753833" name="GNU RISC-V Cross C++ Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler"/>
-							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.1530679232" name="GNU RISC-V Cross C Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker">
-								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections.1637900674" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections" value="true" valueType="boolean"/>
-								<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.1335245598" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
-									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
-									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
-								</inputType>
-							</tool>
-							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker.648232936" name="GNU RISC-V Cross C++ Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker">
-								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections.929507343" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
-							</tool>
-							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.439296099" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
-							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.2024214820" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash"/>
-							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.1648338834" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
-								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.1291642104" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" value="true" valueType="boolean"/>
-								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders.616461822" name="Display all headers (--all-headers|-x)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders" value="true" valueType="boolean"/>
-								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle.1146271318" name="Demangle names (--demangle|-C)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle" value="true" valueType="boolean"/>
-								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers.1242922810" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers" value="true" valueType="boolean"/>
-								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide.876301703" name="Wide lines (--wide|-w)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide" value="true" valueType="boolean"/>
-							</tool>
-							<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.1112238656" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
-								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.483461408" name="Size format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format"/>
-							</tool>
-						</toolChain>
-					</folderInfo>
-				</configuration>
-			</storageModule>
-			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
-			<storageModule moduleId="ilg.gnumcueclipse.managedbuild.packs"/>
-		</cconfiguration>
-	</storageModule>
-	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
-		<project id="demo_gpio.ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf.431462479" name="Executable"/>
-	</storageModule>
-	<storageModule moduleId="scannerConfiguration">
-		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-		<scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1992646408;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1992646408.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1778523424;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.1714150627">
-			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-		</scannerConfigBuildInfo>
-		<scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.516870870;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.516870870.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1632260763;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.517786622">
-			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-		</scannerConfigBuildInfo>
-	</storageModule>
-	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
-	<storageModule moduleId="refreshScope" versionNumber="2">
-		<configuration configurationName="Debug">
-			<resource resourceType="PROJECT" workspacePath="/demo_gpio"/>
-		</configuration>
-		<configuration configurationName="Release">
-			<resource resourceType="PROJECT" workspacePath="/demo_gpio"/>
-		</configuration>
-	</storageModule>
-	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets">
-		<buildTargets>
-			<target name="all" path="" targetID="org.eclipse.cdt.build.MakeTargetBuilder">
-				<buildCommand>make</buildCommand>
-				<buildArguments/>
-				<buildTarget>all</buildTarget>
-				<stopOnError>true</stopOnError>
-				<useDefaultCommand>true</useDefaultCommand>
-				<runAllBuilders>true</runAllBuilders>
-			</target>
-		</buildTargets>
-	</storageModule>
-</cproject>

demo_gpio/.gitignore

@@ -1 +0,0 @@
-/Debug/

demo_gpio/.project

@@ -1,26 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<projectDescription>
-	<name>demo_gpio</name>
-	<comment></comment>
-	<projects>
-	</projects>
-	<buildSpec>
-		<buildCommand>
-			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
-			<triggers>clean,full,incremental,</triggers>
-			<arguments>
-			</arguments>
-		</buildCommand>
-		<buildCommand>
-			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
-			<triggers>full,incremental,</triggers>
-			<arguments>
-			</arguments>
-		</buildCommand>
-	</buildSpec>
-	<natures>
-		<nature>org.eclipse.cdt.core.cnature</nature>
-		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
-		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
-	</natures>
-</projectDescription>

demo_gpio/demo_gpio.c

@@ -1,255 +0,0 @@
-// See LICENSE for license details.
-
-#include <stdio.h>
-#include <stdlib.h>
-#include "platform.h"
-#include <string.h>
-#include "plic/plic_driver.h"
-#include "encoding.h"
-#include <unistd.h>
-#include "stdatomic.h"
-
-void reset_demo (void);
-
-// Structures for registering different interrupt handlers
-// for different parts of the application.
-typedef void (*function_ptr_t) (void);
-
-void no_interrupt_handler (void) {};
-
-function_ptr_t g_ext_interrupt_handlers[PLIC_NUM_INTERRUPTS];
-
-
-// Instance data for the PLIC.
-
-plic_instance_t g_plic;
-
-
-/*Entry Point for PLIC Interrupt Handler*/
-void handle_m_ext_interrupt(){
-  plic_source int_num  = PLIC_claim_interrupt(&g_plic);
-  if ((int_num >=1 ) && (int_num < PLIC_NUM_INTERRUPTS)) {
-    g_ext_interrupt_handlers[int_num]();
-  }
-  else {
-    exit(1 + (uintptr_t) int_num);
-  }
-  PLIC_complete_interrupt(&g_plic, int_num);
-}
-
-
-/*Entry Point for Machine Timer Interrupt Handler*/
-void handle_m_time_interrupt(){
-
-  clear_csr(mie, MIP_MTIP);
-
-  // Reset the timer for 3s in the future.
-  // This also clears the existing timer interrupt.
-
-  volatile uint64_t * mtime       = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME);
-  volatile uint64_t * mtimecmp    = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIMECMP);
-  uint64_t now = *mtime;
-  uint64_t then = now + 2 * RTC_FREQ;
-  *mtimecmp = then;
-
-  // read the current value of the LEDS and invert them.
-  uint32_t leds = GPIO_REG(GPIO_OUTPUT_VAL);
-
-  GPIO_REG(GPIO_OUTPUT_VAL) ^= ((0x1 << RED_LED_OFFSET)   |
-				(0x1 << GREEN_LED_OFFSET) |
-				(0x1 << BLUE_LED_OFFSET));
-  
-  // Re-enable the timer interrupt.
-  set_csr(mie, MIP_MTIP);
-
-}
-
-
-const char * instructions_msg = " \
-\n\
-                SIFIVE, INC.\n\
-\n\
-         5555555555555555555555555\n\
-        5555                   5555\n\
-       5555                     5555\n\
-      5555                       5555\n\
-     5555       5555555555555555555555\n\
-    5555       555555555555555555555555\n\
-   5555                             5555\n\
-  5555                               5555\n\
- 5555                                 5555\n\
-5555555555555555555555555555          55555\n\
- 55555           555555555           55555\n\
-   55555           55555           55555\n\
-     55555           5           55555\n\
-       55555                   55555\n\
-         55555               55555\n\
-           55555           55555\n\
-             55555       55555\n\
-               55555   55555\n\
-                 555555555\n\
-                   55555\n\
-                     5\n\
-\n\
-SiFive E-Series Software Development Kit 'demo_gpio' program.\n\
-Every 2 second, the Timer Interrupt will invert the LEDs.\n\
-(Arty Dev Kit Only): Press Buttons 0, 1, 2 to Set the LEDs.\n\
-Pin 19 (HiFive1) or A5 (Arty Dev Kit) is being bit-banged\n\
-for GPIO speed demonstration.\n\
-\n\
-";
-
-void print_instructions() {
-
-  write (STDOUT_FILENO, instructions_msg, strlen(instructions_msg));
-
-}
-
-#ifdef HAS_BOARD_BUTTONS
-void button_0_handler(void) {
-
-  // Red LED on
-  GPIO_REG(GPIO_OUTPUT_VAL) |= (0x1 << RED_LED_OFFSET);
-
-  // Clear the GPIO Pending interrupt by writing 1.
-  GPIO_REG(GPIO_RISE_IP) = (0x1 << BUTTON_0_OFFSET);
-
-};
-
-void button_1_handler(void) {
-
-  // Green LED On
-  GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << GREEN_LED_OFFSET);
-
-  // Clear the GPIO Pending interrupt by writing 1.
-  GPIO_REG(GPIO_RISE_IP) = (0x1 << BUTTON_1_OFFSET);
-
-};
-
-
-void button_2_handler(void) {
-
-  // Blue LED On
-  GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << BLUE_LED_OFFSET);
-
-  GPIO_REG(GPIO_RISE_IP) = (0x1 << BUTTON_2_OFFSET);
-
-};
-#endif
-
-void reset_demo (){
-
-  // Disable the machine & timer interrupts until setup is done.
-
-  clear_csr(mie, MIP_MEIP);
-  clear_csr(mie, MIP_MTIP);
-
-  for (int ii = 0; ii < PLIC_NUM_INTERRUPTS; ii ++){
-    g_ext_interrupt_handlers[ii] = no_interrupt_handler;
-  }
-
-#ifdef HAS_BOARD_BUTTONS
-  g_ext_interrupt_handlers[INT_DEVICE_BUTTON_0] = button_0_handler;
-  g_ext_interrupt_handlers[INT_DEVICE_BUTTON_1] = button_1_handler;
-  g_ext_interrupt_handlers[INT_DEVICE_BUTTON_2] = button_2_handler;
-#endif
-
-  print_instructions();
-
-#ifdef HAS_BOARD_BUTTONS
-
-  // Have to enable the interrupt both at the GPIO level,
-  // and at the PLIC level.
-  PLIC_enable_interrupt (&g_plic, INT_DEVICE_BUTTON_0);
-  PLIC_enable_interrupt (&g_plic, INT_DEVICE_BUTTON_1);
-  PLIC_enable_interrupt (&g_plic, INT_DEVICE_BUTTON_2);
-
-  // Priority must be set > 0 to trigger the interrupt.
-  PLIC_set_priority(&g_plic, INT_DEVICE_BUTTON_0, 1);
-  PLIC_set_priority(&g_plic, INT_DEVICE_BUTTON_1, 1);
-  PLIC_set_priority(&g_plic, INT_DEVICE_BUTTON_2, 1);
-
-  GPIO_REG(GPIO_RISE_IE) |= (1 << BUTTON_0_OFFSET);
-  GPIO_REG(GPIO_RISE_IE) |= (1 << BUTTON_1_OFFSET);
-  GPIO_REG(GPIO_RISE_IE) |= (1 << BUTTON_2_OFFSET);
-
-#endif
-
-    // Set the machine timer to go off in 3 seconds.
-    // The
-    volatile uint64_t * mtime       = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIME);
-    volatile uint64_t * mtimecmp    = (uint64_t*) (CLINT_CTRL_ADDR + CLINT_MTIMECMP);
-    uint64_t now = *mtime;
-    uint64_t then = now + 2*RTC_FREQ;
-    *mtimecmp = then;
-
-    // Enable the Machine-External bit in MIE
-    set_csr(mie, MIP_MEIP);
-
-    // Enable the Machine-Timer bit in MIE
-    set_csr(mie, MIP_MTIP);
-
-    // Enable interrupts in general.
-    set_csr(mstatus, MSTATUS_MIE);
-}
-
-int main(int argc, char **argv)
-{
-  // Set up the GPIOs such that the LED GPIO
-  // can be used as both Inputs and Outputs.
-  
-
-#ifdef HAS_BOARD_BUTTONS
-  GPIO_REG(GPIO_OUTPUT_EN)  &= ~((0x1 << BUTTON_0_OFFSET) | (0x1 << BUTTON_1_OFFSET) | (0x1 << BUTTON_2_OFFSET));
-  GPIO_REG(GPIO_PULLUP_EN)  &= ~((0x1 << BUTTON_0_OFFSET) | (0x1 << BUTTON_1_OFFSET) | (0x1 << BUTTON_2_OFFSET));
-  GPIO_REG(GPIO_INPUT_EN)   |=  ((0x1 << BUTTON_0_OFFSET) | (0x1 << BUTTON_1_OFFSET) | (0x1 << BUTTON_2_OFFSET));
-#endif
-
-  GPIO_REG(GPIO_INPUT_EN)    &= ~((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET) | (0x1 << BLUE_LED_OFFSET)) ;
-  GPIO_REG(GPIO_OUTPUT_EN)   |=  ((0x1<< RED_LED_OFFSET)| (0x1<< GREEN_LED_OFFSET) | (0x1 << BLUE_LED_OFFSET)) ;
-  GPIO_REG(GPIO_OUTPUT_VAL)  |=   (0x1 << BLUE_LED_OFFSET) ;
-  GPIO_REG(GPIO_OUTPUT_VAL)  &=  ~((0x1<< RED_LED_OFFSET) | (0x1<< GREEN_LED_OFFSET)) ;
-
-  
-  // For Bit-banging with Atomics demo.
-  
-  uint32_t bitbang_mask = 0;
-#ifdef _SIFIVE_HIFIVE1_H
-  bitbang_mask = (1 << PIN_19_OFFSET);
-#else
-#ifdef _SIFIVE_COREPLEXIP_ARTY_H
-  bitbang_mask = (0x1 << JA_0_OFFSET);
-#endif
-#endif
-
-  GPIO_REG(GPIO_OUTPUT_EN) |= bitbang_mask;
-  
-  /**************************************************************************
-   * Set up the PLIC
-   *
-   *************************************************************************/
-  PLIC_init(&g_plic,
-	    PLIC_CTRL_ADDR,
-	    PLIC_NUM_INTERRUPTS,
-	    PLIC_NUM_PRIORITIES);
-
-  reset_demo();
-
-  /**************************************************************************
-   * Demonstrate fast GPIO bit-banging.
-   * One can bang it faster than this if you know
-   * the entire OUTPUT_VAL that you want to write, but 
-   * Atomics give a quick way to control a single bit.
-   *************************************************************************/
-  // For Bit-banging with Atomics demo.
-  uint32_t cnt=0;
-  while(cnt<200){
-	  asm volatile ("wfi");
-	  printf("Finished run#%u\n", ++cnt);
-	  for(size_t i=0; i<100; ++i)
-		  atomic_fetch_xor_explicit(&GPIO_REG(GPIO_OUTPUT_VAL), bitbang_mask, memory_order_relaxed);
-  }
-
-  return 0;
-
-}

demo_gpio/sifive-freedom-e300-hifive1.cfg

@@ -1,34 +0,0 @@
-adapter_khz     10000
-
-interface ftdi
-ftdi_device_desc "Dual RS232-HS"
-ftdi_vid_pid 0x0403 0x6010
-
-ftdi_layout_init 0x0008 0x001b
-ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
-
-#Reset Stretcher logic on FE310 is ~1 second long
-#This doesn't apply if you use
-# ftdi_set_signal, but still good to document
-#adapter_nsrst_delay 1500
-
-set _CHIPNAME riscv
-jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME riscv -chain-position $_TARGETNAME
-$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
-
-flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME
-init
-#reset -- This type of reset is not implemented yet
-if {[ info exists pulse_srst]} {
-  ftdi_set_signal nSRST 0
-  ftdi_set_signal nSRST z
-  #Wait for the reset stretcher
-  #It will work without this, but
-  #will incur lots of delays for later commands.
-  sleep 1500
-}	
-halt
-flash protect 0 64 last off

dhrystone/Makefile

@@ -1,25 +0,0 @@
-TARGET := dhrystone
-
-ASM_SRCS := 
-C_SRCS := dhry_stubs.c dhry_printf.c
-HEADERS := dhry.h
-
-DHRY_SRCS := dhry_1.c dhry_2.c
-DHRY_CFLAGS := -O2 -DTIME -DNO_INIT -fno-inline -fno-builtin-printf -Wno-implicit -march=rv32ima
-
-XLEN ?= 32
-CFLAGS := -g -Og -fno-common
-LDFLAGS := -g -Wl,--wrap=scanf -Wl,--wrap=printf -Wl,--wrap=exit
-
-DHRY_OBJS := $(patsubst %.c,%.o,$(DHRY_SRCS))
-LINK_OBJS := $(DHRY_OBJS)
-
-#BOARD = iss
-BOARD=freedom-e300-hifive1
-TOOL_DIR=/opt/shared/riscv/FreedomStudio/20180122/SiFive/riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6/bin
-
-BSP_BASE = bsp
-include $(BSP_BASE)/env/common.mk
-
-$(DHRY_OBJS): %.o: %.c $(HEADERS)
-	$(CC) $(CFLAGS) $(DHRY_CFLAGS) -c -o $@ $<

dhrystone/bsp/env/common.mk

@@ -1,60 +0,0 @@
-# See LICENSE for license details.
-
-ifndef _SIFIVE_MK_COMMON
-_SIFIVE_MK_COMMON := # defined
-
-.PHONY: all
-all: $(TARGET)
-
-include $(BSP_BASE)/libwrap/libwrap.mk
-
-BOARD ?= freedom-e300-hifive1
-ENV_DIR = $(BSP_BASE)/env
-PLATFORM_DIR = $(ENV_DIR)/$(BOARD)
-
-#TARGET_FLAVOR := -march=rv32imac -mabi=ilp32 -mcmodel=medany -msmall-data-limit=8 -x assembler-with-cpp
-TARGET_FLAVOR := -march=rv32imac -mabi=ilp32
-
-ASM_SRCS += $(ENV_DIR)/start.S
-ASM_SRCS += $(ENV_DIR)/entry.S
-C_SRCS += $(PLATFORM_DIR)/init.c
-
-LINKER_SCRIPT := $(PLATFORM_DIR)/link.lds
-
-INCLUDES += -I$(BSP_BASE)/include
-INCLUDES += -I$(BSP_BASE)/drivers/
-INCLUDES += -I$(ENV_DIR)
-INCLUDES += -I$(PLATFORM_DIR)
-
-TOOL_DIR ?= $(BSP_BASE)/../toolchain/bin
-
-CC := $(TOOL_DIR)/riscv64-unknown-elf-gcc ${TARGET_FLAVOR}
-AR := $(TOOL_DIR)/riscv64-unknown-elf-ar
-
-LDFLAGS += -T $(LINKER_SCRIPT) -nostartfiles
-LDFLAGS += -L$(ENV_DIR)
-
-ASM_OBJS := $(ASM_SRCS:.S=.o)
-C_OBJS := $(C_SRCS:.c=.o)
-
-LINK_OBJS += $(ASM_OBJS) $(C_OBJS)
-LINK_DEPS += $(LINKER_SCRIPT)
-
-CLEAN_OBJS += $(TARGET) $(LINK_OBJS)
-
-CFLAGS += -g
-
-$(TARGET): $(LINK_OBJS) $(LINK_DEPS)
-	$(CC) $(CFLAGS) $(INCLUDES) $(LINK_OBJS) -o $@ $(LDFLAGS)
-
-$(ASM_OBJS): %.o: %.S $(HEADERS)
-	$(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $<
-
-$(C_OBJS): %.o: %.c $(HEADERS)
-	$(CC) $(CFLAGS) $(INCLUDES) -include sys/cdefs.h -c -o $@ $<
-
-.PHONY: clean
-clean:
-	rm -f $(CLEAN_OBJS)
-
-endif # _SIFIVE_MK_COMMON

dhrystone/bsp/env/entry.S

@@ -1,97 +0,0 @@
-// See LICENSE for license details
-
-#ifndef ENTRY_S
-#define ENTRY_S
-
-#include "encoding.h"
-#include "sifive/bits.h"
-
-  .section      .text.entry	
-  .align 2
-  .global trap_entry
-trap_entry:
-  addi sp, sp, -32*REGBYTES
-
-  STORE x1, 1*REGBYTES(sp)
-  STORE x2, 2*REGBYTES(sp)
-  STORE x3, 3*REGBYTES(sp)
-  STORE x4, 4*REGBYTES(sp)
-  STORE x5, 5*REGBYTES(sp)
-  STORE x6, 6*REGBYTES(sp)
-  STORE x7, 7*REGBYTES(sp)
-  STORE x8, 8*REGBYTES(sp)
-  STORE x9, 9*REGBYTES(sp)
-  STORE x10, 10*REGBYTES(sp)
-  STORE x11, 11*REGBYTES(sp)
-  STORE x12, 12*REGBYTES(sp)
-  STORE x13, 13*REGBYTES(sp)
-  STORE x14, 14*REGBYTES(sp)
-  STORE x15, 15*REGBYTES(sp)
-  STORE x16, 16*REGBYTES(sp)
-  STORE x17, 17*REGBYTES(sp)
-  STORE x18, 18*REGBYTES(sp)
-  STORE x19, 19*REGBYTES(sp)
-  STORE x20, 20*REGBYTES(sp)
-  STORE x21, 21*REGBYTES(sp)
-  STORE x22, 22*REGBYTES(sp)
-  STORE x23, 23*REGBYTES(sp)
-  STORE x24, 24*REGBYTES(sp)
-  STORE x25, 25*REGBYTES(sp)
-  STORE x26, 26*REGBYTES(sp)
-  STORE x27, 27*REGBYTES(sp)
-  STORE x28, 28*REGBYTES(sp)
-  STORE x29, 29*REGBYTES(sp)
-  STORE x30, 30*REGBYTES(sp)
-  STORE x31, 31*REGBYTES(sp)
-
-  csrr a0, mcause
-  csrr a1, mepc
-  mv a2, sp
-  call handle_trap
-  csrw mepc, a0
-
-  # Remain in M-mode after mret
-  li t0, MSTATUS_MPP
-  csrs mstatus, t0
-
-  LOAD x1, 1*REGBYTES(sp)
-  LOAD x2, 2*REGBYTES(sp)
-  LOAD x3, 3*REGBYTES(sp)
-  LOAD x4, 4*REGBYTES(sp)
-  LOAD x5, 5*REGBYTES(sp)
-  LOAD x6, 6*REGBYTES(sp)
-  LOAD x7, 7*REGBYTES(sp)
-  LOAD x8, 8*REGBYTES(sp)
-  LOAD x9, 9*REGBYTES(sp)
-  LOAD x10, 10*REGBYTES(sp)
-  LOAD x11, 11*REGBYTES(sp)
-  LOAD x12, 12*REGBYTES(sp)
-  LOAD x13, 13*REGBYTES(sp)
-  LOAD x14, 14*REGBYTES(sp)
-  LOAD x15, 15*REGBYTES(sp)
-  LOAD x16, 16*REGBYTES(sp)
-  LOAD x17, 17*REGBYTES(sp)
-  LOAD x18, 18*REGBYTES(sp)
-  LOAD x19, 19*REGBYTES(sp)
-  LOAD x20, 20*REGBYTES(sp)
-  LOAD x21, 21*REGBYTES(sp)
-  LOAD x22, 22*REGBYTES(sp)
-  LOAD x23, 23*REGBYTES(sp)
-  LOAD x24, 24*REGBYTES(sp)
-  LOAD x25, 25*REGBYTES(sp)
-  LOAD x26, 26*REGBYTES(sp)
-  LOAD x27, 27*REGBYTES(sp)
-  LOAD x28, 28*REGBYTES(sp)
-  LOAD x29, 29*REGBYTES(sp)
-  LOAD x30, 30*REGBYTES(sp)
-  LOAD x31, 31*REGBYTES(sp)
-
-  addi sp, sp, 32*REGBYTES
-  mret
-
-.weak handle_trap
-handle_trap:
-1:
-  j 1b
-	
-#endif

dhrystone/bsp/env/hifive1.h

@@ -1,81 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_HIFIVE1_H
-#define _SIFIVE_HIFIVE1_H
-
-#include <stdint.h>
-
-/****************************************************************************
- * GPIO Connections
- *****************************************************************************/
-
-// These are the GPIO bit offsets for the RGB LED on HiFive1 Board.
-// These are also mapped to RGB LEDs on the Freedom E300 Arty
-// FPGA
-// Dev Kit.
-
-#define RED_LED_OFFSET   22
-#define GREEN_LED_OFFSET 19
-#define BLUE_LED_OFFSET  21
-
-// These are the GPIO bit offsets for the differen digital pins
-// on the headers for both the HiFive1 Board and the Freedom E300 Arty FPGA Dev Kit.
-#define PIN_0_OFFSET 16
-#define PIN_1_OFFSET 17
-#define PIN_2_OFFSET 18
-#define PIN_3_OFFSET 19
-#define PIN_4_OFFSET 20
-#define PIN_5_OFFSET 21
-#define PIN_6_OFFSET 22
-#define PIN_7_OFFSET 23
-#define PIN_8_OFFSET 0
-#define PIN_9_OFFSET 1
-#define PIN_10_OFFSET 2
-#define PIN_11_OFFSET 3
-#define PIN_12_OFFSET 4
-#define PIN_13_OFFSET 5
-//#define PIN_14_OFFSET 8 //This pin is not connected on either board.
-#define PIN_15_OFFSET 9
-#define PIN_16_OFFSET 10
-#define PIN_17_OFFSET 11
-#define PIN_18_OFFSET 12
-#define PIN_19_OFFSET 13
-
-// These are *PIN* numbers, not
-// GPIO Offset Numbers.
-#define PIN_SPI1_SCK    (13u)
-#define PIN_SPI1_MISO   (12u)
-#define PIN_SPI1_MOSI   (11u)
-#define PIN_SPI1_SS0    (10u)
-#define PIN_SPI1_SS1    (14u) 
-#define PIN_SPI1_SS2    (15u)
-#define PIN_SPI1_SS3    (16u)
-
-#define SS_PIN_TO_CS_ID(x) \
-  ((x==PIN_SPI1_SS0 ? 0 :		 \
-    (x==PIN_SPI1_SS1 ? 1 :		 \
-     (x==PIN_SPI1_SS2 ? 2 :		 \
-      (x==PIN_SPI1_SS3 ? 3 :		 \
-       -1))))) 
-
-
-// These buttons are present only on the Freedom E300 Arty Dev Kit.
-#ifdef HAS_BOARD_BUTTONS
-#define BUTTON_0_OFFSET 15
-#define BUTTON_1_OFFSET 30
-#define BUTTON_2_OFFSET 31
-
-#define INT_DEVICE_BUTTON_0 (INT_GPIO_BASE + BUTTON_0_OFFSET)
-#define INT_DEVICE_BUTTON_1 (INT_GPIO_BASE + BUTTON_1_OFFSET)
-#define INT_DEVICE_BUTTON_2 (INT_GPIO_BASE + BUTTON_2_OFFSET)
-
-#endif
-
-#define HAS_HFXOSC 1
-#define HAS_LFROSC_BYPASS 1
-
-#define RTC_FREQ 32768
-
-void write_hex(int fd, uint32_t hex);
-
-#endif /* _SIFIVE_HIFIVE1_H */

dhrystone/bsp/include/sifive/devices/spi.h

@@ -1,80 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_SPI_H
-#define _SIFIVE_SPI_H
-
-/* Register offsets */
-
-#define SPI_REG_SCKDIV          0x00
-#define SPI_REG_SCKMODE         0x04
-#define SPI_REG_CSID            0x10
-#define SPI_REG_CSDEF           0x14
-#define SPI_REG_CSMODE          0x18
-
-#define SPI_REG_DCSSCK          0x28
-#define SPI_REG_DSCKCS          0x2a
-#define SPI_REG_DINTERCS        0x2c
-#define SPI_REG_DINTERXFR       0x2e
-
-#define SPI_REG_FMT             0x40
-#define SPI_REG_TXFIFO          0x48
-#define SPI_REG_RXFIFO          0x4c
-#define SPI_REG_TXCTRL          0x50
-#define SPI_REG_RXCTRL          0x54
-
-#define SPI_REG_FCTRL           0x60
-#define SPI_REG_FFMT            0x64
-
-#define SPI_REG_IE              0x70
-#define SPI_REG_IP              0x74
-
-/* Fields */
-
-#define SPI_SCK_POL             0x1
-#define SPI_SCK_PHA             0x2
-
-#define SPI_FMT_PROTO(x)        ((x) & 0x3)
-#define SPI_FMT_ENDIAN(x)       (((x) & 0x1) << 2)
-#define SPI_FMT_DIR(x)          (((x) & 0x1) << 3)
-#define SPI_FMT_LEN(x)          (((x) & 0xf) << 16)
-
-/* TXCTRL register */
-#define SPI_TXWM(x)             ((x) & 0xffff)
-/* RXCTRL register */
-#define SPI_RXWM(x)             ((x) & 0xffff)
-
-#define SPI_IP_TXWM             0x1
-#define SPI_IP_RXWM             0x2
-
-#define SPI_FCTRL_EN            0x1
-
-#define SPI_INSN_CMD_EN         0x1
-#define SPI_INSN_ADDR_LEN(x)    (((x) & 0x7) << 1)
-#define SPI_INSN_PAD_CNT(x)     (((x) & 0xf) << 4)
-#define SPI_INSN_CMD_PROTO(x)   (((x) & 0x3) << 8)
-#define SPI_INSN_ADDR_PROTO(x)  (((x) & 0x3) << 10)
-#define SPI_INSN_DATA_PROTO(x)  (((x) & 0x3) << 12)
-#define SPI_INSN_CMD_CODE(x)    (((x) & 0xff) << 16)
-#define SPI_INSN_PAD_CODE(x)    (((x) & 0xff) << 24)
-
-#define SPI_TXFIFO_FULL  (1 << 31)   
-#define SPI_RXFIFO_EMPTY (1 << 31)   
-
-/* Values */
-
-#define SPI_CSMODE_AUTO         0
-#define SPI_CSMODE_HOLD         2
-#define SPI_CSMODE_OFF          3
-
-#define SPI_DIR_RX              0
-#define SPI_DIR_TX              1
-
-#define SPI_PROTO_S             0
-#define SPI_PROTO_D             1
-#define SPI_PROTO_Q             2
-
-#define SPI_ENDIAN_MSB          0
-#define SPI_ENDIAN_LSB          1
-
-
-#endif /* _SIFIVE_SPI_H */

dhrystone/dhry_printf.c

@@ -1,271 +0,0 @@
-/* The functions in this file are only meant to support Dhrystone on an
- * embedded RV32 system and are obviously incorrect in general. */
-
-#include <stdarg.h>
-#include <stddef.h>
-#include <stdio.h>
-#include <stdint.h>
-#include <string.h>
-#include <unistd.h>
-
-#undef putchar
-int putchar(int ch)
-{
-  return write(1, &ch, 1) == 1 ? ch : -1;
-}
-
-static void sprintf_putch(int ch, void** data)
-{
-  char** pstr = (char**)data;
-  **pstr = ch;
-  (*pstr)++;
-}
-
-static unsigned long getuint(va_list *ap, int lflag)
-{
-  if (lflag)
-    return va_arg(*ap, unsigned long);
-  else
-    return va_arg(*ap, unsigned int);
-}
-
-static long getint(va_list *ap, int lflag)
-{
-  if (lflag)
-    return va_arg(*ap, long);
-  else
-    return va_arg(*ap, int);
-}
-
-static inline void printnum(void (*putch)(int, void**), void **putdat,
-                    unsigned long num, unsigned base, int width, int padc)
-{
-  unsigned digs[sizeof(num)*8];
-  int pos = 0;
-
-  while (1)
-  {
-    digs[pos++] = num % base;
-    if (num < base)
-      break;
-    num /= base;
-  }
-
-  while (width-- > pos)
-    putch(padc, putdat);
-
-  while (pos-- > 0)
-    putch(digs[pos] + (digs[pos] >= 10 ? 'a' - 10 : '0'), putdat);
-}
-
-static inline void print_double(void (*putch)(int, void**), void **putdat,
-                                double num, int width, int prec)
-{
-  union {
-    double d;
-    uint64_t u;
-  } u;
-  u.d = num;
-
-  if (u.u & (1ULL << 63)) {
-    putch('-', putdat);
-    u.u &= ~(1ULL << 63);
-  }
-
-  for (int i = 0; i < prec; i++)
-    u.d *= 10;
-
-  char buf[32], *pbuf = buf;
-  printnum(sprintf_putch, (void**)&pbuf, (unsigned long)u.d, 10, 0, 0);
-  if (prec > 0) {
-    for (int i = 0; i < prec; i++) {
-      pbuf[-i] = pbuf[-i-1];
-    }
-    pbuf[-prec] = '.';
-    pbuf++;
-  }
-
-  for (char* p = buf; p < pbuf; p++)
-    putch(*p, putdat);
-}
-
-static void vprintfmt(void (*putch)(int, void**), void **putdat, const char *fmt, va_list ap)
-{
-  register const char* p;
-  const char* last_fmt;
-  register int ch, err;
-  unsigned long num;
-  int base, lflag, width, precision, altflag;
-  char padc;
-
-  while (1) {
-    while ((ch = *(unsigned char *) fmt) != '%') {
-      if (ch == '\0')
-        return;
-      fmt++;
-      putch(ch, putdat);
-    }
-    fmt++;
-
-    // Process a %-escape sequence
-    last_fmt = fmt;
-    padc = ' ';
-    width = -1;
-    precision = -1;
-    lflag = 0;
-    altflag = 0;
-  reswitch:
-    switch (ch = *(unsigned char *) fmt++) {
-
-    // flag to pad on the right
-    case '-':
-      padc = '-';
-      goto reswitch;
-      
-    // flag to pad with 0's instead of spaces
-    case '0':
-      padc = '0';
-      goto reswitch;
-
-    // width field
-    case '1':
-    case '2':
-    case '3':
-    case '4':
-    case '5':
-    case '6':
-    case '7':
-    case '8':
-    case '9':
-      for (precision = 0; ; ++fmt) {
-        precision = precision * 10 + ch - '0';
-        ch = *fmt;
-        if (ch < '0' || ch > '9')
-          break;
-      }
-      goto process_precision;
-
-    case '*':
-      precision = va_arg(ap, int);
-      goto process_precision;
-
-    case '.':
-      if (width < 0)
-        width = 0;
-      goto reswitch;
-
-    case '#':
-      altflag = 1;
-      goto reswitch;
-
-    process_precision:
-      if (width < 0)
-        width = precision, precision = -1;
-      goto reswitch;
-
-    // long flag
-    case 'l':
-      if (lflag)
-        goto bad;
-      goto reswitch;
-
-    // character
-    case 'c':
-      putch(va_arg(ap, int), putdat);
-      break;
-
-    // double
-    case 'f':
-      print_double(putch, putdat, va_arg(ap, double), width, precision);
-      break;
-
-    // string
-    case 's':
-      if ((p = va_arg(ap, char *)) == NULL)
-        p = "(null)";
-      if (width > 0 && padc != '-')
-        for (width -= strnlen(p, precision); width > 0; width--)
-          putch(padc, putdat);
-      for (; (ch = *p) != '\0' && (precision < 0 || --precision >= 0); width--) {
-        putch(ch, putdat);
-        p++;
-      }
-      for (; width > 0; width--)
-        putch(' ', putdat);
-      break;
-
-    // (signed) decimal
-    case 'd':
-      num = getint(&ap, lflag);
-      if ((long) num < 0) {
-        putch('-', putdat);
-        num = -(long) num;
-      }
-      base = 10;
-      goto signed_number;
-
-    // unsigned decimal
-    case 'u':
-      base = 10;
-      goto unsigned_number;
-
-    // (unsigned) octal
-    case 'o':
-      // should do something with padding so it's always 3 octits
-      base = 8;
-      goto unsigned_number;
-
-    // pointer
-    case 'p':
-      lflag = 1;
-      putch('0', putdat);
-      putch('x', putdat);
-      /* fall through to 'x' */
-
-    // (unsigned) hexadecimal
-    case 'x':
-      base = 16;
-    unsigned_number:
-      num = getuint(&ap, lflag);
-    signed_number:
-      printnum(putch, putdat, num, base, width, padc);
-      break;
-
-    // escaped '%' character
-    case '%':
-      putch(ch, putdat);
-      break;
-      
-    // unrecognized escape sequence - just print it literally
-    default:
-    bad:
-      putch('%', putdat);
-      fmt = last_fmt;
-      break;
-    }
-  }
-}
-
-int __wrap_printf(const char* fmt, ...)
-{
-  va_list ap;
-  va_start(ap, fmt);
-
-  vprintfmt((void*)putchar, 0, fmt, ap);
-
-  va_end(ap);
-  return 0; // incorrect return value, but who cares, anyway?
-}
-
-int __wrap_sprintf(char* str, const char* fmt, ...)
-{
-  va_list ap;
-  char* str0 = str;
-  va_start(ap, fmt);
-
-  vprintfmt(sprintf_putch, (void**)&str, fmt, ap);
-  *str = 0;
-
-  va_end(ap);
-  return str - str0;
-}

hello-world/Makefile

@@ -1,23 +1,21 @@
 
 TARGET  = hello
 C_SRCS  = $(wildcard *.c) 
-#HEADERS = $(wildcard *.h)
+HEADERS = $(wildcard *.h)
-CFLAGS += -g 
+CFLAGS += -O2 -g 
 
-BOARD=freedom-e300-hifive1
+BOARD=iss
-LINK_TARGET=flash
+LINK_TARGET=link
 RISCV_ARCH:=rv32i
 RISCV_ABI:=ilp32
-LDFLAGS := -Wl,--wrap=scanf -Wl,--wrap=printf -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI) -g
+LDFLAGS += -g -Wl,--wrap=printf
 
-#TOOL_DIR?=/opt/shared/riscv/FreedomStudio/20180122/SiFive/riscv64-unknown-elf-gcc-20171231-x86_64-linux-centos6/bin
+compiler := $(shell which riscv32-unknown-elf-gcc)
-TOOL_DIR=/opt/shared/riscv/tools/Ubuntu/riscv64-unknown-elf-gcc-8.3.0-2020.04.1-x86_64-linux-ubuntu14/bin
+TOOL_DIR=$(dir $(compiler))
 
-BSP_BASE = ./bsp
+TRIPLET=riscv32-unknown-elf
-include $(BSP_BASE)/env/common.mk
+BSP_BASE = ../bare-metal-bsp
+include $(BSP_BASE)/env/common-gcc.mk
 
-.PHONY: all
+$(TARGET).vlog:$(TARGET)
-all: $(TARGET).dump
+	riscv32-unknown-elf-objcopy -O verilog $(TARGET) $(TARGET).vlog
-
-$(TARGET).dump: $(TARGET)
-	$(TOOL_DIR)/$(TRIPLET)-objdump -d -S -C $< > $@

hello-world/bsp/drivers/fe300prci/fe300prci_driver.c

@@ -1,252 +0,0 @@
-// See LICENSE file for license details
-
-#include "platform.h"
-
-#ifdef PRCI_CTRL_ADDR
-#include "fe300prci/fe300prci_driver.h"
-#include <unistd.h>
-
-#define rdmcycle(x)  {				       \
-    uint32_t lo, hi, hi2;			       \
-    __asm__ __volatile__ ("1:\n\t"		       \
-			  "csrr %0, mcycleh\n\t"       \
-			  "csrr %1, mcycle\n\t"	       \
-			  "csrr %2, mcycleh\n\t"		\
-			  "bne  %0, %2, 1b\n\t"			\
-			  : "=r" (hi), "=r" (lo), "=r" (hi2)) ;	\
-    *(x) = lo | ((uint64_t) hi << 32); 				\
-  }
-
-uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq)
-{
-
-  uint32_t start_mtime = CLINT_REG(CLINT_MTIME);
-  uint32_t end_mtime = start_mtime + mtime_ticks + 1;
-
-  // Make sure we won't get rollover.
-  while (end_mtime < start_mtime){
-    start_mtime = CLINT_REG(CLINT_MTIME);
-    end_mtime = start_mtime + mtime_ticks + 1;
-  }
-
-  // Don't start measuring until mtime edge.
-  uint32_t tmp = start_mtime;
-  do {
-    start_mtime = CLINT_REG(CLINT_MTIME);
-  } while (start_mtime == tmp);
-  
-  uint64_t start_mcycle;
-  rdmcycle(&start_mcycle);
-  
-  while (CLINT_REG(CLINT_MTIME) < end_mtime) ;
-  
-  uint64_t end_mcycle;
-  rdmcycle(&end_mcycle);
-  uint32_t difference = (uint32_t) (end_mcycle - start_mcycle);
-
-  uint64_t freq = ((uint64_t) difference * mtime_freq) / mtime_ticks;
-  return (uint32_t) freq & 0xFFFFFFFF;
-  
-}
- 
-
-void PRCI_use_hfrosc(int div, int trim)
-{
-  // Make sure the HFROSC is running at its default setting
-  // It is OK to change this even if we are running off of it.
-  
-  PRCI_REG(PRCI_HFROSCCFG) = (ROSC_DIV(div) | ROSC_TRIM(trim) | ROSC_EN(1));
-
-  while ((PRCI_REG(PRCI_HFROSCCFG) & ROSC_RDY(1)) == 0);
-  
-  PRCI_REG(PRCI_PLLCFG) &= ~PLL_SEL(1);
-}
-
-void PRCI_use_pll(int refsel, int bypass,
-			 int r, int f, int q, int finaldiv,
-			 int hfroscdiv, int hfrosctrim)
-{
-  // Ensure that we aren't running off the PLL before we mess with it.
-  if (PRCI_REG(PRCI_PLLCFG) & PLL_SEL(1)) {
-    // Make sure the HFROSC is running at its default setting
-    PRCI_use_hfrosc(4, 16);
-  }
-  
-  // Set PLL Source to be HFXOSC if desired.
-  uint32_t config_value = 0;
-
-  config_value |= PLL_REFSEL(refsel);
-  
-  if (bypass) {
-    // Bypass
-    config_value |= PLL_BYPASS(1);
-
-    PRCI_REG(PRCI_PLLCFG) = config_value;
-
-    // If we don't have an HFXTAL, this doesn't really matter.
-    // Set our Final output divide to divide-by-1:
-    PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
-  } else {
-  
-    // To overclock, use the hfrosc
-    if (hfrosctrim >= 0 && hfroscdiv >= 0) {
-      PRCI_use_hfrosc(hfroscdiv, hfrosctrim);
-    }
-    
-    // Set DIV Settings for PLL
-    
-    // (Legal values of f_REF are 6-48MHz)
-
-    // Set DIVR to divide-by-2 to get 8MHz frequency
-    // (legal values of f_R are 6-12 MHz)
-
-    config_value |= PLL_BYPASS(1);
-    config_value |= PLL_R(r);
-
-    // Set DIVF to get 512Mhz frequncy
-    // There is an implied multiply-by-2, 16Mhz.
-    // So need to write 32-1
-    // (legal values of f_F are 384-768 MHz)
-    config_value |= PLL_F(f);
-
-    // Set DIVQ to divide-by-2 to get 256 MHz frequency
-    // (legal values of f_Q are 50-400Mhz)
-    config_value |= PLL_Q(q);
-
-    // Set our Final output divide to divide-by-1:
-    if (finaldiv == 1){
-      PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
-    } else {
-      PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV(finaldiv-1));
-    }
-
-    PRCI_REG(PRCI_PLLCFG) = config_value;
-
-    // Un-Bypass the PLL.
-    PRCI_REG(PRCI_PLLCFG) &= ~PLL_BYPASS(1);
-
-    // Wait for PLL Lock
-    // Note that the Lock signal can be glitchy.
-    // Need to wait 100 us
-    // RTC is running at 32kHz.
-    // So wait 4 ticks of RTC.
-    uint32_t now = CLINT_REG(CLINT_MTIME);
-    while (CLINT_REG(CLINT_MTIME) - now < 4) ;
-    
-    // Now it is safe to check for PLL Lock
-    while ((PRCI_REG(PRCI_PLLCFG) & PLL_LOCK(1)) == 0);
-
-  }
-
-  // Switch over to PLL Clock source
-  PRCI_REG(PRCI_PLLCFG) |= PLL_SEL(1);
-
-  // If we're running off HFXOSC, turn off the HFROSC to
-  // save power.
-  if (refsel) {
-    PRCI_REG(PRCI_HFROSCCFG) &= ~ROSC_EN(1);
-  }
-  
-}
-
-void PRCI_use_default_clocks()
-{
-  // Turn off the LFROSC
-  AON_REG(AON_LFROSC) &= ~ROSC_EN(1);
-
-  // Use HFROSC
-  PRCI_use_hfrosc(4, 16);
-}
-
-void PRCI_use_hfxosc(uint32_t finaldiv)
-{
-  
-  PRCI_use_pll(1, // Use HFXTAL
-	       1, // Bypass = 1
-	       0, // PLL settings don't matter
-	       0, // PLL settings don't matter
-	       0, // PLL settings don't matter
-	       finaldiv,
-	       -1,
-	       -1);
-}
-
-// This is a generic function, which
-// doesn't span the entire range of HFROSC settings.
-// It only adjusts the trim, which can span a hundred MHz or so.
-// This function does not check the legality of the PLL settings
-// at all, and it is quite possible to configure invalid PLL settings
-// this way.
-// It returns the actual measured CPU frequency.
-
-uint32_t PRCI_set_hfrosctrim_for_f_cpu(uint32_t f_cpu, PRCI_freq_target target )
-{
-
-  uint32_t hfrosctrim = 0;
-  uint32_t hfroscdiv = 4;
-  uint32_t prev_trim = 0;
-
-  // In this function we use PLL settings which
-  // will give us a 32x multiplier from the output
-  // of the HFROSC source to the output of the
-  // PLL. We first measure our HFROSC to get the
-  // right trim, then finally use it as the PLL source.
-  // We should really check here that the f_cpu
-  // requested is something in the limit of the PLL. For
-  // now that is up to the user.
-
-  // This will undershoot for frequencies not divisible by 16.
-  uint32_t desired_hfrosc_freq = (f_cpu/ 16);
-
-  PRCI_use_hfrosc(hfroscdiv, hfrosctrim);
-  
-  // Ignore the first run (for icache reasons)
-  uint32_t cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
-
-  cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
-  uint32_t prev_freq = cpu_freq;
-  
-  while ((cpu_freq < desired_hfrosc_freq) && (hfrosctrim < 0x1F)){
-    prev_trim = hfrosctrim;
-    prev_freq = cpu_freq;
-    hfrosctrim ++;
-    PRCI_use_hfrosc(hfroscdiv, hfrosctrim);
-    cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
-  } 
-
-  // We couldn't go low enough
-  if (prev_freq > desired_hfrosc_freq){
-    PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);
-    cpu_freq = PRCI_measure_mcycle_freq(1000, RTC_FREQ);
-    return cpu_freq;
-  }
-  
-  // We couldn't go high enough
-  if (cpu_freq < desired_hfrosc_freq){
-    PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);
-    cpu_freq = PRCI_measure_mcycle_freq(1000, RTC_FREQ);
-    return cpu_freq;
-  }
-
-  // Check for over/undershoot
-  switch(target) {
-  case(PRCI_FREQ_CLOSEST):
-    if ((desired_hfrosc_freq - prev_freq) < (cpu_freq - desired_hfrosc_freq)) {
-      PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);
-    } else {
-      PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, hfrosctrim);
-    }
-    break;
-  case(PRCI_FREQ_UNDERSHOOT):
-    PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);
-    break;
-  default:
-    PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, hfrosctrim);
-  }
-
-  cpu_freq =  PRCI_measure_mcycle_freq(1000, RTC_FREQ);
-  return cpu_freq;
-
-}
-
-#endif

hello-world/bsp/env/freedom-e300-hifive1/flash.lds

@@ -1,161 +0,0 @@
-OUTPUT_ARCH( "riscv" )
-
-ENTRY( _start )
-
-MEMORY
-{
-  flash (rxai!w) : ORIGIN = 0x20400000, LENGTH = 512M
-  ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 16K
-}
-
-PHDRS
-{
-  flash PT_LOAD;
-  ram_init PT_LOAD;
-  ram PT_NULL;
-}
-
-SECTIONS
-{
-  __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
-
-  .init           :
-  {
-    KEEP (*(SORT_NONE(.init)))
-  } >flash AT>flash :flash
-
-  .text           :
-  {
-    *(.text.unlikely .text.unlikely.*)
-    *(.text.startup .text.startup.*)
-    *(.text .text.*)
-    *(.gnu.linkonce.t.*)
-  } >flash AT>flash :flash
-
-  .fini           :
-  {
-    KEEP (*(SORT_NONE(.fini)))
-  } >flash AT>flash :flash
-
-  PROVIDE (__etext = .);
-  PROVIDE (_etext = .);
-  PROVIDE (etext = .);
-
-  .rodata         :
-  {
-    *(.rdata)
-    *(.rodata .rodata.*)
-    *(.gnu.linkonce.r.*)
-  } >flash AT>flash :flash
-
-  . = ALIGN(4);
-
-  .preinit_array  :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } >flash AT>flash :flash
-
-  .init_array     :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
-    KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } >flash AT>flash :flash
-
-  .fini_array     :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
-    KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } >flash AT>flash :flash
-
-  .ctors          :
-  {
-    /* gcc uses crtbegin.o to find the start of
-       the constructors, so we make sure it is
-       first.  Because this is a wildcard, it
-       doesn't matter if the user does not
-       actually link against crtbegin.o; the
-       linker won't look for a file to match a
-       wildcard.  The wildcard also means that it
-       doesn't matter which directory crtbegin.o
-       is in.  */
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*crtbegin?.o(.ctors))
-    /* We don't want to include the .ctor section from
-       the crtend.o file until after the sorted ctors.
-       The .ctor section from the crtend file contains the
-       end of ctors marker and it must be last */
-    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*(.ctors))
-  } >flash AT>flash :flash
-
-  .dtors          :
-  {
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*crtbegin?.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*(.dtors))
-  } >flash AT>flash :flash
-
-  .lalign         :
-  {
-    . = ALIGN(4);
-    PROVIDE( _data_lma = . );
-  } >flash AT>flash :flash
-
-  .dalign         :
-  {
-    . = ALIGN(4);
-    PROVIDE( _data = . );
-  } >ram AT>flash :ram_init
-
-  .data          :
-  {
-    *(.data .data.*)
-    *(.gnu.linkonce.d.*)
-    . = ALIGN(8);
-    PROVIDE( __global_pointer$ = . + 0x800 );
-    *(.sdata .sdata.*)
-    *(.gnu.linkonce.s.*)
-    . = ALIGN(8);
-    *(.srodata.cst16)
-    *(.srodata.cst8)
-    *(.srodata.cst4)
-    *(.srodata.cst2)
-    *(.srodata .srodata.*)
-  } >ram AT>flash :ram_init
-
-  . = ALIGN(4);
-  PROVIDE( _edata = . );
-  PROVIDE( edata = . );
-
-  PROVIDE( _fbss = . );
-  PROVIDE( __bss_start = . );
-  .bss            :
-  {
-    *(.sbss*)
-    *(.gnu.linkonce.sb.*)
-    *(.bss .bss.*)
-    *(.gnu.linkonce.b.*)
-    *(COMMON)
-    . = ALIGN(4);
-  } >ram AT>ram :ram
-
-  . = ALIGN(8);
-  PROVIDE( _end = . );
-  PROVIDE( end = . );
-
-  .stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
-  {
-    PROVIDE( _heap_end = . );
-    . = __stack_size;
-    PROVIDE( _sp = . );
-  } >ram AT>ram :ram
-}

hello-world/bsp/env/freedom-e300-hifive1/init.c

@@ -1,238 +0,0 @@
-#include <stdint.h>
-#include <stdio.h>
-#include <unistd.h>
-
-#include "platform.h"
-#include "encoding.h"
-
-extern int main(int argc, char** argv);
-extern void trap_entry();
-
-static unsigned long mtime_lo(void)
-{
-  return *(volatile unsigned long *)(CLINT_CTRL_ADDR + CLINT_MTIME);
-}
-
-#ifdef __riscv32
-
-static uint32_t mtime_hi(void)
-{
-  return *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIME + 4);
-}
-
-uint64_t get_timer_value()
-{
-  while (1) {
-    uint32_t hi = mtime_hi();
-    uint32_t lo = mtime_lo();
-    if (hi == mtime_hi())
-      return ((uint64_t)hi << 32) | lo;
-  }
-}
-
-#else /* __riscv32 */
-
-uint64_t get_timer_value()
-{
-  return mtime_lo();
-}
-
-#endif
-
-unsigned long get_timer_freq()
-{
-  return 32768;
-}
-
-static void use_hfrosc(int div, int trim)
-{
-  // Make sure the HFROSC is running at its default setting
-  PRCI_REG(PRCI_HFROSCCFG) = (ROSC_DIV(div) | ROSC_TRIM(trim) | ROSC_EN(1));
-  while ((PRCI_REG(PRCI_HFROSCCFG) & ROSC_RDY(1)) == 0) ;
-  PRCI_REG(PRCI_PLLCFG) &= ~PLL_SEL(1);
-}
-
-static void use_pll(int refsel, int bypass, int r, int f, int q)
-{
-  // Ensure that we aren't running off the PLL before we mess with it.
-  if (PRCI_REG(PRCI_PLLCFG) & PLL_SEL(1)) {
-    // Make sure the HFROSC is running at its default setting
-    use_hfrosc(4, 16);
-  }
-
-  // Set PLL Source to be HFXOSC if available.
-  uint32_t config_value = 0;
-
-  config_value |= PLL_REFSEL(refsel);
-
-  if (bypass) {
-    // Bypass
-    config_value |= PLL_BYPASS(1);
-
-    PRCI_REG(PRCI_PLLCFG) = config_value;
-
-    // If we don't have an HFXTAL, this doesn't really matter.
-    // Set our Final output divide to divide-by-1:
-    PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
-  } else {
-    // In case we are executing from QSPI,
-    // (which is quite likely) we need to
-    // set the QSPI clock divider appropriately
-    // before boosting the clock frequency.
-
-    // Div = f_sck/2
-    SPI0_REG(SPI_REG_SCKDIV) = 8;
-
-    // Set DIV Settings for PLL
-    // Both HFROSC and HFXOSC are modeled as ideal
-    // 16MHz sources (assuming dividers are set properly for
-    // HFROSC).
-    // (Legal values of f_REF are 6-48MHz)
-
-    // Set DIVR to divide-by-2 to get 8MHz frequency
-    // (legal values of f_R are 6-12 MHz)
-
-    config_value |= PLL_BYPASS(1);
-    config_value |= PLL_R(r);
-
-    // Set DIVF to get 512Mhz frequncy
-    // There is an implied multiply-by-2, 16Mhz.
-    // So need to write 32-1
-    // (legal values of f_F are 384-768 MHz)
-    config_value |= PLL_F(f);
-
-    // Set DIVQ to divide-by-2 to get 256 MHz frequency
-    // (legal values of f_Q are 50-400Mhz)
-    config_value |= PLL_Q(q);
-
-    // Set our Final output divide to divide-by-1:
-    PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
-
-    PRCI_REG(PRCI_PLLCFG) = config_value;
-
-    // Un-Bypass the PLL.
-    PRCI_REG(PRCI_PLLCFG) &= ~PLL_BYPASS(1);
-
-    // Wait for PLL Lock
-    // Note that the Lock signal can be glitchy.
-    // Need to wait 100 us
-    // RTC is running at 32kHz.
-    // So wait 4 ticks of RTC.
-    uint32_t now = mtime_lo();
-    while (mtime_lo() - now < 4) ;
-
-    // Now it is safe to check for PLL Lock
-    while ((PRCI_REG(PRCI_PLLCFG) & PLL_LOCK(1)) == 0) ;
-  }
-
-  // Switch over to PLL Clock source
-  PRCI_REG(PRCI_PLLCFG) |= PLL_SEL(1);
-}
-
-static void use_default_clocks()
-{
-  // Turn off the LFROSC
-  AON_REG(AON_LFROSC) &= ~ROSC_EN(1);
-
-  // Use HFROSC
-  use_hfrosc(4, 16);
-}
-
-static unsigned long __attribute__((noinline)) measure_cpu_freq(size_t n)
-{
-  unsigned long start_mtime, delta_mtime;
-  unsigned long mtime_freq = get_timer_freq();
-
-  // Don't start measuruing until we see an mtime tick
-  unsigned long tmp = mtime_lo();
-  do {
-    start_mtime = mtime_lo();
-  } while (start_mtime == tmp);
-
-  unsigned long start_mcycle = read_csr(mcycle);
-
-  do {
-    delta_mtime = mtime_lo() - start_mtime;
-  } while (delta_mtime < n);
-
-  unsigned long delta_mcycle = read_csr(mcycle) - start_mcycle;
-
-  return (delta_mcycle / delta_mtime) * mtime_freq
-         + ((delta_mcycle % delta_mtime) * mtime_freq) / delta_mtime;
-}
-
-unsigned long get_cpu_freq()
-{
-  static uint32_t cpu_freq;
-
-  if (!cpu_freq) {
-    // warm up I$
-    measure_cpu_freq(1);
-    // measure for real
-    cpu_freq = measure_cpu_freq(10);
-  }
-
-  return cpu_freq;
-}
-
-static void uart_init(size_t baud_rate)
-{
-  GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
-  GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
-  UART0_REG(UART_REG_DIV) = get_cpu_freq() / baud_rate - 1;
-  UART0_REG(UART_REG_TXCTRL) |= UART_TXEN;
-}
-
-
-
-#ifdef USE_PLIC
-extern void handle_m_ext_interrupt();
-#endif
-
-#ifdef USE_M_TIME
-extern void handle_m_time_interrupt();
-#endif
-
-uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
-{
-  if (0){
-#ifdef USE_PLIC
-    // External Machine-Level interrupt from PLIC
-  } else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_EXT)) {
-    handle_m_ext_interrupt();
-#endif
-#ifdef USE_M_TIME
-    // External Machine-Level interrupt from PLIC
-  } else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_TIMER)){
-    handle_m_time_interrupt();
-#endif
-  }
-  else {
-    write(1, "trap\n", 5);
-    _exit(1 + mcause);
-  }
-  return epc;
-}
-
-void _init()
-{
-  
-  #ifndef NO_INIT
-  use_default_clocks();
-  use_pll(0, 0, 1, 31, 1);
-  uart_init(115200);
-
-  printf("core freq at %d Hz\n", get_cpu_freq());
-
-  write_csr(mtvec, &trap_entry);
-  if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
-    write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
-    write_csr(fcsr, 0); // initialize rounding mode, undefined at reset
-  }
-  #endif
-  
-}
-
-void _fini()
-{
-}

hello-world/bsp/env/freedom-e300-hifive1/openocd.cfg

@@ -1,34 +0,0 @@
-adapter_khz     10000
-
-interface ftdi
-ftdi_device_desc "Dual RS232-HS"
-ftdi_vid_pid 0x0403 0x6010
-
-ftdi_layout_init 0x0008 0x001b
-ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
-
-#Reset Stretcher logic on FE310 is ~1 second long
-#This doesn't apply if you use
-# ftdi_set_signal, but still good to document
-#adapter_nsrst_delay 1500
-
-set _CHIPNAME riscv
-jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME riscv -chain-position $_TARGETNAME
-$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
-
-flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME
-init
-#reset -- This type of reset is not implemented yet
-if {[ info exists pulse_srst]} {
-  ftdi_set_signal nSRST 0
-  ftdi_set_signal nSRST z
-  #Wait for the reset stretcher
-  #It will work without this, but
-  #will incur lots of delays for later commands.
-  sleep 1500
-}	
-halt
-#flash protect 0 64 last off

hello-world/bsp/env/freedom-e300-hifive1/platform.h

@@ -1,133 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_PLATFORM_H
-#define _SIFIVE_PLATFORM_H
-
-// Some things missing from the official encoding.h
-#define MCAUSE_INT         0x80000000
-#define MCAUSE_CAUSE       0x7FFFFFFF
-
-#include "sifive/const.h"
-#include "sifive/devices/aon.h"
-#include "sifive/devices/clint.h"
-#include "sifive/devices/gpio.h"
-#include "sifive/devices/otp.h"
-#include "sifive/devices/plic.h"
-#include "sifive/devices/prci.h"
-#include "sifive/devices/pwm.h"
-#include "sifive/devices/spi.h"
-#include "sifive/devices/uart.h"
-
-/****************************************************************************
- * Platform definitions
- *****************************************************************************/
-
-// Memory map
-#define MASKROM_MEM_ADDR _AC(0x00001000,UL)
-#define TRAPVEC_TABLE_CTRL_ADDR _AC(0x00001010,UL)
-#define OTP_MEM_ADDR _AC(0x00020000,UL)
-#define CLINT_CTRL_ADDR _AC(0x02000000,UL)
-#define PLIC_CTRL_ADDR _AC(0x0C000000,UL)
-#define AON_CTRL_ADDR _AC(0x10000000,UL)
-#define PRCI_CTRL_ADDR _AC(0x10008000,UL)
-#define OTP_CTRL_ADDR _AC(0x10010000,UL)
-#define GPIO_CTRL_ADDR _AC(0x10012000,UL)
-#define UART0_CTRL_ADDR _AC(0x10013000,UL)
-#define SPI0_CTRL_ADDR _AC(0x10014000,UL)
-#define PWM0_CTRL_ADDR _AC(0x10015000,UL)
-#define UART1_CTRL_ADDR _AC(0x10023000,UL)
-#define SPI1_CTRL_ADDR _AC(0x10024000,UL)
-#define PWM1_CTRL_ADDR _AC(0x10025000,UL)
-#define SPI2_CTRL_ADDR _AC(0x10034000,UL)
-#define PWM2_CTRL_ADDR _AC(0x10035000,UL)
-#define SPI0_MEM_ADDR _AC(0x20000000,UL)
-#define MEM_CTRL_ADDR _AC(0x80000000,UL)
-
-// IOF masks
-#define IOF0_SPI1_MASK          _AC(0x000007FC,UL)
-#define SPI11_NUM_SS     (4)
-#define IOF_SPI1_SS0          (2u)
-#define IOF_SPI1_SS1          (8u)
-#define IOF_SPI1_SS2          (9u)
-#define IOF_SPI1_SS3          (10u)
-#define IOF_SPI1_MOSI         (3u)
-#define IOF_SPI1_MISO         (4u)
-#define IOF_SPI1_SCK          (5u)
-#define IOF_SPI1_DQ0          (3u)
-#define IOF_SPI1_DQ1          (4u)
-#define IOF_SPI1_DQ2          (6u)
-#define IOF_SPI1_DQ3          (7u)
-
-#define IOF0_SPI2_MASK          _AC(0xFC000000,UL)
-#define SPI2_NUM_SS       (1)
-#define IOF_SPI2_SS0          (26u)
-#define IOF_SPI2_MOSI         (27u)
-#define IOF_SPI2_MISO         (28u)
-#define IOF_SPI2_SCK          (29u)
-#define IOF_SPI2_DQ0          (27u)
-#define IOF_SPI2_DQ1          (28u)
-#define IOF_SPI2_DQ2          (30u)
-#define IOF_SPI2_DQ3          (31u)
-
-//#define IOF0_I2C_MASK          _AC(0x00003000,UL)
-
-#define IOF0_UART0_MASK         _AC(0x00030000, UL)
-#define IOF_UART0_RX   (16u)
-#define IOF_UART0_TX   (17u)
-
-#define IOF0_UART1_MASK         _AC(0x03000000, UL)
-#define IOF_UART1_RX (24u)
-#define IOF_UART1_TX (25u)
-
-#define IOF1_PWM0_MASK          _AC(0x0000000F, UL)
-#define IOF1_PWM1_MASK          _AC(0x00780000, UL)
-#define IOF1_PWM2_MASK          _AC(0x00003C00, UL)
-
-// Interrupt numbers
-#define INT_RESERVED 0
-#define INT_WDOGCMP 1
-#define INT_RTCCMP 2
-#define INT_UART0_BASE 3
-#define INT_UART1_BASE 4
-#define INT_SPI0_BASE 5
-#define INT_SPI1_BASE 6
-#define INT_SPI2_BASE 7
-#define INT_GPIO_BASE 8
-#define INT_PWM0_BASE 40
-#define INT_PWM1_BASE 44
-#define INT_PWM2_BASE 48
-
-// Helper functions
-#define _REG32(p, i) (*(volatile uint32_t *) ((p) + (i)))
-#define _REG32P(p, i) ((volatile uint32_t *) ((p) + (i)))
-#define AON_REG(offset) _REG32(AON_CTRL_ADDR, offset)
-#define CLINT_REG(offset) _REG32(CLINT_CTRL_ADDR, offset)
-#define GPIO_REG(offset) _REG32(GPIO_CTRL_ADDR, offset)
-#define OTP_REG(offset)  _REG32(OTP_CTRL_ADDR, offset)
-#define PLIC_REG(offset) _REG32(PLIC_CTRL_ADDR, offset)
-#define PRCI_REG(offset) _REG32(PRCI_CTRL_ADDR, offset)
-#define PWM0_REG(offset) _REG32(PWM0_CTRL_ADDR, offset)
-#define PWM1_REG(offset) _REG32(PWM1_CTRL_ADDR, offset)
-#define PWM2_REG(offset) _REG32(PWM2_CTRL_ADDR, offset)
-#define SPI0_REG(offset) _REG32(SPI0_CTRL_ADDR, offset)
-#define SPI1_REG(offset) _REG32(SPI1_CTRL_ADDR, offset)
-#define SPI2_REG(offset) _REG32(SPI2_CTRL_ADDR, offset)
-#define UART0_REG(offset) _REG32(UART0_CTRL_ADDR, offset)
-#define UART1_REG(offset) _REG32(UART1_CTRL_ADDR, offset)
-
-// Misc
-
-#include <stdint.h>
-
-#define NUM_GPIO 32
-
-#define PLIC_NUM_INTERRUPTS 52
-#define PLIC_NUM_PRIORITIES 7
-
-#include "hifive1.h"
-
-unsigned long get_cpu_freq(void);
-unsigned long get_timer_freq(void);
-uint64_t get_timer_value(void);
-
-#endif /* _SIFIVE_PLATFORM_H */

hello-world/bsp/env/hifive1.h

@@ -1,81 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_HIFIVE1_H
-#define _SIFIVE_HIFIVE1_H
-
-#include <stdint.h>
-
-/****************************************************************************
- * GPIO Connections
- *****************************************************************************/
-
-// These are the GPIO bit offsets for the RGB LED on HiFive1 Board.
-// These are also mapped to RGB LEDs on the Freedom E300 Arty
-// FPGA
-// Dev Kit.
-
-#define RED_LED_OFFSET   22
-#define GREEN_LED_OFFSET 19
-#define BLUE_LED_OFFSET  21
-
-// These are the GPIO bit offsets for the differen digital pins
-// on the headers for both the HiFive1 Board and the Freedom E300 Arty FPGA Dev Kit.
-#define PIN_0_OFFSET 16
-#define PIN_1_OFFSET 17
-#define PIN_2_OFFSET 18
-#define PIN_3_OFFSET 19
-#define PIN_4_OFFSET 20
-#define PIN_5_OFFSET 21
-#define PIN_6_OFFSET 22
-#define PIN_7_OFFSET 23
-#define PIN_8_OFFSET 0
-#define PIN_9_OFFSET 1
-#define PIN_10_OFFSET 2
-#define PIN_11_OFFSET 3
-#define PIN_12_OFFSET 4
-#define PIN_13_OFFSET 5
-//#define PIN_14_OFFSET 8 //This pin is not connected on either board.
-#define PIN_15_OFFSET 9
-#define PIN_16_OFFSET 10
-#define PIN_17_OFFSET 11
-#define PIN_18_OFFSET 12
-#define PIN_19_OFFSET 13
-
-// These are *PIN* numbers, not
-// GPIO Offset Numbers.
-#define PIN_SPI1_SCK    (13u)
-#define PIN_SPI1_MISO   (12u)
-#define PIN_SPI1_MOSI   (11u)
-#define PIN_SPI1_SS0    (10u)
-#define PIN_SPI1_SS1    (14u) 
-#define PIN_SPI1_SS2    (15u)
-#define PIN_SPI1_SS3    (16u)
-
-#define SS_PIN_TO_CS_ID(x) \
-  ((x==PIN_SPI1_SS0 ? 0 :		 \
-    (x==PIN_SPI1_SS1 ? 1 :		 \
-     (x==PIN_SPI1_SS2 ? 2 :		 \
-      (x==PIN_SPI1_SS3 ? 3 :		 \
-       -1))))) 
-
-
-// These buttons are present only on the Freedom E300 Arty Dev Kit.
-#ifdef HAS_BOARD_BUTTONS
-#define BUTTON_0_OFFSET 15
-#define BUTTON_1_OFFSET 30
-#define BUTTON_2_OFFSET 31
-
-#define INT_DEVICE_BUTTON_0 (INT_GPIO_BASE + BUTTON_0_OFFSET)
-#define INT_DEVICE_BUTTON_1 (INT_GPIO_BASE + BUTTON_1_OFFSET)
-#define INT_DEVICE_BUTTON_2 (INT_GPIO_BASE + BUTTON_2_OFFSET)
-
-#endif
-
-#define HAS_HFXOSC 1
-#define HAS_LFROSC_BYPASS 1
-
-#define RTC_FREQ 32768
-
-void write_hex(int fd, unsigned long int hex);
-
-#endif /* _SIFIVE_HIFIVE1_H */

hello-world/bsp/env/start.S

@@ -1,111 +0,0 @@
-// See LICENSE for license details.
-#include <sifive/smp.h>
-
-/* This is defined in sifive/platform.h, but that can't be included from
- * assembly. */
-#define CLINT_CTRL_ADDR 0x02000000
-
-	.section .init
-	.globl _start
-	.type _start,@function
-
-_start:
-	.cfi_startproc
-	.cfi_undefined ra
-.option push
-.option norelax
-	la gp, __global_pointer$
-.option pop
-	la sp, _sp
-
-#if defined(ENABLE_SMP)
-	smp_pause(t0, t1)
-#endif
-
-	/* Load data section */
-	la a0, _data_lma
-	la a1, _data
-	la a2, _edata
-	bgeu a1, a2, 2f
-1:
-	lw t0, (a0)
-	sw t0, (a1)
-	addi a0, a0, 4
-	addi a1, a1, 4
-	bltu a1, a2, 1b
-2:
-
-	/* Clear bss section */
-	la a0, __bss_start
-	la a1, _end
-	bgeu a0, a1, 2f
-1:
-	sw zero, (a0)
-	addi a0, a0, 4
-	bltu a0, a1, 1b
-2:
-
-	/* Call global constructors */
-	la a0, __libc_fini_array
-	call atexit
-	call __libc_init_array
-
-#ifndef __riscv_float_abi_soft
-	/* Enable FPU */
-	li t0, MSTATUS_FS
-	csrs mstatus, t0
-	csrr t1, mstatus
-	and t1, t1, t0
-	beqz t1, 1f
-	fssr x0
-1:
-#endif
-
-#if defined(ENABLE_SMP)
-	smp_resume(t0, t1)
-
-	csrr a0, mhartid
-	bnez a0, 2f
-#endif
-
-	auipc ra, 0
-	addi sp, sp, -16
-#if __riscv_xlen == 32
-	sw ra, 8(sp)
-#else
-	sd ra, 8(sp)
-#endif
-        call _init
-	/* argc = argv = 0 */
-	li a0, 0
-	li a1, 0
-	call main
-	tail exit
-1:
-	j 1b
-
-#if defined(ENABLE_SMP)
-2:
-	la t0, trap_entry
-	csrw mtvec, t0
-
-	csrr a0, mhartid
-	la t1, _sp
-	slli t0, a0, 10
-	sub sp, t1, t0
-
-	auipc ra, 0
-	addi sp, sp, -16
-#if __riscv_xlen == 32
-	sw ra, 8(sp)
-#else
-	sd ra, 8(sp)
-#endif
-
-	call secondary_main
-	tail exit
-
-1:
-	j 1b
-#endif
-	.cfi_endproc

hello-world/bsp/include/sifive/bits.h

@@ -1,36 +0,0 @@
-// See LICENSE for license details.
-#ifndef _RISCV_BITS_H
-#define _RISCV_BITS_H
-
-#define likely(x) __builtin_expect((x), 1)
-#define unlikely(x) __builtin_expect((x), 0)
-
-#define ROUNDUP(a, b) ((((a)-1)/(b)+1)*(b))
-#define ROUNDDOWN(a, b) ((a)/(b)*(b))
-
-#define MAX(a, b) ((a) > (b) ? (a) : (b))
-#define MIN(a, b) ((a) < (b) ? (a) : (b))
-#define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi)
-
-#define EXTRACT_FIELD(val, which) (((val) & (which)) / ((which) & ~((which)-1)))
-#define INSERT_FIELD(val, which, fieldval) (((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1))))
-
-#define STR(x) XSTR(x)
-#define XSTR(x) #x
-
-#if __riscv_xlen == 64
-# define SLL32    sllw
-# define STORE    sd
-# define LOAD     ld
-# define LWU      lwu
-# define LOG_REGBYTES 3
-#else
-# define SLL32    sll
-# define STORE    sw
-# define LOAD     lw
-# define LWU      lw
-# define LOG_REGBYTES 2
-#endif
-#define REGBYTES (1 << LOG_REGBYTES)
-
-#endif

hello-world/bsp/include/sifive/const.h

@@ -1,18 +0,0 @@
-// See LICENSE for license details.
-/* Derived from <linux/const.h> */
-
-#ifndef _SIFIVE_CONST_H
-#define _SIFIVE_CONST_H
-
-#ifdef __ASSEMBLER__
-#define _AC(X,Y)        X
-#define _AT(T,X)        X
-#else
-#define _AC(X,Y)        (X##Y)
-#define _AT(T,X)        ((T)(X))
-#endif /* !__ASSEMBLER__*/
-
-#define _BITUL(x)       (_AC(1,UL) << (x))
-#define _BITULL(x)      (_AC(1,ULL) << (x))
-
-#endif /* _SIFIVE_CONST_H */

hello-world/bsp/include/sifive/devices/aon.h

@@ -1,88 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_AON_H
-#define _SIFIVE_AON_H
-
-/* Register offsets */
-
-#define AON_WDOGCFG     0x000
-#define AON_WDOGCOUNT   0x008
-#define AON_WDOGS       0x010
-#define AON_WDOGFEED    0x018
-#define AON_WDOGKEY     0x01C
-#define AON_WDOGCMP     0x020
-
-#define AON_RTCCFG      0x040
-#define AON_RTCLO       0x048
-#define AON_RTCHI       0x04C
-#define AON_RTCS        0x050
-#define AON_RTCCMP      0x060
-
-#define AON_BACKUP0     0x080
-#define AON_BACKUP1     0x084
-#define AON_BACKUP2     0x088
-#define AON_BACKUP3     0x08C
-#define AON_BACKUP4     0x090
-#define AON_BACKUP5     0x094
-#define AON_BACKUP6     0x098
-#define AON_BACKUP7     0x09C
-#define AON_BACKUP8     0x0A0
-#define AON_BACKUP9     0x0A4
-#define AON_BACKUP10    0x0A8
-#define AON_BACKUP11    0x0AC
-#define AON_BACKUP12    0x0B0
-#define AON_BACKUP13    0x0B4
-#define AON_BACKUP14    0x0B8
-#define AON_BACKUP15    0x0BC
-
-#define AON_PMUWAKEUPI0 0x100
-#define AON_PMUWAKEUPI1 0x104
-#define AON_PMUWAKEUPI2 0x108
-#define AON_PMUWAKEUPI3 0x10C
-#define AON_PMUWAKEUPI4 0x110
-#define AON_PMUWAKEUPI5 0x114
-#define AON_PMUWAKEUPI6 0x118
-#define AON_PMUWAKEUPI7 0x11C
-#define AON_PMUSLEEPI0  0x120
-#define AON_PMUSLEEPI1  0x124
-#define AON_PMUSLEEPI2  0x128
-#define AON_PMUSLEEPI3  0x12C
-#define AON_PMUSLEEPI4  0x130
-#define AON_PMUSLEEPI5  0x134
-#define AON_PMUSLEEPI6  0x138
-#define AON_PMUSLEEPI7  0x13C
-#define AON_PMUIE       0x140
-#define AON_PMUCAUSE    0x144
-#define AON_PMUSLEEP    0x148
-#define AON_PMUKEY      0x14C
-
-#define AON_LFROSC      0x070
-/* Constants */
-
-#define AON_WDOGKEY_VALUE  0x51F15E
-#define AON_WDOGFEED_VALUE 0xD09F00D
-
-#define AON_WDOGCFG_SCALE       0x0000000F
-#define AON_WDOGCFG_RSTEN       0x00000100
-#define AON_WDOGCFG_ZEROCMP     0x00000200
-#define AON_WDOGCFG_ENALWAYS    0x00001000
-#define AON_WDOGCFG_ENCOREAWAKE 0x00002000
-#define AON_WDOGCFG_CMPIP       0x10000000
-
-#define AON_RTCCFG_SCALE     0x0000000F
-#define AON_RTCCFG_ENALWAYS  0x00001000
-#define AON_RTCCFG_CMPIP     0x10000000
-
-#define AON_WAKEUPCAUSE_RESET   0x00
-#define AON_WAKEUPCAUSE_RTC     0x01
-#define AON_WAKEUPCAUSE_DWAKEUP 0x02
-#define AON_WAKEUPCAUSE_AWAKEUP 0x03
-
-#define AON_RESETCAUSE_POWERON  0x0000
-#define AON_RESETCAUSE_EXTERNAL 0x0100
-#define AON_RESETCAUSE_WATCHDOG 0x0200
-
-#define AON_PMUCAUSE_WAKEUPCAUSE 0x00FF
-#define AON_PMUCAUSE_RESETCAUSE  0xFF00
-
-#endif /* _SIFIVE_AON_H */

hello-world/bsp/include/sifive/devices/clint.h

@@ -1,14 +0,0 @@
-// See LICENSE for license details
-
-#ifndef _SIFIVE_CLINT_H
-#define _SIFIVE_CLINT_H
-
-
-#define CLINT_MSIP 0x0000
-#define CLINT_MSIP_size   0x4
-#define CLINT_MTIMECMP 0x4000
-#define CLINT_MTIMECMP_size 0x8
-#define CLINT_MTIME 0xBFF8
-#define CLINT_MTIME_size 0x8
-
-#endif /* _SIFIVE_CLINT_H */ 

hello-world/bsp/include/sifive/devices/gpio.h

@@ -1,24 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_GPIO_H
-#define _SIFIVE_GPIO_H
-
-#define GPIO_INPUT_VAL  (0x00)
-#define GPIO_INPUT_EN   (0x04)
-#define GPIO_OUTPUT_EN  (0x08)
-#define GPIO_OUTPUT_VAL (0x0C)
-#define GPIO_PULLUP_EN  (0x10)
-#define GPIO_DRIVE      (0x14)
-#define GPIO_RISE_IE    (0x18)
-#define GPIO_RISE_IP    (0x1C)
-#define GPIO_FALL_IE    (0x20)
-#define GPIO_FALL_IP    (0x24)
-#define GPIO_HIGH_IE    (0x28)
-#define GPIO_HIGH_IP    (0x2C)
-#define GPIO_LOW_IE     (0x30)
-#define GPIO_LOW_IP     (0x34)
-#define GPIO_IOF_EN     (0x38)
-#define GPIO_IOF_SEL    (0x3C)
-#define GPIO_OUTPUT_XOR    (0x40)
-
-#endif /* _SIFIVE_GPIO_H */

hello-world/bsp/include/sifive/devices/otp.h

@@ -1,23 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_OTP_H
-#define _SIFIVE_OTP_H
-
-/* Register offsets */
-
-#define OTP_LOCK         0x00
-#define OTP_CK           0x04
-#define OTP_OE           0x08
-#define OTP_SEL          0x0C
-#define OTP_WE           0x10
-#define OTP_MR           0x14
-#define OTP_MRR          0x18
-#define OTP_MPP          0x1C
-#define OTP_VRREN        0x20
-#define OTP_VPPEN        0x24
-#define OTP_A            0x28
-#define OTP_D            0x2C
-#define OTP_Q            0x30
-#define OTP_READ_TIMINGS 0x34
-
-#endif

hello-world/bsp/include/sifive/devices/plic.h

@@ -1,31 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef PLIC_H
-#define PLIC_H
-
-#include <sifive/const.h>
-
-// 32 bits per source
-#define PLIC_PRIORITY_OFFSET            _AC(0x0000,UL)
-#define PLIC_PRIORITY_SHIFT_PER_SOURCE  2
-// 1 bit per source (1 address)
-#define PLIC_PENDING_OFFSET             _AC(0x1000,UL)
-#define PLIC_PENDING_SHIFT_PER_SOURCE   0
-
-//0x80 per target
-#define PLIC_ENABLE_OFFSET              _AC(0x2000,UL)
-#define PLIC_ENABLE_SHIFT_PER_TARGET    7
-
-
-#define PLIC_THRESHOLD_OFFSET           _AC(0x200000,UL)
-#define PLIC_CLAIM_OFFSET               _AC(0x200004,UL)
-#define PLIC_THRESHOLD_SHIFT_PER_TARGET 12
-#define PLIC_CLAIM_SHIFT_PER_TARGET     12
-
-#define PLIC_MAX_SOURCE                 1023
-#define PLIC_SOURCE_MASK                0x3FF
-
-#define PLIC_MAX_TARGET                 15871
-#define PLIC_TARGET_MASK                0x3FFF
-
-#endif /* PLIC_H */

hello-world/bsp/include/sifive/devices/prci.h

@@ -1,56 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_PRCI_H
-#define _SIFIVE_PRCI_H
-
-/* Register offsets */
-
-#define PRCI_HFROSCCFG   (0x0000)
-#define PRCI_HFXOSCCFG   (0x0004)
-#define PRCI_PLLCFG      (0x0008)
-#define PRCI_PLLDIV      (0x000C)
-#define PRCI_PROCMONCFG  (0x00F0)
-
-/* Fields */
-#define ROSC_DIV(x)    (((x) & 0x2F) << 0 ) 
-#define ROSC_TRIM(x)   (((x) & 0x1F) << 16)
-#define ROSC_EN(x)     (((x) & 0x1 ) << 30) 
-#define ROSC_RDY(x)    (((x) & 0x1 ) << 31)
-
-#define XOSC_EN(x)     (((x) & 0x1) << 30)
-#define XOSC_RDY(x)    (((x) & 0x1) << 31)
-
-#define PLL_R(x)       (((x) & 0x7)  << 0)
-// single reserved bit for F LSB.
-#define PLL_F(x)       (((x) & 0x3F) << 4)
-#define PLL_Q(x)       (((x) & 0x3)  << 10)
-#define PLL_SEL(x)     (((x) & 0x1)  << 16)
-#define PLL_REFSEL(x)  (((x) & 0x1)  << 17)
-#define PLL_BYPASS(x)  (((x) & 0x1)  << 18)
-#define PLL_LOCK(x)    (((x) & 0x1)  << 31)
-
-#define PLL_R_default 0x1
-#define PLL_F_default 0x1F
-#define PLL_Q_default 0x3
-
-#define PLL_REFSEL_HFROSC 0x0
-#define PLL_REFSEL_HFXOSC 0x1
-
-#define PLL_SEL_HFROSC 0x0
-#define PLL_SEL_PLL    0x1
-
-#define PLL_FINAL_DIV(x)      (((x) & 0x3F) << 0)
-#define PLL_FINAL_DIV_BY_1(x) (((x) & 0x1 ) << 8)
-
-#define PROCMON_DIV(x)   (((x) & 0x1F) << 0)
-#define PROCMON_TRIM(x)  (((x) & 0x1F) << 8)
-#define PROCMON_EN(x)    (((x) & 0x1)  << 16)
-#define PROCMON_SEL(x)   (((x) & 0x3)  << 24)
-#define PROCMON_NT_EN(x) (((x) & 0x1)  << 28)
-
-#define PROCMON_SEL_HFCLK     0
-#define PROCMON_SEL_HFXOSCIN  1
-#define PROCMON_SEL_PLLOUTDIV 2
-#define PROCMON_SEL_PROCMON   3
-
-#endif // _SIFIVE_PRCI_H

hello-world/bsp/include/sifive/devices/pwm.h

@@ -1,37 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_PWM_H
-#define _SIFIVE_PWM_H
-
-/* Register offsets */
-
-#define PWM_CFG   0x00
-#define PWM_COUNT 0x08
-#define PWM_S     0x10
-#define PWM_CMP0  0x20
-#define PWM_CMP1  0x24
-#define PWM_CMP2  0x28
-#define PWM_CMP3  0x2C
-
-/* Constants */
-
-#define PWM_CFG_SCALE       0x0000000F
-#define PWM_CFG_STICKY      0x00000100
-#define PWM_CFG_ZEROCMP     0x00000200
-#define PWM_CFG_DEGLITCH    0x00000400
-#define PWM_CFG_ENALWAYS    0x00001000
-#define PWM_CFG_ONESHOT     0x00002000
-#define PWM_CFG_CMP0CENTER  0x00010000
-#define PWM_CFG_CMP1CENTER  0x00020000
-#define PWM_CFG_CMP2CENTER  0x00040000
-#define PWM_CFG_CMP3CENTER  0x00080000
-#define PWM_CFG_CMP0GANG    0x01000000
-#define PWM_CFG_CMP1GANG    0x02000000
-#define PWM_CFG_CMP2GANG    0x04000000
-#define PWM_CFG_CMP3GANG    0x08000000
-#define PWM_CFG_CMP0IP      0x10000000
-#define PWM_CFG_CMP1IP      0x20000000
-#define PWM_CFG_CMP2IP      0x40000000
-#define PWM_CFG_CMP3IP      0x80000000
-
-#endif /* _SIFIVE_PWM_H */

hello-world/bsp/include/sifive/devices/uart.h

@@ -1,27 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_UART_H
-#define _SIFIVE_UART_H
-
-/* Register offsets */
-#define UART_REG_TXFIFO         0x00
-#define UART_REG_RXFIFO         0x04
-#define UART_REG_TXCTRL         0x08
-#define UART_REG_RXCTRL         0x0c
-#define UART_REG_IE             0x10
-#define UART_REG_IP             0x14
-#define UART_REG_DIV            0x18
-
-/* TXCTRL register */
-#define UART_TXEN               0x1
-#define UART_TXWM(x)            (((x) & 0xffff) << 16)
-
-/* RXCTRL register */
-#define UART_RXEN               0x1
-#define UART_RXWM(x)            (((x) & 0xffff) << 16)
-
-/* IP register */
-#define UART_IP_TXWM            0x1
-#define UART_IP_RXWM            0x2
-
-#endif /* _SIFIVE_UART_H */

hello-world/bsp/include/sifive/sections.h

@@ -1,17 +0,0 @@
-// See LICENSE for license details.
-#ifndef _SECTIONS_H
-#define _SECTIONS_H
-
-extern unsigned char _rom[];
-extern unsigned char _rom_end[];
-
-extern unsigned char _ram[];
-extern unsigned char _ram_end[];
-
-extern unsigned char _ftext[];
-extern unsigned char _etext[];
-extern unsigned char _fbss[];
-extern unsigned char _ebss[];
-extern unsigned char _end[];
-
-#endif /* _SECTIONS_H */

hello-world/bsp/include/sifive/smp.h

@@ -1,65 +0,0 @@
-#ifndef SIFIVE_SMP
-#define SIFIVE_SMP
-
-// The maximum number of HARTs this code supports
-#ifndef MAX_HARTS
-#define MAX_HARTS 32
-#endif
-#define CLINT_END_HART_IPI CLINT_CTRL_ADDR + (MAX_HARTS*4)
-
-// The hart that non-SMP tests should run on
-#ifndef NONSMP_HART
-#define NONSMP_HART 0
-#endif
-
-/* If your test cannot handle multiple-threads, use this: 
- *   smp_disable(reg1)
- */
-#define smp_disable(reg1, reg2)			 \
-  csrr reg1, mhartid				;\
-  li   reg2, NONSMP_HART			;\
-  beq  reg1, reg2, hart0_entry			;\
-42:						;\
-  wfi    					;\
-  j 42b						;\
-hart0_entry:
-
-/* If your test needs to temporarily block multiple-threads, do this:
- *    smp_pause(reg1, reg2)
- *    ... single-threaded work ...
- *    smp_resume(reg1, reg2)
- *    ... multi-threaded work ...
- */
-
-#define smp_pause(reg1, reg2)	 \
-  li reg2, 0x8			;\
-  csrw mie, reg2		;\
-  csrr reg2, mhartid		;\
-  bnez reg2, 42f
-
-#define smp_resume(reg1, reg2)	 \
-  li reg1, CLINT_CTRL_ADDR	;\
-41:				;\
-  li reg2, 1			;\
-  sw reg2, 0(reg1)		;\
-  addi reg1, reg1, 4		;\
-  li reg2, CLINT_END_HART_IPI	;\
-  blt reg1, reg2, 41b		;\
-42:				;\
-  wfi    			;\
-  csrr reg2, mip		;\
-  andi reg2, reg2, 0x8		;\
-  beqz reg2, 42b		;\
-  li reg1, CLINT_CTRL_ADDR	;\
-  csrr reg2, mhartid		;\
-  slli reg2, reg2, 2		;\
-  add reg2, reg2, reg1		;\
-  sw zero, 0(reg2)		;\
-41:				;\
-  lw reg2, 0(reg1)		;\
-  bnez reg2, 41b		;\
-  addi reg1, reg1, 4		;\
-  li reg2, CLINT_END_HART_IPI	;\
-  blt reg1, reg2, 41b
-
-#endif