37 lines
1.8 KiB
Makefile
37 lines
1.8 KiB
Makefile
TARGET := coremark
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ISA?=imc
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ITERATIONS?=0
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ASM_SRCS :=
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C_SRCS := core_list_join.c core_main.c core_matrix.c core_state.c core_util.c core_portme.c ee_printf.c
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HEADERS := cm/coremark.h
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vpath %.c cm
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BOARD?=iss
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LINK_TARGET=link
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RISCV_ARCH:=rv32$(ISA)
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ifeq ($(ISA),e)
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RISCV_ABI:=ilp32e
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else
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RISCV_ABI:=ilp32
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endif
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PORT_CFLAGS = -DPERFORMANCE_RUN=1 -DCLOCKS_PER_SEC=10000000 -Wno-pointer-to-int-cast -Wno-int-to-pointer-cast
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PORT_CFLAGS+= -g -O3 -fno-common -funroll-loops -finline-functions -falign-functions=16 -falign-jumps=4 -falign-loops=4 -finline-limit=1000 -fno-if-conversion2 -fselective-scheduling -fno-crossjumping -freorder-blocks-and-partition
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FLAGS_STR = "$(PORT_CFLAGS) $(XCFLAGS) $(XLFLAGS) $(LFLAGS_END)"
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CFLAGS = $(PORT_CFLAGS) -I. -Icm -DFLAGS_STR=\"$(FLAGS_STR)\"
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CFLAGS += -DITERATIONS=$(ITERATIONS)
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LDFLAGS := -g -Wl,--wrap=scanf -Wl,--wrap=printf -Wl,--wrap=exit -lgcc -lm
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TOOL_DIR=$(dir $(compiler))
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BSP_BASE = ../../bare-metal-bsp
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include $(BSP_BASE)/env/common-gcc.mk
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#riscv64-unknown-elf-gcc -march=rv32imc_zicsr_zifencei -mabi=ilp32 -O3 -DCLOCKS_PER_SEC=10000000 -nostdlib -nostartfiles -nodefaultlibs -funroll-loops -fpeel-loops -fgcse-sm -fgcse-las -flto -g -DBOARD_TGCP -I../tgc -I. -DFLAGS_STR=\""-march=rv32imc_zicsr_zifencei -mabi=ilp32 -O3 -DCLOCKS_PER_SEC=10000000 -nostdlib -nostartfiles -nodefaultlibs -funroll-loops -fpeel-loops -fgcse-sm -fgcse-las -flto -g -DBOARD_TGCP -DPERFORMANCE_RUN=1 -T ../../../bare-metal-bsp/env/TGCP/link.lds"\" -I../../../bare-metal-bsp/env/TGCP -DITERATIONS=0 -DPERFORMANCE_RUN=1 -c ../tgc/ee_printf.c -o ee_printf.o
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#riscv64-unknown-elf-gcc -march=rv32imc_zicsr_zifencei -mabi=ilp32 -g ./core_list_join.o ./core_main.o ./core_matrix.o ./core_state.o ./core_util.o ./core_portme.o ./ee_printf.o -o ./coremark.elf -T ../../../bare-metal-bsp/env/TGCP/link.lds
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