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Eyck Jentzsch 06add2e20d reduces dhrystone iterations to 20000 for reasonable RTL sim times 2024-03-20 12:24:57 +01:00
bare-metal-bsp@d5304739fa reduces dhrystone iterations to 20000 for reasonable RTL sim times 2024-03-20 12:24:57 +01:00
benchmarks reduces dhrystone iterations to 20000 for reasonable RTL sim times 2024-03-20 12:24:57 +01:00
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hifive1-vp rework structure 2023-08-20 15:00:51 +02:00
.gitignore start implementing FW to control SPN HW 2020-10-01 17:18:29 +02:00
.gitmodules replaces bare-metal-bsp with submodule 2024-01-13 15:37:10 +01:00
CMakeLists.txt adds a CMakeLists.txt message to indicate board selection 2023-10-27 22:16:21 +02:00
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LICENSE Initial commit 2018-06-23 10:17:35 +00:00
README.md Initial commit 2018-06-23 10:17:35 +00:00

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