Merge branch 'develop' of https://github.com/Minres/TGC-VP into develop

pull

.gitignore

@@ -19,3 +19,5 @@ CMakeSettings.json
 /src-gen/
 /*.json
 /cfg.yaml
+/.direnv
+/.cache

.gitmodules

@@ -10,3 +10,6 @@
 [submodule "tgc-iss/dbt-rise-tgc"]
 	path = tgc-iss/dbt-rise-tgc
 	url = https://git.minres.com/DBT-RISE/DBT-RISE-TGC.git
+[submodule "fw/bsp"]
+	path = fw/bsp
+	url = https://git.minres.com/Firmware/MNRS-BM-BSP.git

.gitpod.yml

@@ -9,7 +9,7 @@ tasks:
        python3 -m venv /workspace/venv
        python3 -m pip install --upgrade pip
        source /workspace/venv/bin/activate
-       pip install conan==1.59
+       pip install 'conan<2.0'
     command: |
        source /workspace/venv/bin/activate
        cmake -B build -DCMAKE_BUILD_TYPE=Release -DBUILD_SHARED_LIBS=ON

.vscode/tasks.json

@@ -4,7 +4,7 @@
 		{
 			"label": "CMake-and-make",
 			"type": "shell",
-			"command": "source /workspace/venv/bin/activate && cmake -B build -DCMAKE_BUILD_TYPE=Release -DBUILD_SHARED_LIBS=ON && cmake --build build",
+			"command": "source .venv/bin/activate && cmake -B build -DCMAKE_BUILD_TYPE=Release -DBUILD_SHARED_LIBS=ON -DCMAKE_EXPORT_COMPILE_COMMANDS=ON && cmake --build build",
 			"problemMatcher": [],
 			"presentation": {
 				"echo": true,

fw/bsp

@@ -0,0 +1 @@
+Subproject commit 71c7fd698176a45313b50428905837b444050aa9

fw/bsp/drivers/clic/clic_driver.c

@@ -1,163 +0,0 @@
-// See LICENSE for license details.
-
-#include "clic/clic_driver.h"
-#include "platform.h"
-#include "encoding.h"
-#include <string.h>
-#include "../../include/platform/devices/clic.h"
-
-
-void volatile_memzero(uint8_t * base, unsigned int size) {
-  volatile uint8_t * ptr;
-  for (ptr = base; ptr < (base + size); ptr++){
-    *ptr = 0;
-  }
-}
-
-// Note that there are no assertions or bounds checking on these
-// parameter values.
-void clic_init (
-                clic_instance_t * this_clic,
-                uintptr_t hart_addr,
-                interrupt_function_ptr_t* vect_table,
-                interrupt_function_ptr_t default_handler,
-                uint32_t num_irq,
-                uint32_t num_config_bits
-                )
-{
-  this_clic->hart_addr=  hart_addr;
-  this_clic->vect_table= vect_table;
-  this_clic->num_config_bits= num_config_bits;
-
-  //initialize vector table
-  for(int i=0;i++;i<num_irq)  {
-    this_clic->vect_table[i] = default_handler;
-  }
-
-  //set base vectors
-  write_csr(mtvt, vect_table);
-
-
-  //clear all interrupt enables and pending
-  volatile_memzero((uint8_t*)(this_clic->hart_addr+CLIC_INTIE), num_irq);
-  volatile_memzero((uint8_t*)(this_clic->hart_addr+CLIC_INTIP), num_irq);
-
-  //clear nlbits and nvbits; all interrupts trap to level 15
-  *(volatile uint8_t*)(this_clic->hart_addr+CLIC_CFG)=0;
-
-}
-
-void clic_install_handler (clic_instance_t * this_clic, uint32_t source, interrupt_function_ptr_t handler) {
-    this_clic->vect_table[source] = handler;
-}
-
-void clic_enable_interrupt (clic_instance_t * this_clic, uint32_t source) {
-    *(volatile uint8_t*)(this_clic->hart_addr+CLIC_INTIE+source) = 1;
-}
-
-void clic_disable_interrupt (clic_instance_t * this_clic, uint32_t source){
-  *(volatile uint8_t*)(this_clic->hart_addr+CLIC_INTIE+source) = 0;
-}
-
-void clic_set_pending(clic_instance_t * this_clic, uint32_t source){
-  *(volatile uint8_t*)(this_clic->hart_addr+CLIC_INTIP+source) = 1;
-}
-
-void clic_clear_pending(clic_instance_t * this_clic, uint32_t source){
-  *(volatile uint8_t*)(this_clic->hart_addr+CLIC_INTIP+source) = 0;
-}
-
-void clic_set_intcfg (clic_instance_t * this_clic, uint32_t source, uint32_t intcfg){
-  *(volatile uint8_t*)(this_clic->hart_addr+CLIC_INTCFG+source) = intcfg;
-}
-
-uint8_t clic_get_intcfg  (clic_instance_t * this_clic, uint32_t source){
-  return *(volatile uint8_t*)(this_clic->hart_addr+CLIC_INTCFG+source);
-}
-
-void clic_set_cliccfg (clic_instance_t * this_clic, uint32_t cfg){
-  *(volatile uint8_t*)(this_clic->hart_addr+CLIC_CFG) = cfg;
-}
-
-uint8_t clic_get_cliccfg  (clic_instance_t * this_clic){
-  return *(volatile uint8_t*)(this_clic->hart_addr+CLIC_CFG);
-}
-
-//sets an interrupt level based encoding of nmbits, nlbits
-uint8_t clic_set_int_level( clic_instance_t * this_clic, uint32_t source, uint8_t level) {
-  //extract nlbits
-  uint8_t nlbits = clic_get_cliccfg(this_clic);
-  nlbits = (nlbits >>1) & 0x7;
-
-  //shift level right to mask off unused bits
-  level = level>>((this_clic->num_config_bits)-nlbits); //plus this_clic->nmbits which is always 0 for now.
-  //shift level into correct bit position
-  level = level << (8-this_clic->num_config_bits) + (this_clic->num_config_bits - nlbits);
- 
-  //write to clicintcfg
-  uint8_t current_intcfg = clic_get_intcfg(this_clic, source);
-  clic_set_intcfg(this_clic, source, (current_intcfg | level));
-
-  return level;
-}
-
-//gets an interrupt level based encoding of nmbits, nlbits
-uint8_t clic_get_int_level( clic_instance_t * this_clic, uint32_t source) {
-  uint8_t level;
-  level = clic_get_intcfg(this_clic, source);
-
-  //extract nlbits
-  uint8_t nlbits = clic_get_cliccfg(this_clic);
-  nlbits = (nlbits >>1) & 0x7;
-
-  //shift level
-  level = level >> (8-(this_clic->num_config_bits));
-
-  //shift level right to mask off priority bits
-  level = level>>(this_clic->num_config_bits-nlbits); //this_clic->nmbits which is always 0 for now.
-
-  return level;
-}
-
-//sets an interrupt priority based encoding of nmbits, nlbits
-uint8_t clic_set_int_priority( clic_instance_t * this_clic, uint32_t source, uint8_t priority) {
-  //priority bits = num_config_bits - nlbits
-  //extract nlbits
-  uint8_t nlbits = clic_get_cliccfg(this_clic);
-  nlbits = (nlbits >>1) & 0x7;
-
-  uint8_t priority_bits = this_clic->num_config_bits-nlbits;
-  if(priority_bits = 0) {
-    //no bits to set
-    return 0;
-  }
-  //mask off unused bits
-  priority = priority >> (8-priority_bits);
-  //shift into the correct bit position
-  priority = priority << (8-(this_clic->num_config_bits));
-
-  //write to clicintcfg
-  uint8_t current_intcfg = clic_get_intcfg(this_clic, source);
-  clic_set_intcfg(this_clic, source, (current_intcfg | priority));
-  return current_intcfg;
-}
-
-//gets an interrupt priority based encoding of nmbits, nlbits
-uint8_t clic_get_int_priority( clic_instance_t * this_clic, uint32_t source) {
-  uint8_t priority;
-  priority = clic_get_intcfg(this_clic, source);
-
-  //extract nlbits
-  uint8_t nlbits = clic_get_cliccfg(this_clic);
-  nlbits = (nlbits >>1) & 0x7;
-
-  //shift left to mask off level bits
-  priority = priority << nlbits;
-
-  //shift priority
-  priority = priority >> (8-((this_clic->num_config_bits)+nlbits));
-
- return priority;
-}
-
-

fw/bsp/drivers/clic/clic_driver.h

@@ -1,44 +0,0 @@
-// See LICENSE file for licence details
-
-#ifndef PLIC_DRIVER_H
-#define PLIC_DRIVER_H
-
-
-__BEGIN_DECLS
-
-#include "platform.h"
-
-typedef void (*interrupt_function_ptr_t) (void);
-
-typedef struct __clic_instance_t
-{
-  uintptr_t hart_addr;
-  interrupt_function_ptr_t* vect_table;
-  uint32_t num_config_bits;
-  uint32_t num_sources;  
-} clic_instance_t;
-
-// Note that there are no assertions or bounds checking on these
-// parameter values.
-void clic_init (clic_instance_t * this_clic, uintptr_t hart_addr, interrupt_function_ptr_t* vect_table, interrupt_function_ptr_t default_handler, uint32_t num_irq,uint32_t num_config_bits);
-void clic_install_handler (clic_instance_t * this_clic, uint32_t source, interrupt_function_ptr_t handler);
-void clic_enable_interrupt (clic_instance_t * this_clic, uint32_t source);
-void clic_disable_interrupt (clic_instance_t * this_clic, uint32_t source);
-void clic_set_pending(clic_instance_t * this_clic, uint32_t source);
-void clic_clear_pending(clic_instance_t * this_clic, uint32_t source);
-void clic_set_intcfg (clic_instance_t * this_clic, uint32_t source, uint32_t intcfg);
-uint8_t clic_get_intcfg (clic_instance_t * this_clic, uint32_t source);
-void clic_set_cliccfg (clic_instance_t * this_clic, uint32_t cfg);
-uint8_t clic_get_cliccfg  (clic_instance_t * this_clic);
-//sets an interrupt level based encoding of nmbits, nlbits
-uint8_t clic_set_int_level( clic_instance_t * this_clic, uint32_t source, uint8_t level);
-//get an interrupt level based encoding of nmbits, nlbits
-uint8_t clic_get_int_level( clic_instance_t * this_clic, uint32_t source);
-//sets an interrupt priority based encoding of nmbits, nlbits
-uint8_t clic_set_int_priority( clic_instance_t * this_clic, uint32_t source, uint8_t priority);
-//sets an interrupt priority based encoding of nmbits, nlbits
-uint8_t clic_get_int_priority( clic_instance_t * this_clic, uint32_t source);
-
-__END_DECLS
-
-#endif

fw/bsp/drivers/fe300prci/fe300prci_driver.c

@@ -1,252 +0,0 @@
-// See LICENSE file for license details
-
-#include "platform.h"
-
-#ifdef PRCI_CTRL_ADDR
-#include "fe300prci/fe300prci_driver.h"
-#include <unistd.h>
-
-#define rdmcycle(x)  {				       \
-    uint32_t lo, hi, hi2;			       \
-    __asm__ __volatile__ ("1:\n\t"		       \
-			  "csrr %0, mcycleh\n\t"       \
-			  "csrr %1, mcycle\n\t"	       \
-			  "csrr %2, mcycleh\n\t"		\
-			  "bne  %0, %2, 1b\n\t"			\
-			  : "=r" (hi), "=r" (lo), "=r" (hi2)) ;	\
-    *(x) = lo | ((uint64_t) hi << 32); 				\
-  }
-
-uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq)
-{
-
-  uint32_t start_mtime = CLINT_REG(CLINT_MTIME);
-  uint32_t end_mtime = start_mtime + mtime_ticks + 1;
-
-  // Make sure we won't get rollover.
-  while (end_mtime < start_mtime){
-    start_mtime = CLINT_REG(CLINT_MTIME);
-    end_mtime = start_mtime + mtime_ticks + 1;
-  }
-
-  // Don't start measuring until mtime edge.
-  uint32_t tmp = start_mtime;
-  do {
-    start_mtime = CLINT_REG(CLINT_MTIME);
-  } while (start_mtime == tmp);
-  
-  uint64_t start_mcycle;
-  rdmcycle(&start_mcycle);
-  
-  while (CLINT_REG(CLINT_MTIME) < end_mtime) ;
-  
-  uint64_t end_mcycle;
-  rdmcycle(&end_mcycle);
-  uint32_t difference = (uint32_t) (end_mcycle - start_mcycle);
-
-  uint64_t freq = ((uint64_t) difference * mtime_freq) / mtime_ticks;
-  return (uint32_t) freq & 0xFFFFFFFF;
-  
-}
- 
-
-void PRCI_use_hfrosc(int div, int trim)
-{
-  // Make sure the HFROSC is running at its default setting
-  // It is OK to change this even if we are running off of it.
-  
-  PRCI_REG(PRCI_HFROSCCFG) = (ROSC_DIV(div) | ROSC_TRIM(trim) | ROSC_EN(1));
-
-  while ((PRCI_REG(PRCI_HFROSCCFG) & ROSC_RDY(1)) == 0);
-  
-  PRCI_REG(PRCI_PLLCFG) &= ~PLL_SEL(1);
-}
-
-void PRCI_use_pll(int refsel, int bypass,
-			 int r, int f, int q, int finaldiv,
-			 int hfroscdiv, int hfrosctrim)
-{
-  // Ensure that we aren't running off the PLL before we mess with it.
-  if (PRCI_REG(PRCI_PLLCFG) & PLL_SEL(1)) {
-    // Make sure the HFROSC is running at its default setting
-    PRCI_use_hfrosc(4, 16);
-  }
-  
-  // Set PLL Source to be HFXOSC if desired.
-  uint32_t config_value = 0;
-
-  config_value |= PLL_REFSEL(refsel);
-  
-  if (bypass) {
-    // Bypass
-    config_value |= PLL_BYPASS(1);
-
-    PRCI_REG(PRCI_PLLCFG) = config_value;
-
-    // If we don't have an HFXTAL, this doesn't really matter.
-    // Set our Final output divide to divide-by-1:
-    PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
-  } else {
-  
-    // To overclock, use the hfrosc
-    if (hfrosctrim >= 0 && hfroscdiv >= 0) {
-      PRCI_use_hfrosc(hfroscdiv, hfrosctrim);
-    }
-    
-    // Set DIV Settings for PLL
-    
-    // (Legal values of f_REF are 6-48MHz)
-
-    // Set DIVR to divide-by-2 to get 8MHz frequency
-    // (legal values of f_R are 6-12 MHz)
-
-    config_value |= PLL_BYPASS(1);
-    config_value |= PLL_R(r);
-
-    // Set DIVF to get 512Mhz frequncy
-    // There is an implied multiply-by-2, 16Mhz.
-    // So need to write 32-1
-    // (legal values of f_F are 384-768 MHz)
-    config_value |= PLL_F(f);
-
-    // Set DIVQ to divide-by-2 to get 256 MHz frequency
-    // (legal values of f_Q are 50-400Mhz)
-    config_value |= PLL_Q(q);
-
-    // Set our Final output divide to divide-by-1:
-    if (finaldiv == 1){
-      PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
-    } else {
-      PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV(finaldiv-1));
-    }
-
-    PRCI_REG(PRCI_PLLCFG) = config_value;
-
-    // Un-Bypass the PLL.
-    PRCI_REG(PRCI_PLLCFG) &= ~PLL_BYPASS(1);
-
-    // Wait for PLL Lock
-    // Note that the Lock signal can be glitchy.
-    // Need to wait 100 us
-    // RTC is running at 32kHz.
-    // So wait 4 ticks of RTC.
-    uint32_t now = CLINT_REG(CLINT_MTIME);
-    while (CLINT_REG(CLINT_MTIME) - now < 4) ;
-    
-    // Now it is safe to check for PLL Lock
-    while ((PRCI_REG(PRCI_PLLCFG) & PLL_LOCK(1)) == 0);
-
-  }
-
-  // Switch over to PLL Clock source
-  PRCI_REG(PRCI_PLLCFG) |= PLL_SEL(1);
-
-  // If we're running off HFXOSC, turn off the HFROSC to
-  // save power.
-  if (refsel) {
-    PRCI_REG(PRCI_HFROSCCFG) &= ~ROSC_EN(1);
-  }
-  
-}
-
-void PRCI_use_default_clocks()
-{
-  // Turn off the LFROSC
-  AON_REG(AON_LFROSC) &= ~ROSC_EN(1);
-
-  // Use HFROSC
-  PRCI_use_hfrosc(4, 16);
-}
-
-void PRCI_use_hfxosc(uint32_t finaldiv)
-{
-  
-  PRCI_use_pll(1, // Use HFXTAL
-	       1, // Bypass = 1
-	       0, // PLL settings don't matter
-	       0, // PLL settings don't matter
-	       0, // PLL settings don't matter
-	       finaldiv,
-	       -1,
-	       -1);
-}
-
-// This is a generic function, which
-// doesn't span the entire range of HFROSC settings.
-// It only adjusts the trim, which can span a hundred MHz or so.
-// This function does not check the legality of the PLL settings
-// at all, and it is quite possible to configure invalid PLL settings
-// this way.
-// It returns the actual measured CPU frequency.
-
-uint32_t PRCI_set_hfrosctrim_for_f_cpu(uint32_t f_cpu, PRCI_freq_target target )
-{
-
-  uint32_t hfrosctrim = 0;
-  uint32_t hfroscdiv = 4;
-  uint32_t prev_trim = 0;
-
-  // In this function we use PLL settings which
-  // will give us a 32x multiplier from the output
-  // of the HFROSC source to the output of the
-  // PLL. We first measure our HFROSC to get the
-  // right trim, then finally use it as the PLL source.
-  // We should really check here that the f_cpu
-  // requested is something in the limit of the PLL. For
-  // now that is up to the user.
-
-  // This will undershoot for frequencies not divisible by 16.
-  uint32_t desired_hfrosc_freq = (f_cpu/ 16);
-
-  PRCI_use_hfrosc(hfroscdiv, hfrosctrim);
-  
-  // Ignore the first run (for icache reasons)
-  uint32_t cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
-
-  cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
-  uint32_t prev_freq = cpu_freq;
-  
-  while ((cpu_freq < desired_hfrosc_freq) && (hfrosctrim < 0x1F)){
-    prev_trim = hfrosctrim;
-    prev_freq = cpu_freq;
-    hfrosctrim ++;
-    PRCI_use_hfrosc(hfroscdiv, hfrosctrim);
-    cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
-  } 
-
-  // We couldn't go low enough
-  if (prev_freq > desired_hfrosc_freq){
-    PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);
-    cpu_freq = PRCI_measure_mcycle_freq(1000, RTC_FREQ);
-    return cpu_freq;
-  }
-  
-  // We couldn't go high enough
-  if (cpu_freq < desired_hfrosc_freq){
-    PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);
-    cpu_freq = PRCI_measure_mcycle_freq(1000, RTC_FREQ);
-    return cpu_freq;
-  }
-
-  // Check for over/undershoot
-  switch(target) {
-  case(PRCI_FREQ_CLOSEST):
-    if ((desired_hfrosc_freq - prev_freq) < (cpu_freq - desired_hfrosc_freq)) {
-      PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);
-    } else {
-      PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, hfrosctrim);
-    }
-    break;
-  case(PRCI_FREQ_UNDERSHOOT):
-    PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim);
-    break;
-  default:
-    PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, hfrosctrim);
-  }
-
-  cpu_freq =  PRCI_measure_mcycle_freq(1000, RTC_FREQ);
-  return cpu_freq;
-
-}
-
-#endif

fw/bsp/drivers/fe300prci/fe300prci_driver.h

@@ -1,79 +0,0 @@
-// See LICENSE file for license details
-
-#ifndef _FE300PRCI_DRIVER_H_
-#define _FE300PRCI_DRIVER_H_
-
-__BEGIN_DECLS
-
-#include <unistd.h>
-
-typedef enum prci_freq_target {
-  
-  PRCI_FREQ_OVERSHOOT,
-  PRCI_FREQ_CLOSEST,
-  PRCI_FREQ_UNDERSHOOT
-
-} PRCI_freq_target;
-
-/* Measure and return the approximate frequency of the 
- * CPU, as given by measuring the mcycle counter against 
- * the mtime ticks.
- */
-uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq);
-
-/* Safely switch over to the HFROSC using the given div
- * and trim settings.
- */
-void PRCI_use_hfrosc(int div, int trim);
-
-/* Safely switch over to the 16MHz HFXOSC,
- * applying the finaldiv clock divider (1 is the lowest
- * legal value).
- */
-void PRCI_use_hfxosc(uint32_t finaldiv);
-
-/* Safely switch over to the PLL using the given
- * settings.
- * 
- * Note that not all combinations of the inputs are actually
- * legal, and this function does not check for their
- * legality ("safely" means that this function won't turn off
- * or glitch the clock the CPU is actually running off, but
- * doesn't protect against you making it too fast or slow.)
- */
-
-void PRCI_use_pll(int refsel, int bypass,
-			 int r, int f, int q, int finaldiv,
-			 int hfroscdiv, int hfrosctrim);
-
-/* Use the default clocks configured at reset.
- * This is ~16Mhz HFROSC and turns off the LFROSC
- * (on the current FE310 Dev Platforms, an external LFROSC is 
- * used as it is more power efficient).
- */
-void PRCI_use_default_clocks();
-
-/* This routine will adjust the HFROSC trim
- * while using HFROSC as the clock source, 
- * measure the resulting frequency, then
- * use it as the PLL clock source, 
- * in an attempt to get over, under, or close to the 
- * requested frequency. It returns the actual measured 
- * frequency. 
- *
- * Note that the requested frequency must be within the 
- * range supported by the PLL so not all values are 
- * achievable with this function, and not all 
- * are guaranteed to actually work. The PLL
- * is rated higher than the hardware.
- * 
- * There is no check on the desired f_cpu frequency, it
- * is up to the user to specify something reasonable.
- */
-
-uint32_t PRCI_set_hfrosctrim_for_f_cpu(uint32_t f_cpu, PRCI_freq_target target);
-
-__END_DECLS
-
-#endif
-  

fw/bsp/drivers/plic/plic_driver.c

@@ -1,127 +0,0 @@
-// See LICENSE for license details.
-
-#include "plic/plic_driver.h"
-#include "platform.h"
-#include "encoding.h"
-#include <string.h>
-#include "../../include/platform/devices/plic.h"
-
-
-// Note that there are no assertions or bounds checking on these
-// parameter values.
-
-void volatile_memzero(uint8_t * base, unsigned int size)
-{
-  volatile uint8_t * ptr;
-  for (ptr = base; ptr < (base + size); ptr++){
-    *ptr = 0;
-  }
-}
-
-void PLIC_init (
-                plic_instance_t * this_plic,
-                uintptr_t         base_addr,
-                uint32_t num_sources,
-                uint32_t num_priorities
-                )
-{
-  
-  this_plic->base_addr = base_addr;
-  this_plic->num_sources = num_sources;
-  this_plic->num_priorities = num_priorities;
-  
-  // Disable all interrupts (don't assume that these registers are reset).
-  unsigned long hart_id = read_csr(mhartid);
-  volatile_memzero((uint8_t*) (this_plic->base_addr +
-                               PLIC_ENABLE_OFFSET +
-                               (hart_id << PLIC_ENABLE_SHIFT_PER_TARGET)),
-                   (num_sources + 8) / 8);
-  
-  // Set all priorities to 0 (equal priority -- don't assume that these are reset).
-  volatile_memzero ((uint8_t *)(this_plic->base_addr +
-                                PLIC_PRIORITY_OFFSET),
-                    (num_sources + 1) << PLIC_PRIORITY_SHIFT_PER_SOURCE);
-
-  // Set the threshold to 0.
-  volatile plic_threshold* threshold = (plic_threshold*)
-    (this_plic->base_addr +
-     PLIC_THRESHOLD_OFFSET +
-     (hart_id << PLIC_THRESHOLD_SHIFT_PER_TARGET));
-
-  *threshold = 0;
-  
-}
-
-void PLIC_set_threshold (plic_instance_t * this_plic,
-			 plic_threshold threshold){
-
-  unsigned long hart_id = read_csr(mhartid);  
-  volatile plic_threshold* threshold_ptr = (plic_threshold*) (this_plic->base_addr +
-                                                              PLIC_THRESHOLD_OFFSET +
-                                                              (hart_id << PLIC_THRESHOLD_SHIFT_PER_TARGET));
-
-  *threshold_ptr = threshold;
-
-}
-  
-
-void PLIC_enable_interrupt (plic_instance_t * this_plic, plic_source source){
-
-  unsigned long hart_id = read_csr(mhartid);
-  volatile uint8_t * current_ptr = (volatile uint8_t *)(this_plic->base_addr +
-                                                        PLIC_ENABLE_OFFSET +
-                                                        (hart_id << PLIC_ENABLE_SHIFT_PER_TARGET) +
-                                                        (source >> 3));
-  uint8_t current = *current_ptr;
-  current = current | ( 1 << (source & 0x7));
-  *current_ptr = current;
-
-}
-
-void PLIC_disable_interrupt (plic_instance_t * this_plic, plic_source source){
-  
-  unsigned long hart_id = read_csr(mhartid);
-  volatile uint8_t * current_ptr = (volatile uint8_t *) (this_plic->base_addr +
-                                                         PLIC_ENABLE_OFFSET +
-                                                         (hart_id << PLIC_ENABLE_SHIFT_PER_TARGET) +
-                                                         (source >> 3));
-  uint8_t current = *current_ptr;
-  current = current & ~(( 1 << (source & 0x7)));
-  *current_ptr = current;
-  
-}
-
-void PLIC_set_priority (plic_instance_t * this_plic, plic_source source, plic_priority priority){
-
-  if (this_plic->num_priorities > 0) {
-    volatile plic_priority * priority_ptr = (volatile plic_priority *)
-      (this_plic->base_addr +
-       PLIC_PRIORITY_OFFSET +
-       (source << PLIC_PRIORITY_SHIFT_PER_SOURCE));
-    *priority_ptr = priority;
-  }
-}
-
-plic_source PLIC_claim_interrupt(plic_instance_t * this_plic){
-  
-  unsigned long hart_id = read_csr(mhartid);
-
-  volatile plic_source * claim_addr = (volatile plic_source * )
-    (this_plic->base_addr +
-     PLIC_CLAIM_OFFSET +
-     (hart_id << PLIC_CLAIM_SHIFT_PER_TARGET));
-
-  return  *claim_addr;
-  
-}
-
-void PLIC_complete_interrupt(plic_instance_t * this_plic, plic_source source){
-  
-  unsigned long hart_id = read_csr(mhartid);
-  volatile plic_source * claim_addr = (volatile plic_source *) (this_plic->base_addr +
-                                                                PLIC_CLAIM_OFFSET +
-                                                                (hart_id << PLIC_CLAIM_SHIFT_PER_TARGET));
-  *claim_addr = source;
-  
-}
-

fw/bsp/drivers/plic/plic_driver.h

@@ -1,51 +0,0 @@
-// See LICENSE file for licence details
-
-#ifndef PLIC_DRIVER_H
-#define PLIC_DRIVER_H
-
-
-__BEGIN_DECLS
-
-#include "platform.h"
-
-typedef struct __plic_instance_t
-{
-  uintptr_t base_addr;
-
-  uint32_t num_sources;
-  uint32_t num_priorities;
-  
-} plic_instance_t;
-
-typedef uint32_t plic_source;
-typedef uint32_t plic_priority;
-typedef uint32_t plic_threshold;
-
-void PLIC_init (
-                plic_instance_t * this_plic,
-                uintptr_t         base_addr,
-                uint32_t num_sources,
-                uint32_t num_priorities
-                );
-
-void PLIC_set_threshold (plic_instance_t * this_plic,
-			 plic_threshold threshold);
-  
-void PLIC_enable_interrupt (plic_instance_t * this_plic,
-			    plic_source source);
-
-void PLIC_disable_interrupt (plic_instance_t * this_plic,
-			     plic_source source);
-  
-void PLIC_set_priority (plic_instance_t * this_plic,
-			plic_source source,
-			plic_priority priority);
-
-plic_source PLIC_claim_interrupt(plic_instance_t * this_plic);
-
-void PLIC_complete_interrupt(plic_instance_t * this_plic,
-			     plic_source source);
-
-__END_DECLS
-
-#endif

fw/bsp/env/common-clang.mk

@@ -1,72 +0,0 @@
-# See LICENSE for license details.
-
-ifndef _SIFIVE_MK_COMMON
-_SIFIVE_MK_COMMON := # defined
-
-.PHONY: all
-all: $(TARGET)
-
-include $(BSP_BASE)/libwrap/libwrap.mk
-
-ENV_DIR = $(BSP_BASE)/env
-PLATFORM_DIR = $(ENV_DIR)/$(BOARD)
-
-ASM_SRCS += $(ENV_DIR)/start.S
-ASM_SRCS += $(ENV_DIR)/entry.S
-C_SRCS += $(PLATFORM_DIR)/init.c
-
-LINKER_SCRIPT := $(PLATFORM_DIR)/$(LINK_TARGET).lds
-
-INCLUDES += -I$(BSP_BASE)/include
-INCLUDES += -I$(BSP_BASE)/drivers/
-INCLUDES += -I$(ENV_DIR)
-INCLUDES += -I$(PLATFORM_DIR)
-
-TOOL_DIR ?= $(BSP_BASE)/../toolchain/bin/
-
-LDFLAGS += -T $(LINKER_SCRIPT) -nostartfiles
-LDFLAGS += -L$(ENV_DIR) --specs=nano.specs
-
-ASM_OBJS := $(ASM_SRCS:.S=.o)
-C_OBJS   := $(C_SRCS:.c=.o)
-CXX_OBJS := $(CXX_SRCS:.cpp=.o)
-
-LINK_OBJS += $(ASM_OBJS) $(C_OBJS) $(CXX_OBJS)
-LINK_DEPS += $(LINKER_SCRIPT)
-
-CLEAN_OBJS += $(TARGET) $(LINK_OBJS)
-
-CFLAGS += -march=$(RISCV_ARCH)
-CFLAGS += -mabi=$(RISCV_ABI)
-CFLAGS += -mcmodel=medany
-
-TRIPLET?=riscv64-unknown-elf
-CXX=$(LLVM_TOOL_DIR)clang++ --target=$(TRIPLET) -isystem $(TOOL_DIR)/../$(TRIPLET)/include
-CC=$(LLVM_TOOL_DIR)clang --target=$(TRIPLET) -isystem $(TOOL_DIR)/../$(TRIPLET)/include
-LD=$(TOOL_DIR)$(TRIPLET)-gcc
-AR=$(TOOL_DIR)$(TRIPLET)-ar
-OBJDUMP := $(TOOL_DIR)/$(TRIPLET)-objdump
-
-
-$(TARGET): $(LINK_OBJS) $(LINK_DEPS)
-	$(LD) $(LINK_OBJS) $(LDFLAGS) $(LIBWRAP) -o $@
-	$(OBJDUMP) -d -S $(TARGET) > $(TARGET).dis
-	
-$(ASM_OBJS): %.o: %.S $(HEADERS)
-	$(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $<
-
-$(C_OBJS): %.o: %.c $(HEADERS)
-	$(CC) $(CFLAGS) $(INCLUDES) -include sys/cdefs.h -c -o $@ $<
-
-$(CXX_OBJS): %.o: %.cpp $(HEADERS)
-	$(CXX) $(CFLAGS) $(CXXFLAGS) $(INCLUDES) -include sys/cdefs.h -c -o $@ $<
-
-.PHONY: clean
-clean:
-	rm -f $(TARGET) $(LINK_OBJS)
-
-.PHONY: clean-all
-clean-all:
-	rm -f $(CLEAN_OBJS) $(LIBWRAP)
-
-endif # _SIFIVE_MK_COMMON

fw/bsp/env/common-gcc.mk

@@ -1,68 +0,0 @@
-# See LICENSE for license details.
-
-ifndef _SIFIVE_MK_COMMON
-_SIFIVE_MK_COMMON := # defined
-
-.PHONY: all
-all: $(TARGET)
-
-include $(BSP_BASE)/libwrap/libwrap.mk
-
-ENV_DIR = $(BSP_BASE)/env
-PLATFORM_DIR = $(ENV_DIR)/$(BOARD)
-
-ASM_SRCS += $(ENV_DIR)/start.S
-ASM_SRCS += $(ENV_DIR)/entry.S
-C_SRCS += $(PLATFORM_DIR)/init.c
-
-LINKER_SCRIPT := $(PLATFORM_DIR)/$(LINK_TARGET).lds
-
-INCLUDES += -I$(BSP_BASE)/include
-INCLUDES += -I$(BSP_BASE)/drivers/
-INCLUDES += -I$(ENV_DIR)
-INCLUDES += -I$(PLATFORM_DIR)
-
-TOOL_DIR ?= $(BSP_BASE)/../toolchain/bin/
-
-LDFLAGS += -T $(LINKER_SCRIPT) -nostartfiles -Wl,-Map,firmware.map
-LDFLAGS += -L$(ENV_DIR) --specs=nano.specs
-
-ASM_OBJS := $(ASM_SRCS:.S=.o)
-C_OBJS   := $(C_SRCS:.c=.o)
-CXX_OBJS := $(CXX_SRCS:.cpp=.o)
-
-LINK_OBJS += $(ASM_OBJS) $(C_OBJS) $(CXX_OBJS)
-LINK_DEPS += $(LINKER_SCRIPT)
-
-CLEAN_OBJS += $(TARGET) $(LINK_OBJS)
-
-CFLAGS += -march=$(RISCV_ARCH)
-CFLAGS += -mabi=$(RISCV_ABI)
-CFLAGS += -mcmodel=medany
-
-TRIPLET?=riscv64-unknown-elf
-CXX=$(TOOL_DIR)$(TRIPLET)-c++
-CC=$(TOOL_DIR)$(TRIPLET)-gcc
-LD=$(TOOL_DIR)$(TRIPLET)-gcc
-AR=$(TOOL_DIR)$(TRIPLET)-ar
-OBJDUMP := $(TOOL_DIR)/$(TRIPLET)-objdump
-
-
-$(TARGET): $(LINK_OBJS) $(LINK_DEPS)
-	$(LD) $(LINK_OBJS) $(LDFLAGS) $(LIBWRAP) -o $@
-	$(OBJDUMP) -d -S $(TARGET) > $(TARGET).dis
-	
-$(ASM_OBJS): %.o: %.S $(HEADERS)
-	$(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $<
-
-$(C_OBJS): %.o: %.c $(HEADERS)
-	$(CC) $(CFLAGS) $(INCLUDES) -include sys/cdefs.h -c -o $@ $<
-
-$(CXX_OBJS): %.o: %.cpp $(HEADERS)
-	$(CXX) $(CFLAGS) $(CXXFLAGS) $(INCLUDES) -include sys/cdefs.h -c -o $@ $<
-
-.PHONY: clean
-clean:
-	rm -f $(CLEAN_OBJS) $(LIBWRAP)
-
-endif # _SIFIVE_MK_COMMON

fw/bsp/env/entry.S

@@ -1,97 +0,0 @@
-// See LICENSE for license details
-
-#ifndef ENTRY_S
-#define ENTRY_S
-
-#include "encoding.h"
-#include "platform/bits.h"
-
-  .section      .text.entry	
-  .align 2
-  .weak trap_entry
-trap_entry:
-  addi sp, sp, -32*REGBYTES
-
-  STORE x1, 1*REGBYTES(sp)
-  STORE x2, 2*REGBYTES(sp)
-  STORE x3, 3*REGBYTES(sp)
-  STORE x4, 4*REGBYTES(sp)
-  STORE x5, 5*REGBYTES(sp)
-  STORE x6, 6*REGBYTES(sp)
-  STORE x7, 7*REGBYTES(sp)
-  STORE x8, 8*REGBYTES(sp)
-  STORE x9, 9*REGBYTES(sp)
-  STORE x10, 10*REGBYTES(sp)
-  STORE x11, 11*REGBYTES(sp)
-  STORE x12, 12*REGBYTES(sp)
-  STORE x13, 13*REGBYTES(sp)
-  STORE x14, 14*REGBYTES(sp)
-  STORE x15, 15*REGBYTES(sp)
-  STORE x16, 16*REGBYTES(sp)
-  STORE x17, 17*REGBYTES(sp)
-  STORE x18, 18*REGBYTES(sp)
-  STORE x19, 19*REGBYTES(sp)
-  STORE x20, 20*REGBYTES(sp)
-  STORE x21, 21*REGBYTES(sp)
-  STORE x22, 22*REGBYTES(sp)
-  STORE x23, 23*REGBYTES(sp)
-  STORE x24, 24*REGBYTES(sp)
-  STORE x25, 25*REGBYTES(sp)
-  STORE x26, 26*REGBYTES(sp)
-  STORE x27, 27*REGBYTES(sp)
-  STORE x28, 28*REGBYTES(sp)
-  STORE x29, 29*REGBYTES(sp)
-  STORE x30, 30*REGBYTES(sp)
-  STORE x31, 31*REGBYTES(sp)
-
-  csrr a0, mcause
-  csrr a1, mepc
-  mv a2, sp
-  call handle_trap
-  csrw mepc, a0
-
-  # Remain in M-mode after mret
-  li t0, MSTATUS_MPP
-  csrs mstatus, t0
-
-  LOAD x1, 1*REGBYTES(sp)
-  LOAD x2, 2*REGBYTES(sp)
-  LOAD x3, 3*REGBYTES(sp)
-  LOAD x4, 4*REGBYTES(sp)
-  LOAD x5, 5*REGBYTES(sp)
-  LOAD x6, 6*REGBYTES(sp)
-  LOAD x7, 7*REGBYTES(sp)
-  LOAD x8, 8*REGBYTES(sp)
-  LOAD x9, 9*REGBYTES(sp)
-  LOAD x10, 10*REGBYTES(sp)
-  LOAD x11, 11*REGBYTES(sp)
-  LOAD x12, 12*REGBYTES(sp)
-  LOAD x13, 13*REGBYTES(sp)
-  LOAD x14, 14*REGBYTES(sp)
-  LOAD x15, 15*REGBYTES(sp)
-  LOAD x16, 16*REGBYTES(sp)
-  LOAD x17, 17*REGBYTES(sp)
-  LOAD x18, 18*REGBYTES(sp)
-  LOAD x19, 19*REGBYTES(sp)
-  LOAD x20, 20*REGBYTES(sp)
-  LOAD x21, 21*REGBYTES(sp)
-  LOAD x22, 22*REGBYTES(sp)
-  LOAD x23, 23*REGBYTES(sp)
-  LOAD x24, 24*REGBYTES(sp)
-  LOAD x25, 25*REGBYTES(sp)
-  LOAD x26, 26*REGBYTES(sp)
-  LOAD x27, 27*REGBYTES(sp)
-  LOAD x28, 28*REGBYTES(sp)
-  LOAD x29, 29*REGBYTES(sp)
-  LOAD x30, 30*REGBYTES(sp)
-  LOAD x31, 31*REGBYTES(sp)
-
-  addi sp, sp, 32*REGBYTES
-  mret
-
-.weak handle_trap
-handle_trap:
-1:
-  j 1b
-	
-#endif

fw/bsp/env/start.S

@@ -1,90 +0,0 @@
-// See LICENSE for license details.
-#include <platform/smp.h>
-
-/* This is defined in sifive/platform.h, but that can't be included from
- * assembly. */
-#define CLINT_CTRL_ADDR 0x02000000
-
-	.section .init
-	.globl _start
-	.type _start,@function
-
-_start:
-	.cfi_startproc
-	.cfi_undefined ra
-.option push
-.option norelax
-	la gp, __global_pointer$
-.option pop
-	la sp, _sp
- 	la	a5, trap_entry
- 	csrw mtvec,a5
-	/* Load data section */
-	la a0, _data_lma
-	la a1, _data
-	la a2, _edata
-	bgeu a1, a2, 2f
-1:
-	lw t0, (a0)
-	sw t0, (a1)
-	addi a0, a0, 4
-	addi a1, a1, 4
-	bltu a1, a2, 1b
-2:
-
-	/* Clear bss section */
-	la a0, __bss_start
-	la a1, _end
-	bgeu a0, a1, 2f
-1:
-	sw zero, (a0)
-	addi a0, a0, 4
-	bltu a0, a1, 1b
-2:
-
-	/* Call global constructors */
-	la a0, __libc_fini_array
-	call atexit
-	call __libc_init_array
-
-	auipc ra, 0
-	addi sp, sp, -16
-#if __riscv_xlen == 32
-	sw ra, 8(sp)
-#else
-	sd ra, 8(sp)
-#endif
-
-	/* argc = argv = 0 */
-	li a0, 0
-	li a1, 0
-	call main
-	tail exit
-1:
-	j 1b
-
-#if defined(ENABLE_SMP)
-2:
-	la t0, trap_entry
-	csrw mtvec, t0
-
-	csrr a0, mhartid
-	la t1, _sp
-	slli t0, a0, 10
-	sub sp, t1, t0
-
-	auipc ra, 0
-	addi sp, sp, -16
-#if __riscv_xlen == 32
-	sw ra, 8(sp)
-#else
-	sd ra, 8(sp)
-#endif
-
-	call secondary_main
-	tail exit
-
-1:
-	j 1b
-#endif
-	.cfi_endproc

fw/bsp/env/tgfs-vp/dhrystone.lds

@@ -1,157 +0,0 @@
-OUTPUT_ARCH( "riscv" )
-
-ENTRY( _start )
-
-MEMORY
-{
-  flash (rxai!w) : ORIGIN = 0x20400000, LENGTH = 512M
-  ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 16K
-}
-
-PHDRS
-{
-  flash PT_LOAD;
-  ram_init PT_LOAD;
-  ram PT_NULL;
-}
-
-SECTIONS
-{
-  __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
-
-  .init           :
-  {
-    KEEP (*(SORT_NONE(.init)))
-  } >flash AT>flash :flash
-
-  .text           :
-  {
-    *(.text.unlikely .text.unlikely.*)
-    *(.text.startup .text.startup.*)
-    *(.text .text.*)
-    *(.gnu.linkonce.t.*)
-  } >flash AT>flash :flash
-
-  .fini           :
-  {
-    KEEP (*(SORT_NONE(.fini)))
-  } >flash AT>flash :flash
-
-  PROVIDE (__etext = .);
-  PROVIDE (_etext = .);
-  PROVIDE (etext = .);
-
-  . = ALIGN(4);
-
-  .preinit_array  :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } >flash AT>flash :flash
-
-  .init_array     :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
-    KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } >flash AT>flash :flash
-
-  .fini_array     :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
-    KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } >flash AT>flash :flash
-
-  .ctors          :
-  {
-    /* gcc uses crtbegin.o to find the start of
-       the constructors, so we make sure it is
-       first.  Because this is a wildcard, it
-       doesn't matter if the user does not
-       actually link against crtbegin.o; the
-       linker won't look for a file to match a
-       wildcard.  The wildcard also means that it
-       doesn't matter which directory crtbegin.o
-       is in.  */
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*crtbegin?.o(.ctors))
-    /* We don't want to include the .ctor section from
-       the crtend.o file until after the sorted ctors.
-       The .ctor section from the crtend file contains the
-       end of ctors marker and it must be last */
-    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*(.ctors))
-  } >flash AT>flash :flash
-
-  .dtors          :
-  {
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*crtbegin?.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*(.dtors))
-  } >flash AT>flash :flash
-
-  .lalign         :
-  {
-    . = ALIGN(4);
-    PROVIDE( _data_lma = . );
-  } >flash AT>flash :flash
-
-  .dalign         :
-  {
-    . = ALIGN(4);
-    PROVIDE( _data = . );
-  } >ram AT>flash :ram_init
-
-  .data          :
-  {
-    *(.rdata)
-    *(.rodata .rodata.*)
-    *(.gnu.linkonce.r.*)
-    *(.data .data.*)
-    *(.gnu.linkonce.d.*)
-    . = ALIGN(8);
-    PROVIDE( __global_pointer$ = . + 0x800 );
-    *(.sdata .sdata.*)
-    *(.gnu.linkonce.s.*)
-    . = ALIGN(8);
-    *(.srodata.cst16)
-    *(.srodata.cst8)
-    *(.srodata.cst4)
-    *(.srodata.cst2)
-    *(.srodata .srodata.*)
-  } >ram AT>flash :ram_init
-
-  . = ALIGN(4);
-  PROVIDE( _edata = . );
-  PROVIDE( edata = . );
-
-  PROVIDE( _fbss = . );
-  PROVIDE( __bss_start = . );
-  .bss            :
-  {
-    *(.sbss*)
-    *(.gnu.linkonce.sb.*)
-    *(.bss .bss.*)
-    *(.gnu.linkonce.b.*)
-    *(COMMON)
-    . = ALIGN(4);
-  } >ram AT>ram :ram
-
-  . = ALIGN(8);
-  PROVIDE( _end = . );
-  PROVIDE( end = . );
-
-  .stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
-  {
-    PROVIDE( _heap_end = . );
-    . = __stack_size;
-    PROVIDE( _sp = . );
-  } >ram AT>ram :ram
-}

fw/bsp/env/tgfs-vp/flash.lds

@@ -1,161 +0,0 @@
-OUTPUT_ARCH( "riscv" )
-
-ENTRY( _start )
-
-MEMORY
-{
-  flash (rxai!w) : ORIGIN = 0x20400000, LENGTH = 512M
-  ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 16K
-}
-
-PHDRS
-{
-  flash PT_LOAD;
-  ram_init PT_LOAD;
-  ram PT_NULL;
-}
-
-SECTIONS
-{
-  __stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
-
-  .init           :
-  {
-    KEEP (*(SORT_NONE(.init)))
-  } >flash AT>flash :flash
-
-  .text           :
-  {
-    *(.text.unlikely .text.unlikely.*)
-    *(.text.startup .text.startup.*)
-    *(.text .text.*)
-    *(.gnu.linkonce.t.*)
-  } >flash AT>flash :flash
-
-  .fini           :
-  {
-    KEEP (*(SORT_NONE(.fini)))
-  } >flash AT>flash :flash
-
-  PROVIDE (__etext = .);
-  PROVIDE (_etext = .);
-  PROVIDE (etext = .);
-
-  .rodata         :
-  {
-    *(.rdata)
-    *(.rodata .rodata.*)
-    *(.gnu.linkonce.r.*)
-  } >flash AT>flash :flash
-
-  . = ALIGN(4);
-
-  .preinit_array  :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } >flash AT>flash :flash
-
-  .init_array     :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
-    KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } >flash AT>flash :flash
-
-  .fini_array     :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
-    KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } >flash AT>flash :flash
-
-  .ctors          :
-  {
-    /* gcc uses crtbegin.o to find the start of
-       the constructors, so we make sure it is
-       first.  Because this is a wildcard, it
-       doesn't matter if the user does not
-       actually link against crtbegin.o; the
-       linker won't look for a file to match a
-       wildcard.  The wildcard also means that it
-       doesn't matter which directory crtbegin.o
-       is in.  */
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*crtbegin?.o(.ctors))
-    /* We don't want to include the .ctor section from
-       the crtend.o file until after the sorted ctors.
-       The .ctor section from the crtend file contains the
-       end of ctors marker and it must be last */
-    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*(.ctors))
-  } >flash AT>flash :flash
-
-  .dtors          :
-  {
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*crtbegin?.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*(.dtors))
-  } >flash AT>flash :flash
-
-  .lalign         :
-  {
-    . = ALIGN(4);
-    PROVIDE( _data_lma = . );
-  } >flash AT>flash :flash
-
-  .dalign         :
-  {
-    . = ALIGN(4);
-    PROVIDE( _data = . );
-  } >ram AT>flash :ram_init
-
-  .data          :
-  {
-    *(.data .data.*)
-    *(.gnu.linkonce.d.*)
-    . = ALIGN(8);
-    PROVIDE( __global_pointer$ = . + 0x800 );
-    *(.sdata .sdata.*)
-    *(.gnu.linkonce.s.*)
-    . = ALIGN(8);
-    *(.srodata.cst16)
-    *(.srodata.cst8)
-    *(.srodata.cst4)
-    *(.srodata.cst2)
-    *(.srodata .srodata.*)
-  } >ram AT>flash :ram_init
-
-  . = ALIGN(4);
-  PROVIDE( _edata = . );
-  PROVIDE( edata = . );
-
-  PROVIDE( _fbss = . );
-  PROVIDE( __bss_start = . );
-  .bss            :
-  {
-    *(.sbss*)
-    *(.gnu.linkonce.sb.*)
-    *(.bss .bss.*)
-    *(.gnu.linkonce.b.*)
-    *(COMMON)
-    . = ALIGN(4);
-  } >ram AT>ram :ram
-
-  . = ALIGN(8);
-  PROVIDE( _end = . );
-  PROVIDE( end = . );
-
-  .stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
-  {
-    PROVIDE( _heap_end = . );
-    . = __stack_size;
-    PROVIDE( _sp = . );
-  } >ram AT>ram :ram
-}

fw/bsp/env/tgfs-vp/init.c

@@ -1,238 +0,0 @@
-#include <stdint.h>
-#include <stdio.h>
-#include <unistd.h>
-
-#include "../tgfs-vp/platform.h"
-#include "encoding.h"
-
-extern int main(int argc, char** argv);
-extern void trap_entry();
-
-static unsigned long mtime_lo(void)
-{
-  return *(volatile unsigned long *)(CLINT_CTRL_ADDR + CLINT_MTIME);
-}
-
-#ifdef __riscv32
-
-static uint32_t mtime_hi(void)
-{
-  return *(volatile uint32_t *)(CLINT_CTRL_ADDR + CLINT_MTIME + 4);
-}
-
-uint64_t get_timer_value()
-{
-  while (1) {
-    uint32_t hi = mtime_hi();
-    uint32_t lo = mtime_lo();
-    if (hi == mtime_hi())
-      return ((uint64_t)hi << 32) | lo;
-  }
-}
-
-#else /* __riscv32 */
-
-uint64_t get_timer_value()
-{
-  return mtime_lo();
-}
-
-#endif
-
-unsigned long get_timer_freq()
-{
-  return 32768;
-}
-
-static void use_hfrosc(int div, int trim)
-{
-  // Make sure the HFROSC is running at its default setting
-  PRCI_REG(PRCI_HFROSCCFG) = (ROSC_DIV(div) | ROSC_TRIM(trim) | ROSC_EN(1));
-  while ((PRCI_REG(PRCI_HFROSCCFG) & ROSC_RDY(1)) == 0) ;
-  PRCI_REG(PRCI_PLLCFG) &= ~PLL_SEL(1);
-}
-
-static void use_pll(int refsel, int bypass, int r, int f, int q)
-{
-  // Ensure that we aren't running off the PLL before we mess with it.
-  if (PRCI_REG(PRCI_PLLCFG) & PLL_SEL(1)) {
-    // Make sure the HFROSC is running at its default setting
-    use_hfrosc(4, 16);
-  }
-
-  // Set PLL Source to be HFXOSC if available.
-  uint32_t config_value = 0;
-
-  config_value |= PLL_REFSEL(refsel);
-
-  if (bypass) {
-    // Bypass
-    config_value |= PLL_BYPASS(1);
-
-    PRCI_REG(PRCI_PLLCFG) = config_value;
-
-    // If we don't have an HFXTAL, this doesn't really matter.
-    // Set our Final output divide to divide-by-1:
-    PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
-  } else {
-    // In case we are executing from QSPI,
-    // (which is quite likely) we need to
-    // set the QSPI clock divider appropriately
-    // before boosting the clock frequency.
-
-    // Div = f_sck/2
-    SPI0_REG(SPI_REG_SCKDIV) = 8;
-
-    // Set DIV Settings for PLL
-    // Both HFROSC and HFXOSC are modeled as ideal
-    // 16MHz sources (assuming dividers are set properly for
-    // HFROSC).
-    // (Legal values of f_REF are 6-48MHz)
-
-    // Set DIVR to divide-by-2 to get 8MHz frequency
-    // (legal values of f_R are 6-12 MHz)
-
-    config_value |= PLL_BYPASS(1);
-    config_value |= PLL_R(r);
-
-    // Set DIVF to get 512Mhz frequncy
-    // There is an implied multiply-by-2, 16Mhz.
-    // So need to write 32-1
-    // (legal values of f_F are 384-768 MHz)
-    config_value |= PLL_F(f);
-
-    // Set DIVQ to divide-by-2 to get 256 MHz frequency
-    // (legal values of f_Q are 50-400Mhz)
-    config_value |= PLL_Q(q);
-
-    // Set our Final output divide to divide-by-1:
-    PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0));
-
-    PRCI_REG(PRCI_PLLCFG) = config_value;
-
-    // Un-Bypass the PLL.
-    PRCI_REG(PRCI_PLLCFG) &= ~PLL_BYPASS(1);
-
-    // Wait for PLL Lock
-    // Note that the Lock signal can be glitchy.
-    // Need to wait 100 us
-    // RTC is running at 32kHz.
-    // So wait 4 ticks of RTC.
-    uint32_t now = mtime_lo();
-    while (mtime_lo() - now < 4) ;
-
-    // Now it is safe to check for PLL Lock
-    while ((PRCI_REG(PRCI_PLLCFG) & PLL_LOCK(1)) == 0) ;
-  }
-
-  // Switch over to PLL Clock source
-  PRCI_REG(PRCI_PLLCFG) |= PLL_SEL(1);
-}
-
-static void use_default_clocks()
-{
-  // Turn off the LFROSC
-  AON_REG(AON_LFROSC) &= ~ROSC_EN(1);
-
-  // Use HFROSC
-  use_hfrosc(4, 16);
-}
-
-static unsigned long __attribute__((noinline)) measure_cpu_freq(size_t n)
-{
-  unsigned long start_mtime, delta_mtime;
-  unsigned long mtime_freq = get_timer_freq();
-
-  // Don't start measuruing until we see an mtime tick
-  unsigned long tmp = mtime_lo();
-  do {
-    start_mtime = mtime_lo();
-  } while (start_mtime == tmp);
-
-  unsigned long start_mcycle = read_csr(mcycle);
-
-  do {
-    delta_mtime = mtime_lo() - start_mtime;
-  } while (delta_mtime < n);
-
-  unsigned long delta_mcycle = read_csr(mcycle) - start_mcycle;
-
-  return (delta_mcycle / delta_mtime) * mtime_freq
-         + ((delta_mcycle % delta_mtime) * mtime_freq) / delta_mtime;
-}
-
-unsigned long get_cpu_freq()
-{
-  static uint32_t cpu_freq;
-
-  if (!cpu_freq) {
-    // warm up I$
-    measure_cpu_freq(1);
-    // measure for real
-    cpu_freq = measure_cpu_freq(10);
-  }
-
-  return cpu_freq;
-}
-
-static void uart_init(size_t baud_rate)
-{
-  GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
-  GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
-  UART0_REG(UART_REG_DIV) = get_cpu_freq() / baud_rate - 1;
-  UART0_REG(UART_REG_TXCTRL) |= UART_TXEN;
-}
-
-
-
-#ifdef USE_PLIC
-extern void handle_m_ext_interrupt();
-#endif
-
-#ifdef USE_M_TIME
-extern void handle_m_time_interrupt();
-#endif
-
-uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
-{
-  if (0){
-#ifdef USE_PLIC
-    // External Machine-Level interrupt from PLIC
-  } else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_EXT)) {
-    handle_m_ext_interrupt();
-#endif
-#ifdef USE_M_TIME
-    // External Machine-Level interrupt from PLIC
-  } else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_TIMER)){
-    handle_m_time_interrupt();
-#endif
-  }
-  else {
-    write(1, "trap\n", 5);
-    _exit(1 + mcause);
-  }
-  return epc;
-}
-
-void _init()
-{
-  
-  #ifndef NO_INIT
-  use_default_clocks();
-  use_pll(0, 0, 1, 31, 1);
-  uart_init(115200);
-
-  printf("core freq at %lu Hz\n", get_cpu_freq());
-
-  write_csr(mtvec, &trap_entry);
-  if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
-    write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
-    write_csr(fcsr, 0); // initialize rounding mode, undefined at reset
-  }
-  #endif
-  
-}
-
-void _fini()
-{
-}

fw/bsp/env/tgfs-vp/openocd.cfg

@@ -1,34 +0,0 @@
-adapter_khz     10000
-
-interface ftdi
-ftdi_device_desc "Dual RS232-HS"
-ftdi_vid_pid 0x0403 0x6010
-
-ftdi_layout_init 0x0008 0x001b
-ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
-
-#Reset Stretcher logic on FE310 is ~1 second long
-#This doesn't apply if you use
-# ftdi_set_signal, but still good to document
-#adapter_nsrst_delay 1500
-
-set _CHIPNAME riscv
-jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME riscv -chain-position $_TARGETNAME
-$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
-
-flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME
-init
-#reset -- This type of reset is not implemented yet
-if {[ info exists pulse_srst]} {
-  ftdi_set_signal nSRST 0
-  ftdi_set_signal nSRST z
-  #Wait for the reset stretcher
-  #It will work without this, but
-  #will incur lots of delays for later commands.
-  sleep 1500
-}	
-halt
-#flash protect 0 64 last off

fw/bsp/env/tgfs-vp/platform.h

@@ -1,133 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_PLATFORM_H
-#define _SIFIVE_PLATFORM_H
-
-// Some things missing from the official encoding.h
-#define MCAUSE_INT         0x80000000
-#define MCAUSE_CAUSE       0x7FFFFFFF
-
-#include "../../include/platform/const.h"
-#include "../../include/platform/devices/aon.h"
-#include "../../include/platform/devices/clint.h"
-#include "../../include/platform/devices/gpio.h"
-#include "../../include/platform/devices/otp.h"
-#include "../../include/platform/devices/plic.h"
-#include "../../include/platform/devices/prci.h"
-#include "../../include/platform/devices/pwm.h"
-#include "../../include/platform/devices/spi.h"
-#include "../../include/platform/devices/uart.h"
-
-/****************************************************************************
- * Platform definitions
- *****************************************************************************/
-
-// Memory map
-#define MASKROM_MEM_ADDR _AC(0x00001000,UL)
-#define TRAPVEC_TABLE_CTRL_ADDR _AC(0x00001010,UL)
-#define OTP_MEM_ADDR _AC(0x00020000,UL)
-#define CLINT_CTRL_ADDR _AC(0x02000000,UL)
-#define PLIC_CTRL_ADDR _AC(0x0C000000,UL)
-#define AON_CTRL_ADDR _AC(0x10000000,UL)
-#define PRCI_CTRL_ADDR _AC(0x10008000,UL)
-#define OTP_CTRL_ADDR _AC(0x10010000,UL)
-#define GPIO_CTRL_ADDR _AC(0x10012000,UL)
-#define UART0_CTRL_ADDR _AC(0x10013000,UL)
-#define SPI0_CTRL_ADDR _AC(0x10014000,UL)
-#define PWM0_CTRL_ADDR _AC(0x10015000,UL)
-#define UART1_CTRL_ADDR _AC(0x10023000,UL)
-#define SPI1_CTRL_ADDR _AC(0x10024000,UL)
-#define PWM1_CTRL_ADDR _AC(0x10025000,UL)
-#define SPI2_CTRL_ADDR _AC(0x10034000,UL)
-#define PWM2_CTRL_ADDR _AC(0x10035000,UL)
-#define SPI0_MEM_ADDR _AC(0x20000000,UL)
-#define MEM_CTRL_ADDR _AC(0x80000000,UL)
-
-// IOF masks
-#define IOF0_SPI1_MASK          _AC(0x000007FC,UL)
-#define SPI11_NUM_SS     (4)
-#define IOF_SPI1_SS0          (2u)
-#define IOF_SPI1_SS1          (8u)
-#define IOF_SPI1_SS2          (9u)
-#define IOF_SPI1_SS3          (10u)
-#define IOF_SPI1_MOSI         (3u)
-#define IOF_SPI1_MISO         (4u)
-#define IOF_SPI1_SCK          (5u)
-#define IOF_SPI1_DQ0          (3u)
-#define IOF_SPI1_DQ1          (4u)
-#define IOF_SPI1_DQ2          (6u)
-#define IOF_SPI1_DQ3          (7u)
-
-#define IOF0_SPI2_MASK          _AC(0xFC000000,UL)
-#define SPI2_NUM_SS       (1)
-#define IOF_SPI2_SS0          (26u)
-#define IOF_SPI2_MOSI         (27u)
-#define IOF_SPI2_MISO         (28u)
-#define IOF_SPI2_SCK          (29u)
-#define IOF_SPI2_DQ0          (27u)
-#define IOF_SPI2_DQ1          (28u)
-#define IOF_SPI2_DQ2          (30u)
-#define IOF_SPI2_DQ3          (31u)
-
-//#define IOF0_I2C_MASK          _AC(0x00003000,UL)
-
-#define IOF0_UART0_MASK         _AC(0x00030000, UL)
-#define IOF_UART0_RX   (16u)
-#define IOF_UART0_TX   (17u)
-
-#define IOF0_UART1_MASK         _AC(0x03000000, UL)
-#define IOF_UART1_RX (24u)
-#define IOF_UART1_TX (25u)
-
-#define IOF1_PWM0_MASK          _AC(0x0000000F, UL)
-#define IOF1_PWM1_MASK          _AC(0x00780000, UL)
-#define IOF1_PWM2_MASK          _AC(0x00003C00, UL)
-
-// Interrupt numbers
-#define INT_RESERVED 0
-#define INT_WDOGCMP 1
-#define INT_RTCCMP 2
-#define INT_UART0_BASE 3
-#define INT_UART1_BASE 4
-#define INT_SPI0_BASE 5
-#define INT_SPI1_BASE 6
-#define INT_SPI2_BASE 7
-#define INT_GPIO_BASE 8
-#define INT_PWM0_BASE 40
-#define INT_PWM1_BASE 44
-#define INT_PWM2_BASE 48
-
-// Helper functions
-#define _REG32(p, i) (*(volatile uint32_t *) ((p) + (i)))
-#define _REG32P(p, i) ((volatile uint32_t *) ((p) + (i)))
-#define AON_REG(offset) _REG32(AON_CTRL_ADDR, offset)
-#define CLINT_REG(offset) _REG32(CLINT_CTRL_ADDR, offset)
-#define GPIO_REG(offset) _REG32(GPIO_CTRL_ADDR, offset)
-#define OTP_REG(offset)  _REG32(OTP_CTRL_ADDR, offset)
-#define PLIC_REG(offset) _REG32(PLIC_CTRL_ADDR, offset)
-#define PRCI_REG(offset) _REG32(PRCI_CTRL_ADDR, offset)
-#define PWM0_REG(offset) _REG32(PWM0_CTRL_ADDR, offset)
-#define PWM1_REG(offset) _REG32(PWM1_CTRL_ADDR, offset)
-#define PWM2_REG(offset) _REG32(PWM2_CTRL_ADDR, offset)
-#define SPI0_REG(offset) _REG32(SPI0_CTRL_ADDR, offset)
-#define SPI1_REG(offset) _REG32(SPI1_CTRL_ADDR, offset)
-#define SPI2_REG(offset) _REG32(SPI2_CTRL_ADDR, offset)
-#define UART0_REG(offset) _REG32(UART0_CTRL_ADDR, offset)
-#define UART1_REG(offset) _REG32(UART1_CTRL_ADDR, offset)
-
-// Misc
-
-#include <stdint.h>
-
-#define NUM_GPIO 32
-
-#define PLIC_NUM_INTERRUPTS 52
-#define PLIC_NUM_PRIORITIES 7
-
-void write_hex(int fd, unsigned long int hex);
-
-unsigned long get_cpu_freq(void);
-unsigned long get_timer_freq(void);
-uint64_t get_timer_value(void);
-
-#endif /* _SIFIVE_PLATFORM_H */

fw/bsp/env/tgfs-vp/settings.mk

@@ -1,3 +0,0 @@
-# Describes the CPU on this board to the rest of the SDK.
-RISCV_ARCH := rv32imac
-RISCV_ABI  := ilp32

fw/bsp/env/ventry.S

@@ -1,288 +0,0 @@
-// See LICENSE for license details
-
-#ifndef VENTRY_S
-#define VENTRY_S
-
-#include "encoding.h"
-#include "sifive/bits.h"
-
-#only save caller registers
-.macro TRAP_ENTRY
-  addi sp, sp, -16*REGBYTES
-
-  STORE x1,  0*REGBYTES(sp)
-  STORE x5,  1*REGBYTES(sp)
-  STORE x6,  2*REGBYTES(sp)
-  STORE x7,  3*REGBYTES(sp)
-  STORE x10, 4*REGBYTES(sp)
-  STORE x11, 5*REGBYTES(sp)
-  STORE x12, 6*REGBYTES(sp)
-  STORE x13, 7*REGBYTES(sp)
-  STORE x14, 8*REGBYTES(sp)
-  STORE x15, 9*REGBYTES(sp)
-  STORE x16, 10*REGBYTES(sp)
-  STORE x17, 11*REGBYTES(sp)
-  STORE x28, 12*REGBYTES(sp)
-  STORE x29, 13*REGBYTES(sp)
-  STORE x30, 14*REGBYTES(sp)
-  STORE x31, 15*REGBYTES(sp)
-.endm
-
-#restore caller registers
-.macro TRAP_EXIT
-# Remain in M-mode after mret
-  li t0, MSTATUS_MPP
-  csrs mstatus, t0
-
-  LOAD x1,  0*REGBYTES(sp)
-  LOAD x5,  1*REGBYTES(sp)
-  LOAD x6,  2*REGBYTES(sp)
-  LOAD x7,  3*REGBYTES(sp)
-  LOAD x10, 4*REGBYTES(sp)
-  LOAD x11, 5*REGBYTES(sp)
-  LOAD x12, 6*REGBYTES(sp)
-  LOAD x13, 7*REGBYTES(sp)
-  LOAD x14, 8*REGBYTES(sp)
-  LOAD x15, 9*REGBYTES(sp)
-  LOAD x16, 10*REGBYTES(sp)
-  LOAD x17, 11*REGBYTES(sp)
-  LOAD x28, 12*REGBYTES(sp)
-  LOAD x29, 13*REGBYTES(sp)
-  LOAD x30, 14*REGBYTES(sp)
-  LOAD x31, 15*REGBYTES(sp)
-
-  addi sp, sp, 16*REGBYTES
-  mret
-.endm
-
-
-
-#Vector table for E31/E51
-
-  .section      .text.entry	
-  .align 8
-  .global vtrap_entry
-vtrap_entry:
-  j sync_trap
-  .align 2
-  j reserved
-  .align 2
-  j reserved
-  .align 2
-  j vmsi_Handler
-  .align 2
-  j reserved
-  .align 2
-  j reserved
-  .align 2
-  j reserved
-  .align 2
-  j vmti_Handler
-  .align 2
-  j reserved
-  .align 2
-  j reserved
-  .align 2
-  j reserved
-  .align 2
-  j vmei_Handler
-  .align 2
-  j reserved
-  .align 2
-  j reserved
-  .align 2
-  j reserved
-   .align 2
-  j reserved
-  .align 2
-  j vlip_Handler0
-  .align 2
-  j vlip_Handler1
-  .align 2
-  j vlip_Handler2
-  .align 2
-  j vlip_Handler3
-  .align 2
-  j vlip_Handler4
-  .align 2
-  j vlip_Handler5
-  .align 2
-  j vlip_Handler6
-  .align 2
-  j vlip_Handler7
-  .align 2
-  j vlip_Handler8
-  .align 2
-  j vlip_Handler9
-  .align 2
-  j vlip_Handler10
-  .align 2
-  j vlip_Handler11
-  .align 2
-  j vlip_Handler12
-  .align 2
-  j vlip_Handler13
-  .align 2
-  j vlip_Handler14
-  .align 2
-  j vlip_Handler15
-  
-#synchronous trap
-sync_trap:
-  TRAP_ENTRY
-  jal handle_sync_trap
-  TRAP_EXIT
-
-#Machine Software Interrupt
-vmsi_Handler:
-  TRAP_ENTRY
-  jal reserved
-  TRAP_EXIT
-
-#Machine Timer Interrupt
-vmti_Handler:
-  TRAP_ENTRY
-  jal handle_m_time_interrupt
-  TRAP_EXIT
-
-#Machine External Interrupt
-vmei_Handler:
-  TRAP_ENTRY
-  jal handle_m_external_interrupt
-  TRAP_EXIT
-
-#LIP0
-vlip_Handler0:
-  TRAP_ENTRY
-  jal handle_local_interrupt0
-  TRAP_EXIT
-
-#LIP1
-vlip_Handler1:
-  TRAP_ENTRY
-  jal handle_local_interrupt1
-  TRAP_EXIT
-
-#LIP2
-vlip_Handler2:
-  TRAP_ENTRY
-  jal handle_local_interrupt2
-  TRAP_EXIT
-
-#LIP3
-vlip_Handler3:
-  TRAP_ENTRY
-  jal handle_local_interrupt3
-  TRAP_EXIT
-
-#LIP4
-vlip_Handler4:
-  TRAP_ENTRY
-  jal handle_local_interrupt4
-  TRAP_EXIT
-
-#LIP5
-vlip_Handler5:
-  TRAP_ENTRY
-  jal handle_local_interrupt5
-  TRAP_EXIT
-
-#LIP6
-vlip_Handler6:
-  TRAP_ENTRY
-  jal handle_local_interrupt6
-  TRAP_EXIT
-
-#LIP7
-vlip_Handler7:
-  TRAP_ENTRY
-  jal handle_local_interrupt7
-  TRAP_EXIT
-
-#LIP8
-vlip_Handler8:
-  TRAP_ENTRY
-  jal handle_local_interrupt8
-  TRAP_EXIT
-
-#LIP9
-vlip_Handler9:
-  TRAP_ENTRY
-  jal handle_local_interrupt9
-  TRAP_EXIT
-
-#LIP10
-vlip_Handler10:
-  TRAP_ENTRY
-  jal handle_local_interrupt10
-  TRAP_EXIT
-
-#LIP11
-vlip_Handler11:
-  TRAP_ENTRY
-  jal handle_local_interrupt11
-  TRAP_EXIT
-
-#LIP12
-vlip_Handler12:
-  TRAP_ENTRY
-  jal handle_local_interrupt12
-  TRAP_EXIT
-
-#LIP13
-vlip_Handler13:
-  TRAP_ENTRY
-  jal handle_local_interrupt13
-  TRAP_EXIT
-
-#LIP14
-vlip_Handler14:
-  TRAP_ENTRY
-  jal handle_local_interrupt14
-  TRAP_EXIT
-
-#LIP15
-vlip_Handler15:
-  TRAP_ENTRY
-  jal handle_local_interrupt15
-  TRAP_EXIT
-
-#unimplemented ISRs trap here
-.weak reserved
-reserved:
-.weak handle_local_interrupt0
-handle_local_interrupt0:
-.weak handle_local_interrupt1
-handle_local_interrupt1:
-.weak handle_local_interrupt2
-handle_local_interrupt2:
-.weak handle_local_interrupt3
-handle_local_interrupt3:
-.weak handle_local_interrupt4
-handle_local_interrupt4:
-.weak handle_local_interrupt5
-handle_local_interrupt5:
-.weak handle_local_interrupt6
-handle_local_interrupt6:
-.weak handle_local_interrupt7
-handle_local_interrupt7:
-.weak handle_local_interrupt8
-handle_local_interrupt8:
-.weak handle_local_interrupt9
-handle_local_interrupt9:
-.weak handle_local_interrupt10
-handle_local_interrupt10:
-.weak handle_local_interrupt11
-handle_local_interrupt11:
-.weak handle_local_interrupt12
-handle_local_interrupt12:
-.weak handle_local_interrupt13
-handle_local_interrupt13:
-.weak handle_local_interrupt14
-handle_local_interrupt14:
-.weak handle_local_interrupt15
-handle_local_interrupt15:
-1:
-  j 1b
-	
-#endif

fw/bsp/include/platform/bits.h

@@ -1,36 +0,0 @@
-// See LICENSE for license details.
-#ifndef _RISCV_BITS_H
-#define _RISCV_BITS_H
-
-#define likely(x) __builtin_expect((x), 1)
-#define unlikely(x) __builtin_expect((x), 0)
-
-#define ROUNDUP(a, b) ((((a)-1)/(b)+1)*(b))
-#define ROUNDDOWN(a, b) ((a)/(b)*(b))
-
-#define MAX(a, b) ((a) > (b) ? (a) : (b))
-#define MIN(a, b) ((a) < (b) ? (a) : (b))
-#define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi)
-
-#define EXTRACT_FIELD(val, which) (((val) & (which)) / ((which) & ~((which)-1)))
-#define INSERT_FIELD(val, which, fieldval) (((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1))))
-
-#define STR(x) XSTR(x)
-#define XSTR(x) #x
-
-#if __riscv_xlen == 64
-# define SLL32    sllw
-# define STORE    sd
-# define LOAD     ld
-# define LWU      lwu
-# define LOG_REGBYTES 3
-#else
-# define SLL32    sll
-# define STORE    sw
-# define LOAD     lw
-# define LWU      lw
-# define LOG_REGBYTES 2
-#endif
-#define REGBYTES (1 << LOG_REGBYTES)
-
-#endif

fw/bsp/include/platform/const.h

@@ -1,18 +0,0 @@
-// See LICENSE for license details.
-/* Derived from <linux/const.h> */
-
-#ifndef _SIFIVE_CONST_H
-#define _SIFIVE_CONST_H
-
-#ifdef __ASSEMBLER__
-#define _AC(X,Y)        X
-#define _AT(T,X)        X
-#else
-#define _AC(X,Y)        (X##Y)
-#define _AT(T,X)        ((T)(X))
-#endif /* !__ASSEMBLER__*/
-
-#define _BITUL(x)       (_AC(1,UL) << (x))
-#define _BITULL(x)      (_AC(1,ULL) << (x))
-
-#endif /* _SIFIVE_CONST_H */

fw/bsp/include/platform/devices/aon.h

@@ -1,88 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_AON_H
-#define _SIFIVE_AON_H
-
-/* Register offsets */
-
-#define AON_WDOGCFG     0x000
-#define AON_WDOGCOUNT   0x008
-#define AON_WDOGS       0x010
-#define AON_WDOGFEED    0x018
-#define AON_WDOGKEY     0x01C
-#define AON_WDOGCMP     0x020
-
-#define AON_RTCCFG      0x040
-#define AON_RTCLO       0x048
-#define AON_RTCHI       0x04C
-#define AON_RTCS        0x050
-#define AON_RTCCMP      0x060
-
-#define AON_BACKUP0     0x080
-#define AON_BACKUP1     0x084
-#define AON_BACKUP2     0x088
-#define AON_BACKUP3     0x08C
-#define AON_BACKUP4     0x090
-#define AON_BACKUP5     0x094
-#define AON_BACKUP6     0x098
-#define AON_BACKUP7     0x09C
-#define AON_BACKUP8     0x0A0
-#define AON_BACKUP9     0x0A4
-#define AON_BACKUP10    0x0A8
-#define AON_BACKUP11    0x0AC
-#define AON_BACKUP12    0x0B0
-#define AON_BACKUP13    0x0B4
-#define AON_BACKUP14    0x0B8
-#define AON_BACKUP15    0x0BC
-
-#define AON_PMUWAKEUPI0 0x100
-#define AON_PMUWAKEUPI1 0x104
-#define AON_PMUWAKEUPI2 0x108
-#define AON_PMUWAKEUPI3 0x10C
-#define AON_PMUWAKEUPI4 0x110
-#define AON_PMUWAKEUPI5 0x114
-#define AON_PMUWAKEUPI6 0x118
-#define AON_PMUWAKEUPI7 0x11C
-#define AON_PMUSLEEPI0  0x120
-#define AON_PMUSLEEPI1  0x124
-#define AON_PMUSLEEPI2  0x128
-#define AON_PMUSLEEPI3  0x12C
-#define AON_PMUSLEEPI4  0x130
-#define AON_PMUSLEEPI5  0x134
-#define AON_PMUSLEEPI6  0x138
-#define AON_PMUSLEEPI7  0x13C
-#define AON_PMUIE       0x140
-#define AON_PMUCAUSE    0x144
-#define AON_PMUSLEEP    0x148
-#define AON_PMUKEY      0x14C
-
-#define AON_LFROSC      0x070
-/* Constants */
-
-#define AON_WDOGKEY_VALUE  0x51F15E
-#define AON_WDOGFEED_VALUE 0xD09F00D
-
-#define AON_WDOGCFG_SCALE       0x0000000F
-#define AON_WDOGCFG_RSTEN       0x00000100
-#define AON_WDOGCFG_ZEROCMP     0x00000200
-#define AON_WDOGCFG_ENALWAYS    0x00001000
-#define AON_WDOGCFG_ENCOREAWAKE 0x00002000
-#define AON_WDOGCFG_CMPIP       0x10000000
-
-#define AON_RTCCFG_SCALE     0x0000000F
-#define AON_RTCCFG_ENALWAYS  0x00001000
-#define AON_RTCCFG_CMPIP     0x10000000
-
-#define AON_WAKEUPCAUSE_RESET   0x00
-#define AON_WAKEUPCAUSE_RTC     0x01
-#define AON_WAKEUPCAUSE_DWAKEUP 0x02
-#define AON_WAKEUPCAUSE_AWAKEUP 0x03
-
-#define AON_RESETCAUSE_POWERON  0x0000
-#define AON_RESETCAUSE_EXTERNAL 0x0100
-#define AON_RESETCAUSE_WATCHDOG 0x0200
-
-#define AON_PMUCAUSE_WAKEUPCAUSE 0x00FF
-#define AON_PMUCAUSE_RESETCAUSE  0xFF00
-
-#endif /* _SIFIVE_AON_H */

fw/bsp/include/platform/devices/clic.h

@@ -1,30 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_CLIC_H
-#define _SIFIVE_CLIC_H
-
-#define CLIC_HART0          0x00800000
-#define CLIC_MSIP           0x0000
-#define CLIC_MSIP_size      0x4
-#define CLIC_MTIMECMP       0x4000
-#define CLIC_MTIMECMP_size  0x8
-#define CLIC_MTIME          0xBFF8
-#define CLIC_MTIME_size     0x8
-
-#define CLIC_INTIP          0x000
-#define CLIC_INTIE          0x400
-#define CLIC_INTCFG         0x800
-#define CLIC_CFG            0xc00
-
-// These interrupt IDs are consistent across old and new mtvec modes
-#define SSIPID              1
-#define MSIPID              3
-#define STIPID              5
-#define MTIPID              7
-#define SEIPID              9
-#define MEIPID              11
-#define CSIPID              12
-#define LOCALINTIDBASE      16
-
-
-#endif /* _SIFIVE_CLIC_H */ 

fw/bsp/include/platform/devices/clint.h

@@ -1,14 +0,0 @@
-// See LICENSE for license details
-
-#ifndef _SIFIVE_CLINT_H
-#define _SIFIVE_CLINT_H
-
-
-#define CLINT_MSIP 0x0000
-#define CLINT_MSIP_size   0x4
-#define CLINT_MTIMECMP 0x4000
-#define CLINT_MTIMECMP_size 0x8
-#define CLINT_MTIME 0xBFF8
-#define CLINT_MTIME_size 0x8
-
-#endif /* _SIFIVE_CLINT_H */ 

fw/bsp/include/platform/devices/gpio.h

@@ -1,24 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_GPIO_H
-#define _SIFIVE_GPIO_H
-
-#define GPIO_INPUT_VAL  (0x00)
-#define GPIO_INPUT_EN   (0x04)
-#define GPIO_OUTPUT_EN  (0x08)
-#define GPIO_OUTPUT_VAL (0x0C)
-#define GPIO_PULLUP_EN  (0x10)
-#define GPIO_DRIVE      (0x14)
-#define GPIO_RISE_IE    (0x18)
-#define GPIO_RISE_IP    (0x1C)
-#define GPIO_FALL_IE    (0x20)
-#define GPIO_FALL_IP    (0x24)
-#define GPIO_HIGH_IE    (0x28)
-#define GPIO_HIGH_IP    (0x2C)
-#define GPIO_LOW_IE     (0x30)
-#define GPIO_LOW_IP     (0x34)
-#define GPIO_IOF_EN     (0x38)
-#define GPIO_IOF_SEL    (0x3C)
-#define GPIO_OUTPUT_XOR    (0x40)
-
-#endif /* _SIFIVE_GPIO_H */

fw/bsp/include/platform/devices/otp.h

@@ -1,23 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_OTP_H
-#define _SIFIVE_OTP_H
-
-/* Register offsets */
-
-#define OTP_LOCK         0x00
-#define OTP_CK           0x04
-#define OTP_OE           0x08
-#define OTP_SEL          0x0C
-#define OTP_WE           0x10
-#define OTP_MR           0x14
-#define OTP_MRR          0x18
-#define OTP_MPP          0x1C
-#define OTP_VRREN        0x20
-#define OTP_VPPEN        0x24
-#define OTP_A            0x28
-#define OTP_D            0x2C
-#define OTP_Q            0x30
-#define OTP_READ_TIMINGS 0x34
-
-#endif

fw/bsp/include/platform/devices/plic.h

@@ -1,31 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef PLIC_H
-#define PLIC_H
-
-#include "../../platform/const.h"
-
-// 32 bits per source
-#define PLIC_PRIORITY_OFFSET            _AC(0x0000,UL)
-#define PLIC_PRIORITY_SHIFT_PER_SOURCE  2
-// 1 bit per source (1 address)
-#define PLIC_PENDING_OFFSET             _AC(0x1000,UL)
-#define PLIC_PENDING_SHIFT_PER_SOURCE   0
-
-//0x80 per target
-#define PLIC_ENABLE_OFFSET              _AC(0x2000,UL)
-#define PLIC_ENABLE_SHIFT_PER_TARGET    7
-
-
-#define PLIC_THRESHOLD_OFFSET           _AC(0x200000,UL)
-#define PLIC_CLAIM_OFFSET               _AC(0x200004,UL)
-#define PLIC_THRESHOLD_SHIFT_PER_TARGET 12
-#define PLIC_CLAIM_SHIFT_PER_TARGET     12
-
-#define PLIC_MAX_SOURCE                 1023
-#define PLIC_SOURCE_MASK                0x3FF
-
-#define PLIC_MAX_TARGET                 15871
-#define PLIC_TARGET_MASK                0x3FFF
-
-#endif /* PLIC_H */

fw/bsp/include/platform/devices/prci.h

@@ -1,56 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_PRCI_H
-#define _SIFIVE_PRCI_H
-
-/* Register offsets */
-
-#define PRCI_HFROSCCFG   (0x0000)
-#define PRCI_HFXOSCCFG   (0x0004)
-#define PRCI_PLLCFG      (0x0008)
-#define PRCI_PLLDIV      (0x000C)
-#define PRCI_PROCMONCFG  (0x00F0)
-
-/* Fields */
-#define ROSC_DIV(x)    (((x) & 0x2F) << 0 ) 
-#define ROSC_TRIM(x)   (((x) & 0x1F) << 16)
-#define ROSC_EN(x)     (((x) & 0x1 ) << 30) 
-#define ROSC_RDY(x)    (((x) & 0x1 ) << 31)
-
-#define XOSC_EN(x)     (((x) & 0x1) << 30)
-#define XOSC_RDY(x)    (((x) & 0x1) << 31)
-
-#define PLL_R(x)       (((x) & 0x7)  << 0)
-// single reserved bit for F LSB.
-#define PLL_F(x)       (((x) & 0x3F) << 4)
-#define PLL_Q(x)       (((x) & 0x3)  << 10)
-#define PLL_SEL(x)     (((x) & 0x1)  << 16)
-#define PLL_REFSEL(x)  (((x) & 0x1)  << 17)
-#define PLL_BYPASS(x)  (((x) & 0x1)  << 18)
-#define PLL_LOCK(x)    (((x) & 0x1)  << 31)
-
-#define PLL_R_default 0x1
-#define PLL_F_default 0x1F
-#define PLL_Q_default 0x3
-
-#define PLL_REFSEL_HFROSC 0x0
-#define PLL_REFSEL_HFXOSC 0x1
-
-#define PLL_SEL_HFROSC 0x0
-#define PLL_SEL_PLL    0x1
-
-#define PLL_FINAL_DIV(x)      (((x) & 0x3F) << 0)
-#define PLL_FINAL_DIV_BY_1(x) (((x) & 0x1 ) << 8)
-
-#define PROCMON_DIV(x)   (((x) & 0x1F) << 0)
-#define PROCMON_TRIM(x)  (((x) & 0x1F) << 8)
-#define PROCMON_EN(x)    (((x) & 0x1)  << 16)
-#define PROCMON_SEL(x)   (((x) & 0x3)  << 24)
-#define PROCMON_NT_EN(x) (((x) & 0x1)  << 28)
-
-#define PROCMON_SEL_HFCLK     0
-#define PROCMON_SEL_HFXOSCIN  1
-#define PROCMON_SEL_PLLOUTDIV 2
-#define PROCMON_SEL_PROCMON   3
-
-#endif // _SIFIVE_PRCI_H

fw/bsp/include/platform/devices/pwm.h

@@ -1,37 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_PWM_H
-#define _SIFIVE_PWM_H
-
-/* Register offsets */
-
-#define PWM_CFG   0x00
-#define PWM_COUNT 0x08
-#define PWM_S     0x10
-#define PWM_CMP0  0x20
-#define PWM_CMP1  0x24
-#define PWM_CMP2  0x28
-#define PWM_CMP3  0x2C
-
-/* Constants */
-
-#define PWM_CFG_SCALE       0x0000000F
-#define PWM_CFG_STICKY      0x00000100
-#define PWM_CFG_ZEROCMP     0x00000200
-#define PWM_CFG_DEGLITCH    0x00000400
-#define PWM_CFG_ENALWAYS    0x00001000
-#define PWM_CFG_ONESHOT     0x00002000
-#define PWM_CFG_CMP0CENTER  0x00010000
-#define PWM_CFG_CMP1CENTER  0x00020000
-#define PWM_CFG_CMP2CENTER  0x00040000
-#define PWM_CFG_CMP3CENTER  0x00080000
-#define PWM_CFG_CMP0GANG    0x01000000
-#define PWM_CFG_CMP1GANG    0x02000000
-#define PWM_CFG_CMP2GANG    0x04000000
-#define PWM_CFG_CMP3GANG    0x08000000
-#define PWM_CFG_CMP0IP      0x10000000
-#define PWM_CFG_CMP1IP      0x20000000
-#define PWM_CFG_CMP2IP      0x40000000
-#define PWM_CFG_CMP3IP      0x80000000
-
-#endif /* _SIFIVE_PWM_H */

fw/bsp/include/platform/devices/spi.h

@@ -1,80 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_SPI_H
-#define _SIFIVE_SPI_H
-
-/* Register offsets */
-
-#define SPI_REG_SCKDIV          0x00
-#define SPI_REG_SCKMODE         0x04
-#define SPI_REG_CSID            0x10
-#define SPI_REG_CSDEF           0x14
-#define SPI_REG_CSMODE          0x18
-
-#define SPI_REG_DCSSCK          0x28
-#define SPI_REG_DSCKCS          0x2a
-#define SPI_REG_DINTERCS        0x2c
-#define SPI_REG_DINTERXFR       0x2e
-
-#define SPI_REG_FMT             0x40
-#define SPI_REG_TXFIFO          0x48
-#define SPI_REG_RXFIFO          0x4c
-#define SPI_REG_TXCTRL          0x50
-#define SPI_REG_RXCTRL          0x54
-
-#define SPI_REG_FCTRL           0x60
-#define SPI_REG_FFMT            0x64
-
-#define SPI_REG_IE              0x70
-#define SPI_REG_IP              0x74
-
-/* Fields */
-
-#define SPI_SCK_PHA             0x1
-#define SPI_SCK_POL             0x2
-
-#define SPI_FMT_PROTO(x)        ((x) & 0x3)
-#define SPI_FMT_ENDIAN(x)       (((x) & 0x1) << 2)
-#define SPI_FMT_DIR(x)          (((x) & 0x1) << 3)
-#define SPI_FMT_LEN(x)          (((x) & 0xf) << 16)
-
-/* TXCTRL register */
-#define SPI_TXWM(x)             ((x) & 0xffff)
-/* RXCTRL register */
-#define SPI_RXWM(x)             ((x) & 0xffff)
-
-#define SPI_IP_TXWM             0x1
-#define SPI_IP_RXWM             0x2
-
-#define SPI_FCTRL_EN            0x1
-
-#define SPI_INSN_CMD_EN         0x1
-#define SPI_INSN_ADDR_LEN(x)    (((x) & 0x7) << 1)
-#define SPI_INSN_PAD_CNT(x)     (((x) & 0xf) << 4)
-#define SPI_INSN_CMD_PROTO(x)   (((x) & 0x3) << 8)
-#define SPI_INSN_ADDR_PROTO(x)  (((x) & 0x3) << 10)
-#define SPI_INSN_DATA_PROTO(x)  (((x) & 0x3) << 12)
-#define SPI_INSN_CMD_CODE(x)    (((x) & 0xff) << 16)
-#define SPI_INSN_PAD_CODE(x)    (((x) & 0xff) << 24)
-
-#define SPI_TXFIFO_FULL  (1 << 31)   
-#define SPI_RXFIFO_EMPTY (1 << 31)   
-
-/* Values */
-
-#define SPI_CSMODE_AUTO         0
-#define SPI_CSMODE_HOLD         2
-#define SPI_CSMODE_OFF          3
-
-#define SPI_DIR_RX              0
-#define SPI_DIR_TX              1
-
-#define SPI_PROTO_S             0
-#define SPI_PROTO_D             1
-#define SPI_PROTO_Q             2
-
-#define SPI_ENDIAN_MSB          0
-#define SPI_ENDIAN_LSB          1
-
-
-#endif /* _SIFIVE_SPI_H */

fw/bsp/include/platform/devices/uart.h

@@ -1,27 +0,0 @@
-// See LICENSE for license details.
-
-#ifndef _SIFIVE_UART_H
-#define _SIFIVE_UART_H
-
-/* Register offsets */
-#define UART_REG_TXFIFO         0x00
-#define UART_REG_RXFIFO         0x04
-#define UART_REG_TXCTRL         0x08
-#define UART_REG_RXCTRL         0x0c
-#define UART_REG_IE             0x10
-#define UART_REG_IP             0x14
-#define UART_REG_DIV            0x18
-
-/* TXCTRL register */
-#define UART_TXEN               0x1
-#define UART_TXWM(x)            (((x) & 0xffff) << 16)
-
-/* RXCTRL register */
-#define UART_RXEN               0x1
-#define UART_RXWM(x)            (((x) & 0xffff) << 16)
-
-/* IP register */
-#define UART_IP_TXWM            0x1
-#define UART_IP_RXWM            0x2
-
-#endif /* _SIFIVE_UART_H */

fw/bsp/include/platform/sections.h

@@ -1,17 +0,0 @@
-// See LICENSE for license details.
-#ifndef _SECTIONS_H
-#define _SECTIONS_H
-
-extern unsigned char _rom[];
-extern unsigned char _rom_end[];
-
-extern unsigned char _ram[];
-extern unsigned char _ram_end[];
-
-extern unsigned char _ftext[];
-extern unsigned char _etext[];
-extern unsigned char _fbss[];
-extern unsigned char _ebss[];
-extern unsigned char _end[];
-
-#endif /* _SECTIONS_H */

fw/bsp/include/platform/smp.h

@@ -1,65 +0,0 @@
-#ifndef SIFIVE_SMP
-#define SIFIVE_SMP
-
-// The maximum number of HARTs this code supports
-#ifndef MAX_HARTS
-#define MAX_HARTS 32
-#endif
-#define CLINT_END_HART_IPI CLINT_CTRL_ADDR + (MAX_HARTS*4)
-
-// The hart that non-SMP tests should run on
-#ifndef NONSMP_HART
-#define NONSMP_HART 0
-#endif
-
-/* If your test cannot handle multiple-threads, use this: 
- *   smp_disable(reg1)
- */
-#define smp_disable(reg1, reg2)			 \
-  csrr reg1, mhartid				;\
-  li   reg2, NONSMP_HART			;\
-  beq  reg1, reg2, hart0_entry			;\
-42:						;\
-  wfi    					;\
-  j 42b						;\
-hart0_entry:
-
-/* If your test needs to temporarily block multiple-threads, do this:
- *    smp_pause(reg1, reg2)
- *    ... single-threaded work ...
- *    smp_resume(reg1, reg2)
- *    ... multi-threaded work ...
- */
-
-#define smp_pause(reg1, reg2)	 \
-  li reg2, 0x8			;\
-  csrw mie, reg2		;\
-  csrr reg2, mhartid		;\
-  bnez reg2, 42f
-
-#define smp_resume(reg1, reg2)	 \
-  li reg1, CLINT_CTRL_ADDR	;\
-41:				;\
-  li reg2, 1			;\
-  sw reg2, 0(reg1)		;\
-  addi reg1, reg1, 4		;\
-  li reg2, CLINT_END_HART_IPI	;\
-  blt reg1, reg2, 41b		;\
-42:				;\
-  wfi    			;\
-  csrr reg2, mip		;\
-  andi reg2, reg2, 0x8		;\
-  beqz reg2, 42b		;\
-  li reg1, CLINT_CTRL_ADDR	;\
-  csrr reg2, mhartid		;\
-  slli reg2, reg2, 2		;\
-  add reg2, reg2, reg1		;\
-  sw zero, 0(reg2)		;\
-41:				;\
-  lw reg2, 0(reg1)		;\
-  bnez reg2, 41b		;\
-  addi reg1, reg1, 4		;\
-  li reg2, CLINT_END_HART_IPI	;\
-  blt reg1, reg2, 41b
-
-#endif

fw/bsp/libwrap/libwrap.mk

@@ -1,57 +0,0 @@
-# See LICENSE for license details.
-
-ifndef _SIFIVE_MK_LIBWRAP
-_SIFIVE_MK_LIBWRAP := # defined
-
-LIBWRAP_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
-LIBWRAP_DIR := $(LIBWRAP_DIR:/=)
-
-LIBWRAP_SRCS := \
-	stdlib/malloc.c \
-	sys/open.c \
-	sys/lseek.c \
-	sys/read.c \
-	sys/write.c \
-	sys/fstat.c \
-	sys/stat.c \
-	sys/close.c \
-	sys/link.c \
-	sys/unlink.c \
-	sys/execve.c \
-	sys/fork.c \
-	sys/getpid.c \
-	sys/kill.c \
-	sys/wait.c \
-	sys/isatty.c \
-	sys/times.c \
-	sys/sbrk.c \
-	sys/_exit.c \
-	sys/puts.c \
-	misc/write_hex.c \
-	sys/printf.c
-
-LIBWRAP_SRCS := $(foreach f,$(LIBWRAP_SRCS),$(LIBWRAP_DIR)/$(f))
-LIBWRAP_OBJS := $(LIBWRAP_SRCS:.c=.o)
-
-LIBWRAP_SYMS := malloc free \
-	open lseek read write fstat stat close link unlink \
-	execve fork getpid kill wait \
-	isatty times sbrk _exit puts printf
-
-LIBWRAP := libwrap.a
-
-LINK_DEPS += $(LIBWRAP)
-
-LDFLAGS += $(foreach s,$(LIBWRAP_SYMS),-Wl,--wrap=$(s))
-LDFLAGS += $(foreach s,$(LIBWRAP_SYMS),-Wl,--wrap=_$(s))
-LDFLAGS += -L. -Wl,--start-group -lwrap -lc -Wl,--end-group
-
-CLEAN_OBJS += $(LIBWRAP_OBJS)
-
-$(LIBWRAP_OBJS): %.o: %.c $(HEADERS)
-	$(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $<
-
-$(LIBWRAP): $(LIBWRAP_OBJS)
-	$(AR) rcs $@ $^
-
-endif # _SIFIVE_MK_LIBWRAP

fw/bsp/libwrap/misc/write_hex.c

@@ -1,19 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <stdint.h>
-#include <unistd.h>
-#include "platform.h"
-
-void write_hex(int fd, unsigned long int hex)
-{
-  uint8_t ii;
-  uint8_t jj;
-  char towrite;
-  write(fd , "0x", 2);
-  for (ii = sizeof(unsigned long int) * 2 ; ii > 0; ii--) {
-    jj = ii - 1;
-    uint8_t digit = ((hex & (0xF << (jj*4))) >> (jj*4));
-    towrite = digit < 0xA ? ('0' + digit) : ('A' +  (digit - 0xA));
-    write(fd, &towrite, 1);
-  }
-}

fw/bsp/libwrap/stdlib/malloc.c

@@ -1,17 +0,0 @@
-/* See LICENSE for license details. */
-
-/* These functions are intended for embedded RV32 systems and are
-   obviously incorrect in general. */
-
-void* __wrap_malloc(unsigned long sz)
-{
-  extern void* sbrk(long);
-  void* res = sbrk(sz);
-  if ((long)res == -1)
-    return 0;
-  return res;
-}
-
-void __wrap_free(void* ptr)
-{
-}

fw/bsp/libwrap/sys/_exit.c

@@ -1,17 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <unistd.h>
-#include "platform.h"
-#include "weak_under_alias.h"
-
-void __wrap_exit(int code)
-{
-  const char message[] = "\nProgam has exited with code:";
-
-  write(STDERR_FILENO, message, sizeof(message) - 1);
-  write_hex(STDERR_FILENO, code);
-  write(STDERR_FILENO, "\n", 1);
-
-  for (;;);
-}
-weak_under_alias(exit);

fw/bsp/libwrap/sys/close.c

@@ -1,11 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <errno.h>
-#include "stub.h"
-#include "weak_under_alias.h"
-
-int __wrap_close(int fd)
-{
-  return _stub(EBADF);
-}
-weak_under_alias(close);

fw/bsp/libwrap/sys/execve.c

@@ -1,11 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <errno.h>
-#include "stub.h"
-#include "weak_under_alias.h"
-
-int __wrap_execve(const char* name, char* const argv[], char* const env[])
-{
-  return _stub(ENOMEM);
-}
-weak_under_alias(execve);

fw/bsp/libwrap/sys/fork.c

@@ -1,9 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <errno.h>
-#include "stub.h"
-
-int fork(void)
-{
-  return _stub(EAGAIN);
-}

fw/bsp/libwrap/sys/fstat.c

@@ -1,18 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <errno.h>
-#include <unistd.h>
-#include <sys/stat.h>
-#include "stub.h"
-#include "weak_under_alias.h"
-
-int __wrap_fstat(int fd, struct stat* st)
-{
-  if (isatty(fd)) {
-    st->st_mode = S_IFCHR;
-    return 0;
-  }
-
-  return _stub(EBADF);
-}
-weak_under_alias(fstat);

fw/bsp/libwrap/sys/getpid.c

@@ -1,8 +0,0 @@
-/* See LICENSE of license details. */
-#include "weak_under_alias.h"
-
-int __wrap_getpid(void)
-{
-  return 1;
-}
-weak_under_alias(getpid);

fw/bsp/libwrap/sys/isatty.c

@@ -1,13 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <unistd.h>
-#include "weak_under_alias.h"
-
-int __wrap_isatty(int fd)
-{
-  if (fd == STDOUT_FILENO || fd == STDERR_FILENO)
-    return 1;
-
-  return 0;
-}
-weak_under_alias(isatty);

fw/bsp/libwrap/sys/kill.c

@@ -1,11 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <errno.h>
-#include "stub.h"
-#include "weak_under_alias.h"
-
-int __wrap_kill(int pid, int sig)
-{
-  return _stub(EINVAL);
-}
-weak_under_alias(kill);

fw/bsp/libwrap/sys/link.c

@@ -1,11 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <errno.h>
-#include "stub.h"
-#include "weak_under_alias.h"
-
-int __wrap_link(const char *old_name, const char *new_name)
-{
-  return _stub(EMLINK);
-}
-weak_under_alias(link);

fw/bsp/libwrap/sys/lseek.c

@@ -1,16 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <errno.h>
-#include <unistd.h>
-#include <sys/types.h>
-#include "stub.h"
-#include "weak_under_alias.h"
-
-off_t __wrap_lseek(int fd, off_t ptr, int dir)
-{
-  if (isatty(fd))
-    return 0;
-
-  return _stub(EBADF);
-}
-weak_under_alias(lseek);

fw/bsp/libwrap/sys/open.c

@@ -1,11 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <errno.h>
-#include "stub.h"
-#include "weak_under_alias.h"
-
-int __wrap_open(const char* name, int flags, int mode)
-{
-  return _stub(ENOENT);
-}
-weak_under_alias(open);

fw/bsp/libwrap/sys/openat.c

@@ -1,11 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <errno.h>
-#include "stub.h"
-#include "weak_under_alias.h"
-
-int __wrap_openat(int dirfd, const char* name, int flags, int mode)
-{
-  return _stub(ENOENT);
-}
-weak_under_alias(openat);

fw/bsp/libwrap/sys/printf.c

@@ -1,271 +0,0 @@
-/* The functions in this file are only meant to support Dhrystone on an
- * embedded RV32 system and are obviously incorrect in general. */
-
-#include <stdarg.h>
-#include <stddef.h>
-#include <stdio.h>
-#include <stdint.h>
-#include <string.h>
-#include <unistd.h>
-
-#undef putchar
-int putchar(int ch)
-{
-  return write(STDOUT_FILENO, &ch, 1) == 1 ? ch : -1;
-}
-
-static void sprintf_putch(int ch, void** data)
-{
-  char** pstr = (char**)data;
-  **pstr = ch;
-  (*pstr)++;
-}
-
-static unsigned long getuint(va_list *ap, int lflag)
-{
-  if (lflag)
-    return va_arg(*ap, unsigned long);
-  else
-    return va_arg(*ap, unsigned int);
-}
-
-static long getint(va_list *ap, int lflag)
-{
-  if (lflag)
-    return va_arg(*ap, long);
-  else
-    return va_arg(*ap, int);
-}
-
-static inline void printnum(void (*putch)(int, void**), void **putdat,
-                    unsigned long num, unsigned base, int width, int padc)
-{
-  unsigned digs[sizeof(num)*8];
-  int pos = 0;
-
-  while (1)
-  {
-    digs[pos++] = num % base;
-    if (num < base)
-      break;
-    num /= base;
-  }
-
-  while (width-- > pos)
-    putch(padc, putdat);
-
-  while (pos-- > 0)
-    putch(digs[pos] + (digs[pos] >= 10 ? 'a' - 10 : '0'), putdat);
-}
-/*
-static inline void print_double(void (*putch)(int, void**), void **putdat,
-                                double num, int width, int prec)
-{
-  union {
-    double d;
-    uint64_t u;
-  } u;
-  u.d = num;
-
-  if (u.u & (1ULL << 63)) {
-    putch('-', putdat);
-    u.u &= ~(1ULL << 63);
-  }
-
-  for (int i = 0; i < prec; i++)
-    u.d *= 10;
-
-  char buf[32], *pbuf = buf;
-  printnum(sprintf_putch, (void**)&pbuf, (unsigned long)u.d, 10, 0, 0);
-  if (prec > 0) {
-    for (int i = 0; i < prec; i++) {
-      pbuf[-i] = pbuf[-i-1];
-    }
-    pbuf[-prec] = '.';
-    pbuf++;
-  }
-
-  for (char* p = buf; p < pbuf; p++)
-    putch(*p, putdat);
-}
-*/
-static void vprintfmt(void (*putch)(int, void**), void **putdat, const char *fmt, va_list ap)
-{
-  register const char* p;
-  const char* last_fmt;
-  register int ch, err;
-  unsigned long num;
-  int base, lflag, width, precision, altflag;
-  char padc;
-
-  while (1) {
-    while ((ch = *(unsigned char *) fmt) != '%') {
-      if (ch == '\0')
-        return;
-      fmt++;
-      putch(ch, putdat);
-    }
-    fmt++;
-
-    // Process a %-escape sequence
-    last_fmt = fmt;
-    padc = ' ';
-    width = -1;
-    precision = -1;
-    lflag = 0;
-    altflag = 0;
-  reswitch:
-    switch (ch = *(unsigned char *) fmt++) {
-
-    // flag to pad on the right
-    case '-':
-      padc = '-';
-      goto reswitch;
-      
-    // flag to pad with 0's instead of spaces
-    case '0':
-      padc = '0';
-      goto reswitch;
-
-    // width field
-    case '1':
-    case '2':
-    case '3':
-    case '4':
-    case '5':
-    case '6':
-    case '7':
-    case '8':
-    case '9':
-      for (precision = 0; ; ++fmt) {
-        precision = precision * 10 + ch - '0';
-        ch = *fmt;
-        if (ch < '0' || ch > '9')
-          break;
-      }
-      goto process_precision;
-
-    case '*':
-      precision = va_arg(ap, int);
-      goto process_precision;
-
-    case '.':
-      if (width < 0)
-        width = 0;
-      goto reswitch;
-
-    case '#':
-      altflag = 1;
-      goto reswitch;
-
-    process_precision:
-      if (width < 0)
-        width = precision, precision = -1;
-      goto reswitch;
-
-    // long flag
-    case 'l':
-      if (lflag)
-        goto bad;
-      goto reswitch;
-
-    // character
-    case 'c':
-      putch(va_arg(ap, int), putdat);
-      break;
-
-    // double
-    case 'f':
-      //print_double(putch, putdat, va_arg(ap, double), width, precision);
-      break;
-
-    // string
-    case 's':
-      if ((p = va_arg(ap, char *)) == NULL)
-        p = "(null)";
-      if (width > 0 && padc != '-')
-        for (width -= strnlen(p, precision); width > 0; width--)
-          putch(padc, putdat);
-      for (; (ch = *p) != '\0' && (precision < 0 || --precision >= 0); width--) {
-        putch(ch, putdat);
-        p++;
-      }
-      for (; width > 0; width--)
-        putch(' ', putdat);
-      break;
-
-    // (signed) decimal
-    case 'd':
-      num = getint(&ap, lflag);
-      if ((long) num < 0) {
-        putch('-', putdat);
-        num = -(long) num;
-      }
-      base = 10;
-      goto signed_number;
-
-    // unsigned decimal
-    case 'u':
-      base = 10;
-      goto unsigned_number;
-
-    // (unsigned) octal
-    case 'o':
-      // should do something with padding so it's always 3 octits
-      base = 8;
-      goto unsigned_number;
-
-    // pointer
-    case 'p':
-      lflag = 1;
-      putch('0', putdat);
-      putch('x', putdat);
-      /* fall through to 'x' */
-
-    // (unsigned) hexadecimal
-    case 'x':
-      base = 16;
-    unsigned_number:
-      num = getuint(&ap, lflag);
-    signed_number:
-      printnum(putch, putdat, num, base, width, padc);
-      break;
-
-    // escaped '%' character
-    case '%':
-      putch(ch, putdat);
-      break;
-      
-    // unrecognized escape sequence - just print it literally
-    default:
-    bad:
-      putch('%', putdat);
-      fmt = last_fmt;
-      break;
-    }
-  }
-}
-
-int __wrap_printf(const char* fmt, ...)
-{
-  va_list ap;
-  va_start(ap, fmt);
-
-  vprintfmt((void*)putchar, 0, fmt, ap);
-
-  va_end(ap);
-  return 0; // incorrect return value, but who cares, anyway?
-}
-
-int __wrap_sprintf(char* str, const char* fmt, ...)
-{
-  va_list ap;
-  char* str0 = str;
-  va_start(ap, fmt);
-
-  vprintfmt(sprintf_putch, (void**)&str, fmt, ap);
-  *str = 0;
-
-  va_end(ap);
-  return str - str0;
-}

fw/bsp/libwrap/sys/puts.c

@@ -1,28 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <stdint.h>
-#include <errno.h>
-#include <unistd.h>
-#include <sys/types.h>
-
-#include "platform.h"
-#include "stub.h"
-#include "weak_under_alias.h"
-
-int __wrap_puts(const char *s)
-{
-  while (*s != '\0') {
-    while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
-    UART0_REG(UART_REG_TXFIFO) = *s;
-
-    if (*s == '\n') {
-      while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
-      UART0_REG(UART_REG_TXFIFO) = '\r';
-    }
-
-    ++s;
-  }
-
-  return 0;
-}
-weak_under_alias(puts);

fw/bsp/libwrap/sys/read.c

@@ -1,32 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <stdint.h>
-#include <errno.h>
-#include <unistd.h>
-#include <sys/types.h>
-
-#include "platform.h"
-#include "stub.h"
-#include "weak_under_alias.h"
-
-ssize_t __wrap_read(int fd, void* ptr, size_t len)
-{
-  uint8_t * current = (uint8_t *)ptr;
-  volatile uint32_t * uart_rx = (uint32_t *)(UART0_CTRL_ADDR + UART_REG_RXFIFO);
-  volatile uint8_t * uart_rx_cnt = (uint8_t *)(UART0_CTRL_ADDR + UART_REG_RXCTRL + 2);
-
-  ssize_t result = 0;
-
-  if (isatty(fd)) {
-    for (current = (uint8_t *)ptr;
-        (current < ((uint8_t *)ptr) + len) && (*uart_rx_cnt > 0);
-        current ++) {
-      *current = *uart_rx;
-      result++;
-    }
-    return result;
-  }
-
-  return _stub(EBADF);
-}
-weak_under_alias(read);

fw/bsp/libwrap/sys/sbrk.c

@@ -1,18 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <stddef.h>
-#include "weak_under_alias.h"
-
-void *__wrap_sbrk(ptrdiff_t incr)
-{
-  extern char _end[];
-  extern char _heap_end[];
-  static char *curbrk = _end;
-
-  if ((curbrk + incr < _end) || (curbrk + incr > _heap_end))
-    return NULL - 1;
-
-  curbrk += incr;
-  return curbrk - incr;
-}
-weak_under_alias(sbrk);

fw/bsp/libwrap/sys/stat.c

@@ -1,12 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <errno.h>
-#include <sys/stat.h>
-#include "stub.h"
-#include "weak_under_alias.h"
-
-int __wrap_stat(const char* file, struct stat* st)
-{
-  return _stub(EACCES);
-}
-weak_under_alias(stat);

fw/bsp/libwrap/sys/stub.h

@@ -1,10 +0,0 @@
-/* See LICENSE of license details. */
-#ifndef _SIFIVE_SYS_STUB_H
-#define _SIFIVE_SYS_STUB_H
-
-static inline int _stub(int err)
-{
-  return -1;
-}
-
-#endif /* _SIFIVE_SYS_STUB_H */

fw/bsp/libwrap/sys/times.c

@@ -1,12 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <errno.h>
-#include <sys/times.h>
-#include "stub.h"
-#include "weak_under_alias.h"
-
-clock_t __wrap_times(struct tms* buf)
-{
-  return _stub(EACCES);
-}
-weak_under_alias(times);

fw/bsp/libwrap/sys/unlink.c

@@ -1,11 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <errno.h>
-#include "stub.h"
-#include "weak_under_alias.h"
-
-int __wrap_unlink(const char* name)
-{
-  return _stub(ENOENT);
-}
-weak_under_alias(unlink);

fw/bsp/libwrap/sys/wait.c

@@ -1,9 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <errno.h>
-#include "stub.h"
-
-int wait(int* status)
-{
-  return _stub(ECHILD);
-}

fw/bsp/libwrap/sys/weak_under_alias.h

@@ -1,7 +0,0 @@
-#ifndef _BSP_LIBWRAP_WEAK_UNDER_ALIAS_H
-#define _BSP_LIBWRAP_WEAK_UNDER_ALIAS_H
-
-#define weak_under_alias(name) \
-  extern __typeof (__wrap_##name) __wrap__##name __attribute__ ((weak, alias ("__wrap_"#name)))
-
-#endif

fw/bsp/libwrap/sys/write.c

@@ -1,31 +0,0 @@
-/* See LICENSE of license details. */
-
-#include <stdint.h>
-#include <errno.h>
-#include <unistd.h>
-#include <sys/types.h>
-
-#include "platform.h"
-#include "stub.h"
-#include "weak_under_alias.h"
-
-ssize_t __wrap_write(int fd, const void* ptr, size_t len)
-{
-  const uint8_t * current = (const char *)ptr;
-
-  if (isatty(fd)) {
-    for (size_t jj = 0; jj < len; jj++) {
-      while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
-      UART0_REG(UART_REG_TXFIFO) = current[jj];
-
-      if (current[jj] == '\n') {
-        while (UART0_REG(UART_REG_TXFIFO) & 0x80000000) ;
-        UART0_REG(UART_REG_TXFIFO) = '\r';
-      }
-    }
-    return len;
-  }
-
-  return _stub(EBADF);
-}
-weak_under_alias(write);

fw/hello-world/.gitignore

@@ -1,3 +1,3 @@
 /hello
 /hello.dis
-/firmware.map
+/hello.map

fw/hello-world/Makefile

@@ -1,17 +1,28 @@
 
 TARGET  = hello
+ISA?=imc
+
 C_SRCS  = $(wildcard *.c) 
 HEADERS = $(wildcard *.h)
-CFLAGS += -O0 -g 
+OPT ?= -O2
+CFLAGS += $(OPT) -g 
 
-BOARD=tgfs-vp
+BOARD=tgc_vp
-LINK_TARGET=flash
+LINK_TARGET=link
-RISCV_ARCH:=rv32i
+RISCV_ARCH:=rv32$(ISA)
-RISCV_ABI:=ilp32
+ifeq ($(ISA),e)
-LDFLAGS := -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI)
+    RISCV_ABI:=ilp32e
+else
+    RISCV_ABI:=ilp32
+endif
+LDFLAGS += -g -Wl,--wrap=printf
 
-compiler := $(shell which riscv32-unknown-elf-gcc)
+compiler := $(shell which riscv64-unknown-elf-gcc)
 TOOL_DIR=$(dir $(compiler))
 
+TRIPLET=riscv64-unknown-elf
 BSP_BASE = ../bsp
 include $(BSP_BASE)/env/common-gcc.mk
+
+$(TARGET).vlog:$(TARGET)
+	riscv32-unknown-elf-objcopy -O verilog $(TARGET) $(TARGET).vlog

fw/hello-world/hello.c

@@ -17,8 +17,6 @@ int factorial(int i){
 
 int main()
 {
-    *(uint32_t*)(GPIO_CTRL_ADDR+GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
-    *(uint32_t*)(GPIO_CTRL_ADDR+GPIO_IOF_EN)  |= IOF0_UART0_MASK;
 	volatile int result = factorial (10);
 	printf("Factorial is %d\n", result);
 	printf("End of execution");

pysysc/gitpod_install.sh

@@ -5,7 +5,7 @@
 pip install wheel
 # clone and install PySysC
 git clone https://github.com/Minres/PySysC.git /workspace/PySysC
-STDCXX=11 SYSTEMC_HOME=`ls -d $CONAN_USER_HOME/.conan/data/systemc/2.3.3/_/_/package/* | head -1` \
+STDCXX=14 SYSTEMC_HOME=`ls -d $CONAN_USER_HOME/.conan/data/systemc/2.3.3/_/_/package/* | head -1` \
   pip install /workspace/PySysC/
 # install SCC integration
 pip install scc/contrib/pysysc

requirements.txt

@@ -0,0 +1 @@
+conan<2.0

scc

@@ -1 +1 @@
-Subproject commit 1e7db7caf1117ec434b2d272a8556c6dded99b21
+Subproject commit aa3769fd5b313bdfd1ac66b94710c5b2b834e9a4

src/CMakeLists.txt

@@ -21,7 +21,7 @@ add_executable(${PROJECT_NAME}
 )
 target_include_directories(${PROJECT_NAME} PUBLIC ${CMAKE_CURRENT_LIST_DIR})
 target_force_link_libraries(${PROJECT_NAME} PUBLIC dbt-rise-tgc_sc)
-target_link_libraries(${PROJECT_NAME} PUBLIC vpvper_generic vpvper_sifive ${BOOST_program_options_LIBRARY})
+target_link_libraries(${PROJECT_NAME} PUBLIC vpvper_generic vpvper_minres ${BOOST_program_options_LIBRARY})
 if(TARGET Boost::program_options)
 	target_link_libraries(${PROJECT_NAME} PUBLIC Boost::program_options Boost::thread)
 else()

src/tgc_vp/gen/PipelinedMemoryBusToApbBridge.h

@@ -0,0 +1,21 @@
+/*
+* Copyright (c) 2023 - 2024 MINRES Technologies GmbH
+*
+* SPDX-License-Identifier: Apache-2.0
+*
+* Generated at 2024-02-08 14:41:56 UTC 
+* by peakrdl_mnrs version 1.2.2
+*/
+
+#pragma once
+
+// need double braces, see https://stackoverflow.com/questions/6893700/how-to-construct-stdarray-object-with-initializer-list#6894191
+const std::array<scc::target_memory_map_entry<scc::LT>, 6> PipelinedMemoryBusToApbBridge_map = {{ 
+   { gpio0.socket, 0x0, 0xc },
+   { uart0.socket, 0x1000, 0x14 },
+   { timer0.socket, 0x20000, 0x1c },
+   { aclint.socket, 0x30000, 0xc000 },
+   { irq_ctrl.socket, 0x40000, 0x8 },
+   { qspi.socket, 0x50000, 0x5c },
+   //{ bootloader.socket, 0x80000, 0x400 },
+ }} ;

src/tgc_vp/system.cpp

@@ -5,124 +5,91 @@
  */
 
 #include "tgc_vp/system.h"
+#include "minres/timer.h"
+#include "minres/uart.h"
+#include "scc/utilities.h"
 
 namespace tgc_vp {
 using namespace sc_core;
-using namespace vpvper::sifive;
+using namespace vpvper::minres;
 using namespace sysc::tgfs;
 
 system::system(sc_core::sc_module_name nm)
 : sc_core::sc_module(nm)
-, NAMED(router,  platfrom_mmap.size() + 2, 2)
+, NAMED(ahb_router, 3, 2)
-{
+, NAMED(apbBridge, PipelinedMemoryBusToApbBridge_map.size(), 1){
-    core_complex.ibus(router.target[0]);
+    core_complex.ibus(ahb_router.target[0]);
-    core_complex.dbus(router.target[1]);
+    core_complex.dbus(ahb_router.target[1]);
+
+    ahb_router.initiator.at(0)(qspi.xip_sck);
+    ahb_router.set_target_range(0, 0xE0000000, 16_MB);
+    ahb_router.initiator.at(1)(mem_ram.target);
+    ahb_router.set_target_range(1, 0x80000000, 32_kB);
+    ahb_router.initiator.at(2)(apbBridge.target[0]);
+    ahb_router.set_target_range(2, 0xF0000000, 256_MB);
+
     size_t i = 0;
-    for (const auto &e : platfrom_mmap) {
+    for (const auto &e : PipelinedMemoryBusToApbBridge_map) {
-        router.initiator.at(i)(e.target);
+        apbBridge.initiator.at(i)(e.target);
-        router.set_target_range(i, e.start, e.size);
+        apbBridge.set_target_range(i, e.start, e.size);
         i++;
     }
-    router.initiator.at(i)(mem_qspi.target);
-    router.set_target_range(i, 0x20000000, 512_MB);
-    router.initiator.at(++i)(mem_ram.target);
-    router.set_target_range(i, 0x80000000, 128_kB);
 
-    uart1.clk_i(tlclk_s);
+    gpio0.clk_i(clk_i);
-    qspi0.clk_i(tlclk_s);
+    uart0.clk_i(clk_i);
-    qspi1.clk_i(tlclk_s);
+    timer0.clk_i(clk_i);
-    qspi2.clk_i(tlclk_s);
+    aclint.clk_i(clk_i);
-    pwm0.clk_i(tlclk_s);
+    irq_ctrl.clk_i(clk_i);
-    pwm1.clk_i(tlclk_s);
+    qspi.clk_i(clk_i);
-    pwm2.clk_i(tlclk_s);
+    core_complex.clk_i(clk_i);
-    gpio0.clk_i(tlclk_s);
+    //mem_ram.clk_i(clk_i);
-    plic.clk_i(tlclk_s);
-    aon.clk_i(tlclk_s);
-    aon.lfclkc_o(lfclk_s);
-    prci.hfclk_o(tlclk_s); // clock driver
-    clint.tlclk_i(tlclk_s);
-    clint.lfclk_i(lfclk_s);
-    core_complex.clk_i(tlclk_s);
-    mem_qspi.clk_i(tlclk_s);
-    mem_ram.clk_i(tlclk_s);
 
-    uart0.rst_i(rst_s);
-    uart1.rst_i(rst_s);
-    qspi0.rst_i(rst_s);
-    qspi1.rst_i(rst_s);
-    qspi2.rst_i(rst_s);
-    pwm0.rst_i(rst_s);
-    pwm1.rst_i(rst_s);
-    pwm2.rst_i(rst_s);
     gpio0.rst_i(rst_s);
-    plic.rst_i(rst_s);
+    uart0.rst_i(rst_s);
-    aon.rst_o(rst_s);
+    timer0.rst_i(rst_s);
-    prci.rst_i(rst_s);
+    aclint.rst_i(rst_s);
-    clint.rst_i(rst_s);
+    irq_ctrl.rst_i(rst_s);
+    qspi.rst_i(rst_s);
     core_complex.rst_i(rst_s);
 
-    aon.erst_n_i(erst_n);
+    aclint.mtime_int_o(mtime_int_s);
+    aclint.msip_int_o(msip_int_s);
+    irq_ctrl.irq_o(core_int_s);
+    irq_ctrl.pending_irq_i(irq_int_s);
 
-    clint.mtime_int_o(mtime_int_s);
+    uart0.irq_o(irq_int_s[0]);
-    clint.msip_int_o(msie_int_s);
+    timer0.interrupt_o[0](irq_int_s[1]);
+    timer0.interrupt_o[1](irq_int_s[2]);
+    qspi.irq_o(irq_int_s[3]);
 
-    plic.global_interrupts_i(global_int_s);
-    plic.core_interrupt_o(core_int_s);
-
-    core_complex.sw_irq_i(msie_int_s);
     core_complex.timer_irq_i(mtime_int_s);
     core_complex.ext_irq_i(core_int_s);
     core_complex.local_irq_i(local_int_s);
+    core_complex.sw_irq_i(msip_int_s);
 
-    pins_i(gpio0.pins_i);
+    gpio0.pins_i(pins_i);
     gpio0.pins_o(pins_o);
+    gpio0.oe_o(pins_oe_o);
 
-    uart0.irq_o(global_int_s[3]);
+    uart0.tx_o(uart0_tx_o);
+    uart0.rx_i(uart0_rx_i);
 
-    gpio0.iof0_i[5](qspi1.sck_o);
+    timer0.clear_i(t0_clear_i);
-    gpio0.iof0_i[3](qspi1.mosi_o);
+    timer0.tick_i(t0_tick_i);
-    qspi1.miso_i(gpio0.iof0_o[4]);
-    gpio0.iof0_i[2](qspi1.scs_o[0]);
-    gpio0.iof0_i[9](qspi1.scs_o[2]);
-    gpio0.iof0_i[10](qspi1.scs_o[3]);
 
-    qspi0.irq_o(global_int_s[5]);
+    qspi.ssclk_o(ssclk_o);
-    qspi1.irq_o(global_int_s[6]);
+    qspi.dq_o(dq_o);
-    qspi2.irq_o(global_int_s[7]);
+    qspi.dq_i(dq_i);
+    qspi.oe_o(dq_oe_o);
 
-    gpio0.iof0_i[16](uart1.tx_o);
+    SC_METHOD(gen_reset);
-    uart1.rx_i(gpio0.iof0_o[17]);
+    sensitive << erst_n;
-    uart1.irq_o(global_int_s[4]);
+}
-
+void system::gen_reset(){
-    gpio0.iof1_i[0](pwm0.cmpgpio_o[0]);
+    if(erst_n.read())
-    gpio0.iof1_i[1](pwm0.cmpgpio_o[1]);
+        rst_s = 0;
-    gpio0.iof1_i[2](pwm0.cmpgpio_o[2]);
+    else rst_s = 1;
-    gpio0.iof1_i[3](pwm0.cmpgpio_o[3]);
-
-    gpio0.iof1_i[10](pwm2.cmpgpio_o[0]);
-    gpio0.iof1_i[11](pwm2.cmpgpio_o[1]);
-    gpio0.iof1_i[12](pwm2.cmpgpio_o[2]);
-    gpio0.iof1_i[13](pwm2.cmpgpio_o[3]);
-
-    gpio0.iof1_i[19](pwm1.cmpgpio_o[0]);
-    gpio0.iof1_i[20](pwm1.cmpgpio_o[1]);
-    gpio0.iof1_i[21](pwm1.cmpgpio_o[2]);
-    gpio0.iof1_i[22](pwm1.cmpgpio_o[3]);
-
-    pwm0.cmpip_o[0](global_int_s[40]);
-    pwm0.cmpip_o[1](global_int_s[41]);
-    pwm0.cmpip_o[2](global_int_s[42]);
-    pwm0.cmpip_o[3](global_int_s[43]);
-
-    pwm1.cmpip_o[0](global_int_s[44]);
-    pwm1.cmpip_o[1](global_int_s[45]);
-    pwm1.cmpip_o[2](global_int_s[46]);
-    pwm1.cmpip_o[3](global_int_s[47]);
-
-    pwm2.cmpip_o[0](global_int_s[48]);
-    pwm2.cmpip_o[1](global_int_s[49]);
-    pwm2.cmpip_o[2](global_int_s[50]);
-    pwm2.cmpip_o[3](global_int_s[51]);
 }
 
+
 } /* namespace sysc */

src/tgc_vp/system.h

@@ -7,20 +7,21 @@
 #ifndef _PLATFORM_H_
 #define _PLATFORM_H_
 
-#include <sifive/aon.h>
+#include "minres/irq.h"
-#include <sifive/clint.h>
+#include "minres/timer.h"
-#include <sifive/gpio.h>
+#include <minres/aclint.h>
-#include <sifive/plic.h>
+#include <minres/gpio.h>
-#include <sifive/prci.h>
+#include <minres/qspi.h>
-#include <sifive/pwm.h>
+#include <sysc/communication/sc_clock.h>
-#include <sifive/spi.h>
+#include <sysc/communication/sc_signal_ports.h>
 #include <sysc/core_complex.h>
-#include <sifive/uart.h>
+#include <minres/uart.h>
-#include <sifive/uart_terminal.h>
 #include <cci_configuration>
 #include <scc/memory.h>
 #include <scc/router.h>
 #include <scc/utilities.h>
+#include <sysc/kernel/sc_time.h>
+#include <sysc/utils/sc_vector.h>
 #include <tlm/scc/tlm_signal_sockets.h>
 #include <array>
 #include <memory>
@@ -32,8 +33,19 @@ class system : public sc_core::sc_module {
 public:
     SC_HAS_PROCESS(system);// NOLINT
 
-    sc_core::sc_vector<tlm::scc::tlm_signal_initiator_socket<sc_dt::sc_logic>> pins_o{"pins_o", 32};
+    sc_core::sc_vector<sc_core::sc_out<bool>> pins_o{"pins_o",32};
-    sc_core::sc_vector<tlm::scc::tlm_signal_target_socket<sc_dt::sc_logic>> pins_i{"pins_i", 32};
+    sc_core::sc_vector<sc_core::sc_out<bool>> pins_oe_o{"pins_oe_o", 32};
+    sc_core::sc_vector<sc_core::sc_in<bool>> pins_i{"pins_i", 32};  
+    sc_core::sc_out<bool> uart0_tx_o {"uart0_tx_o"};
+    sc_core::sc_in<bool> uart0_rx_i {"uart0_rx_i"};
+    sc_core::sc_vector<sc_core::sc_in<bool>> t0_clear_i {"t0_clear_i", vpvper::minres::timer::CLEAR_CNT};
+    sc_core::sc_vector<sc_core::sc_in<bool>> t0_tick_i {"t0_tick_i", vpvper::minres::timer::TICK_CNT-1};
+    sc_core::sc_out<bool> ssclk_o{"ssclk_o"};
+    sc_core::sc_vector<sc_core::sc_out<bool>> dq_o{"dq_o", 4};
+    sc_core::sc_vector<sc_core::sc_out<bool>> dq_oe_o{"dq_oe_o", 4};
+    sc_core::sc_vector<sc_core::sc_in<bool>> dq_i{"dq_i", 4};
+  
+    sc_core::sc_in<sc_core::sc_time> clk_i{"clk_i"};
 
     sc_core::sc_in<bool> erst_n{"erst_n"};
 
@@ -41,32 +53,24 @@ public:
 
 private:
     sysc::tgfs::core_complex core_complex{"core_complex"};
-    scc::router<> router;
+    scc::router<> ahb_router, apbBridge;
-    vpvper::sifive::uart_terminal uart0{"uart0"};
+    vpvper::minres::gpio_tl gpio0{"gpio0"};
-    vpvper::sifive::uart  uart1{"uart1"};
+    vpvper::minres::uart_tl uart0{"uart0"};
-    vpvper::sifive::spi qspi0{"qspi0"}, qspi1{"qspi1"}, qspi2{"qspi2"};
+    vpvper::minres::timer_tl timer0{"timer0"};
-    vpvper::sifive::pwm pwm0{"pwm0"}, pwm1{"pwm1"}, pwm2{"pwm2"};
+    vpvper::minres::aclint_tl aclint{"aclint"};
-    vpvper::sifive::gpio gpio0{"gpio0"};
+    vpvper::minres::irq_tl irq_ctrl{"irq_ctrl"};
-    vpvper::sifive::plic plic{"plic"};
+    vpvper::minres::qspi_tl qspi{"qspi"};
-    vpvper::sifive::aon aon{"aon"};
-    vpvper::sifive::prci prci{"prci"};
-    vpvper::sifive::clint clint{"clint"};
 
-    using mem_qspi_t = scc::memory<512_MB, scc::LT>;
+    //scc::memory<1_kB, scc::LT> bootloader{"bootloader"};
-    mem_qspi_t mem_qspi{"mem_qspi"};
+    scc::memory<32_kB, scc::LT> mem_ram {"mem_ram"};
-    using mem_ram_t = scc::memory<128_kB, scc::LT>;
+   
-    mem_ram_t mem_ram{"mem_ram"};
+    sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> rst_s{"rst_s"}, mtime_int_s{"mtime_int_s"}, msip_int_s{"msip_int_s"};
-
-    sc_core::sc_signal<sc_core::sc_time, sc_core::SC_MANY_WRITERS> tlclk_s{"tlclk_s"};
-    sc_core::sc_signal<sc_core::sc_time, sc_core::SC_MANY_WRITERS> lfclk_s{"lfclk_s"};
     
-    sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> rst_s{"rst_s"}, mtime_int_s{"mtime_int_s"}, msie_int_s{"msie_int_s"};
+    sc_core::sc_vector<sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS>> irq_int_s{"irq_int_s", 32}, local_int_s{"local_int_s", 16};
-    
-    sc_core::sc_vector<sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS>> global_int_s{"global_int_s", 256}, local_int_s{"local_int_s", 16};
     sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> core_int_s{"core_int_s"};
     
     void gen_reset();
-#include "tgc_vp/gen/platform_mmap.h"
+#include "tgc_vp/gen/PipelinedMemoryBusToApbBridge.h"
 };
 
 } /* namespace sysc */

src/tgc_vp/tb.cpp

@@ -5,20 +5,25 @@
  */
 
 #include "tgc_vp/tb.h"
+#include <sysc/kernel/sc_time.h>
 namespace tgc_vp {
 
 SC_HAS_PROCESS(tb);
 tb::tb(const sc_core::sc_module_name &nm): sc_core::sc_module(nm) {
     top.erst_n(rst_n);
     rst_gen.rst_n(rst_n);
-    for (auto i = 0U; i < gpio_s.size(); ++i) {
+    top.pins_o(pins_o);
-        gpio_s[i].in(top.pins_o[i]);
+    top.pins_i(pins_i);
-        top.pins_i[i](gpio_s[i].out);
+    top.pins_oe_o(pins_oe_o);
-    }
+    top.uart0_rx_i(uart0_rx_i);
-#ifndef WIN32
+    top.uart0_tx_o(uart0_tx_o);
-    // terminal
+    top.t0_clear_i(t0_clear_i);
-    terminal.tx_o(gpio_s[16].in);
+    top.t0_tick_i(t0_tick_i);
-    gpio_s[17].out(terminal.rx_i);
+    top.ssclk_o(ssclk_o);
-#endif
+    top.dq_o(dq_o);
+    top.dq_i(dq_i);
+    top.dq_oe_o(dq_oe_o);
+    top.clk_i(clk_i);
+    clk_i = 10_ns;
 }
 }

src/tgc_vp/tb.h

@@ -19,11 +19,19 @@ public:
     tb(sc_core::sc_module_name const& nm);
     tgc_vp::system top{"top"};
     tgc_vp::rst_gen rst_gen{"rst_gen"};
-    sc_core::sc_vector<tlm::scc::tlm_signal<sc_dt::sc_logic>> gpio_s{"gpio_s", 32};
     sc_core::sc_signal<bool> rst_n{"rst_n"};
-#ifndef WIN32 // Seasocks not available under windows
+    sc_core::sc_vector<sc_core::sc_signal<bool>> pins_o{"pins_o",32};
-    vpvper::generic::terminal terminal{"terminal"};
+    sc_core::sc_vector<sc_core::sc_signal<bool>> pins_oe_o{"pins_oe_o", 32};
-#endif
+    sc_core::sc_vector<sc_core::sc_signal<bool>> pins_i{"pins_i", 32};  
+    sc_core::sc_signal<bool> uart0_tx_o {"uart0_tx_o"};
+    sc_core::sc_signal<bool> uart0_rx_i {"uart0_rx_i"};
+    sc_core::sc_vector<sc_core::sc_signal<bool>> t0_clear_i {"t0_clear_i", vpvper::minres::timer::CLEAR_CNT};
+    sc_core::sc_vector<sc_core::sc_signal<bool>> t0_tick_i {"t0_tick_i", vpvper::minres::timer::TICK_CNT-1};
+    sc_core::sc_signal<bool> ssclk_o{"ssclk_o"};
+    sc_core::sc_vector<sc_core::sc_signal<bool>> dq_o{"dq_o", 4};
+    sc_core::sc_vector<sc_core::sc_signal<bool>> dq_oe_o{"dq_oe_o", 4};
+    sc_core::sc_vector<sc_core::sc_signal<bool>> dq_i{"dq_i", 4};
+    sc_core::sc_signal<sc_core::sc_time> clk_i{"clk_i"};
 };
 
 } /* namespace tgc_vp */

vpvper

@@ -1 +1 @@
-Subproject commit 0b2dba5820ac06821306121f1d80b6b077fda4da
+Subproject commit 899316db7ec527a46c968199a9c0e0f64e48fc2b