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HIFIVE1-VP
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Eyck Jentzsch
7a9802f68b
add SPI RTL representation
2020-12-21 07:02:36 +00:00
..
gen_input
Back-ported DVCon turorial changes
2018-11-12 19:36:44 +01:00
incl
/sysc
add SPI RTL representation
2020-12-21 07:02:36 +00:00
src
add SPI RTL representation
2020-12-21 07:02:36 +00:00
CMakeLists.txt
modernize build system and cleanup dependencies
2020-05-30 14:16:27 +02:00