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adapt to changes in scc

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This commit is contained in:
Eyck Jentzsch
2021-08-26 17:27:33 +02:00
parent b36c572e7b
commit f013775b00
24 changed files with 138 additions and 145 deletions
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10
platform/incl/sysc/SiFive/fe310.h
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@@ -47,7 +47,7 @@
#include "scc/memory.h"
#include "scc/router.h"
#include "scc/utilities.h"
#include "tlm/tlm_signal_sockets.h"
#include "tlm/scc/tlm_signal_sockets.h"
#include <array>
#include <memory>
#include <sysc/kernel/sc_module.h>
@@ -58,8 +58,8 @@ class fe310 : public sc_core::sc_module {
public:
SC_HAS_PROCESS(fe310);// NOLINT
sc_core::sc_vector<tlm::tlm_signal_initiator_socket<sc_dt::sc_logic>> pins_o;
sc_core::sc_vector<tlm::tlm_signal_target_socket<sc_dt::sc_logic>> pins_i;
sc_core::sc_vector<tlm::scc::tlm_signal_initiator_socket<sc_dt::sc_logic>> pins_o;
sc_core::sc_vector<tlm::scc::tlm_signal_target_socket<sc_dt::sc_logic>> pins_i;
sc_core::sc_in<bool> erst_n;
@@ -92,8 +92,8 @@ private:
sc_core::sc_vector<sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS>> s_global_int, s_local_int;
sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> s_core_int;
sc_core::sc_vector<scc::tlm_signal_bool_opt_in> s_dummy_sck_i;
sc_core::sc_vector<scc::tlm_signal_bool_opt_out> s_dummy_sck_o;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_in> s_dummy_sck_i;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_out> s_dummy_sck_o;
protected:
void gen_reset();

26
platform/incl/sysc/SiFive/gpio.h
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@@ -34,11 +34,11 @@
#define _GPIO_H_
#include "cci_configuration"
#include "scc/signal_initiator_mixin.h"
#include "scc/signal_target_mixin.h"
#include "tlm/scc/signal_initiator_mixin.h"
#include "tlm/scc/signal_target_mixin.h"
#include "scc/tlm_target.h"
#include <memory>
#include <tlm/tlm_signal.h>
#include <tlm/scc/tlm_signal.h>
namespace sysc {
@@ -52,13 +52,13 @@ public:
sc_core::sc_in<bool> rst_i;
// sc_core::sc_inout_rv<32> pins_io;
sc_core::sc_vector<scc::tlm_signal_logic_out> pins_o;
sc_core::sc_vector<scc::tlm_signal_logic_in> pins_i;
sc_core::sc_vector<tlm::scc::tlm_signal_logic_out> pins_o;
sc_core::sc_vector<tlm::scc::tlm_signal_logic_in> pins_i;
sc_core::sc_vector<scc::tlm_signal_bool_opt_out> iof0_o;
sc_core::sc_vector<scc::tlm_signal_bool_opt_out> iof1_o;
sc_core::sc_vector<scc::tlm_signal_bool_opt_in> iof0_i;
sc_core::sc_vector<scc::tlm_signal_bool_opt_in> iof1_i;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_out> iof0_o;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_out> iof1_o;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_in> iof0_i;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_in> iof1_i;
gpio(sc_core::sc_module_name nm);
virtual ~gpio() override; // need to keep it in source file because of fwd declaration of gpio_regs
@@ -70,16 +70,16 @@ protected:
void reset_cb();
void update_pins(uint32_t changed_bits);
void before_end_of_elaboration() override;
void pin_input(unsigned int tag, tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, sc_core::sc_time &delay);
void forward_pin_input(unsigned int tag, tlm::tlm_signal_gp<sc_dt::sc_logic> &gp);
void iof_input(unsigned int tag, unsigned iof_idx, tlm::tlm_signal_gp<> &gp, sc_core::sc_time &delay);
void pin_input(unsigned int tag, tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, sc_core::sc_time &delay);
void forward_pin_input(unsigned int tag, tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp);
void iof_input(unsigned int tag, unsigned iof_idx, tlm::scc::tlm_signal_gp<> &gp, sc_core::sc_time &delay);
sc_core::sc_time clk;
std::array<bool, 32> last_iof0, last_iof1;
std::unique_ptr<gpio_regs> regs;
std::shared_ptr<sysc::WsHandler> handler;
private:
tlm::tlm_phase write_output(tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, size_t i, sc_dt::sc_logic val);
tlm::tlm_phase write_output(tlm::scc::tlm_signal_gp<sc_dt::sc_logic> &gp, size_t i, sc_dt::sc_logic val);
};
} /* namespace sysc */

8
platform/incl/sysc/SiFive/pwm.h
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@@ -34,10 +34,10 @@
#define _PWM_H_
#include "cci_configuration"
#include "scc/signal_initiator_mixin.h"
#include "scc/signal_target_mixin.h"
#include "tlm/scc/signal_initiator_mixin.h"
#include "tlm/scc/signal_target_mixin.h"
#include "scc/tlm_target.h"
#include <tlm/tlm_signal.h>
#include <tlm/scc/tlm_signal.h>
namespace sysc {
@@ -49,7 +49,7 @@ public:
sc_core::sc_in<sc_core::sc_time> clk_i;
sc_core::sc_in<bool> rst_i;
sc_core::sc_vector<scc::tlm_signal_bool_opt_out> cmpgpio_o;
sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_out> cmpgpio_o;
sc_core::sc_vector<sc_core::sc_out<bool>> cmpip_o;
pwm(sc_core::sc_module_name nm);

6
platform/incl/sysc/SiFive/spi.h
View File

@@ -34,7 +34,7 @@
#define _SPI_H_
#include <sysc/utils/sc_vector.h>
#include <tlm/tlm_signal.h>
#include <tlm/scc/tlm_signal.h>
namespace sysc {
@@ -48,8 +48,8 @@ public:
template <typename TYPE>
static std::unique_ptr<spi> create(sc_core::sc_module_name nm);
template <typename T> using tlm_in = tlm::tlm_signal_opt_target_socket<T>;
template <typename T> using tlm_out = tlm::tlm_signal_opt_initiator_socket<T>;
template <typename T> using tlm_in = tlm::scc::tlm_signal_opt_target_socket<T>;
template <typename T> using tlm_out = tlm::scc::tlm_signal_opt_initiator_socket<T>;
tlm::tlm_target_socket<> socket;
sc_core::sc_in<sc_core::sc_time> clk_i;

12
platform/incl/sysc/SiFive/uart.h
View File

@@ -34,10 +34,10 @@
#define _UART_H_
#include "cci_configuration"
#include "scc/signal_initiator_mixin.h"
#include "scc/signal_target_mixin.h"
#include "tlm/scc/signal_initiator_mixin.h"
#include "tlm/scc/signal_target_mixin.h"
#include "scc/tlm_target.h"
#include <tlm/tlm_signal.h>
#include <tlm/scc/tlm_signal.h>
namespace sysc {
class tlm_signal_uart_extension;
@@ -49,8 +49,8 @@ public:
SC_HAS_PROCESS(uart);// NOLINT
sc_core::sc_in<sc_core::sc_time> clk_i;
sc_core::sc_in<bool> rst_i;
scc::tlm_signal_bool_out tx_o;
scc::tlm_signal_bool_in rx_i;
tlm::scc::tlm_signal_bool_out tx_o;
tlm::scc::tlm_signal_bool_in rx_i;
sc_core::sc_out<bool> irq_o;
@@ -63,7 +63,7 @@ protected:
void clock_cb();
void reset_cb();
void transmit_data();
void receive_data(tlm::tlm_signal_gp<> &gp, sc_core::sc_time &delay);
void receive_data(tlm::scc::tlm_signal_gp<> &gp, sc_core::sc_time &delay);
void update_irq();
sc_core::sc_time clk{sc_core::SC_ZERO_TIME}, rx_last_start{sc_core::SC_ZERO_TIME};
std::unique_ptr<uart_regs> regs;