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Adapted descriptions to improved Core DSL and regenerated code

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This commit is contained in:
Eyck Jentzsch
2018-04-30 19:22:00 +02:00
parent 9ad29ddb64
commit 19b660962b
20 changed files with 3764 additions and 3836 deletions
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2
riscv/incl/iss/arch/rv32gc.h
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@ -48,7 +48,7 @@ struct traits<rv32gc> {
constexpr static char const* const core_type = "RV32GC";
enum constants {XLEN=32, FLEN=64, PCLEN=32, MISA_VAL=1075056941, PGSIZE=4096, PGMASK=4095};
enum constants {XLEN=32, FLEN=64, PCLEN=32, MISA_VAL=0b1000000000101000001000100101101, PGSIZE=0x1000, PGMASK=0xfff};
constexpr static unsigned FP_REGS_SIZE = 64;

2
riscv/incl/iss/arch/rv32imac.h
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@ -48,7 +48,7 @@ struct traits<rv32imac> {
constexpr static char const* const core_type = "RV32IMAC";
enum constants {XLEN=32, PCLEN=32, MISA_VAL=1075056901, PGSIZE=4096, PGMASK=4095};
enum constants {XLEN=32, PCLEN=32, MISA_VAL=0b1000000000101000001000100000101, PGSIZE=0x1000, PGMASK=0xfff};
constexpr static unsigned FP_REGS_SIZE = 0;

2
riscv/incl/iss/arch/rv64ia.h
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@ -48,7 +48,7 @@ struct traits<rv64ia> {
constexpr static char const* const core_type = "RV64IA";
enum constants {XLEN=64, PCLEN=64, MISA_VAL=2147746049, PGSIZE=4096, PGMASK=4095};
enum constants {XLEN=64, PCLEN=64, MISA_VAL=0b10000000000001000000000100000001, PGSIZE=0x1000, PGMASK=0xfff};
constexpr static unsigned FP_REGS_SIZE = 0;