2018-11-08 13:31:28 +01:00
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/*******************************************************************************
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* Copyright (C) 2017, 2018 MINRES Technologies GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*******************************************************************************/
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2017-09-21 13:13:01 +02:00
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#ifndef _GPIO_H_
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#define _GPIO_H_
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2018-11-08 13:31:28 +01:00
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#include "cci_configuration"
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2018-07-12 15:27:36 +02:00
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#include "scc/signal_initiator_mixin.h"
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2018-11-08 13:31:28 +01:00
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#include "scc/signal_target_mixin.h"
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#include "scc/tlm_target.h"
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#include <memory>
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2018-07-12 15:27:36 +02:00
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#include <tlm/tlm_signal.h>
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2017-09-21 13:13:01 +02:00
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namespace sysc {
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class gpio_regs;
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2017-11-10 22:40:24 +01:00
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class WsHandler;
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2017-09-21 13:13:01 +02:00
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2017-10-04 14:30:25 +02:00
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class gpio : public sc_core::sc_module, public scc::tlm_target<> {
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2017-09-21 13:13:01 +02:00
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public:
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2018-11-08 13:31:28 +01:00
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SC_HAS_PROCESS(gpio);// NOLINT
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2017-09-21 13:13:01 +02:00
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sc_core::sc_in<sc_core::sc_time> clk_i;
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2017-09-22 11:23:23 +02:00
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sc_core::sc_in<bool> rst_i;
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2018-07-12 15:27:36 +02:00
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// sc_core::sc_inout_rv<32> pins_io;
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sc_core::sc_vector<scc::tlm_signal_logic_out> pins_o;
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2018-11-08 13:31:28 +01:00
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sc_core::sc_vector<scc::tlm_signal_logic_in> pins_i;
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2018-07-12 15:27:36 +02:00
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sc_core::sc_vector<scc::tlm_signal_bool_opt_out> iof0_o;
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sc_core::sc_vector<scc::tlm_signal_bool_opt_out> iof1_o;
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2018-11-08 13:31:28 +01:00
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sc_core::sc_vector<scc::tlm_signal_bool_opt_in> iof0_i;
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sc_core::sc_vector<scc::tlm_signal_bool_opt_in> iof1_i;
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2017-11-10 22:40:24 +01:00
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2017-09-21 13:13:01 +02:00
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gpio(sc_core::sc_module_name nm);
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2017-09-22 20:09:29 +02:00
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virtual ~gpio() override; // need to keep it in source file because of fwd declaration of gpio_regs
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2017-09-22 11:23:23 +02:00
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2018-03-27 19:49:11 +02:00
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cci::cci_param<bool> write_to_ws;
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2017-09-21 13:13:01 +02:00
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protected:
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void clock_cb();
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void reset_cb();
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2018-11-08 13:31:28 +01:00
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void update_pins(uint32_t changed_bits);
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2019-07-16 15:54:15 +02:00
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void before_end_of_elaboration() override;
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2018-11-08 13:31:28 +01:00
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void pin_input(unsigned int tag, tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, sc_core::sc_time &delay);
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void forward_pin_input(unsigned int tag, tlm::tlm_signal_gp<sc_dt::sc_logic> &gp);
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void iof_input(unsigned int tag, unsigned iof_idx, tlm::tlm_signal_gp<> &gp, sc_core::sc_time &delay);
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2017-09-21 13:13:01 +02:00
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sc_core::sc_time clk;
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2018-07-13 20:04:07 +02:00
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std::array<bool, 32> last_iof0, last_iof1;
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2017-09-21 13:13:01 +02:00
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std::unique_ptr<gpio_regs> regs;
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2017-11-10 22:40:24 +01:00
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std::shared_ptr<sysc::WsHandler> handler;
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2018-07-13 20:04:07 +02:00
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private:
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2018-11-08 13:31:28 +01:00
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tlm::tlm_phase write_output(tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, size_t i, sc_dt::sc_logic val);
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2017-09-21 13:13:01 +02:00
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};
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} /* namespace sysc */
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#endif /* _GPIO_H_ */
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